mirror of https://gitee.com/openkylin/linux.git
ARM: dts: Add Calxeda ECX-2000 support
Separate out common dts pieces from highbank dts and add support for Calxeda ECX-2000 (Midway) SOC. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Rob Herring
parent
185bdffb4b
commit
7d6ab9b862
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@ -1,8 +1,15 @@
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Calxeda Highbank Platforms Device Tree Bindings
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Calxeda Platforms Device Tree Bindings
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-----------------------------------------------
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Boards with Calxeda Cortex-A9 based Highbank SOC shall have the following
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properties.
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Boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC shall have the
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following properties.
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Required root node properties:
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- compatible = "calxeda,highbank";
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Boards with Calxeda Cortex-A15 based ECX-2000 SOC shall have the following
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properties.
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Required root node properties:
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- compatible = "calxeda,ecx-2000";
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@ -24,7 +24,8 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
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exynos4210-smdkv310.dtb \
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exynos4210-trats.dtb \
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exynos5250-smdk5250.dtb
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dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
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dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
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ecx-2000.dtb
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dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
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integratorcp.dtb
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dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
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@ -0,0 +1,104 @@
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/*
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* Copyright 2011-2012 Calxeda, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/dts-v1/;
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/* First 4KB has pen for secondary cores. */
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/memreserve/ 0x00000000 0x0001000;
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/ {
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model = "Calxeda ECX-2000";
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compatible = "calxeda,ecx-2000";
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#address-cells = <2>;
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#size-cells = <2>;
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clock-ranges;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a15";
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reg = <0>;
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clocks = <&a9pll>;
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clock-names = "cpu";
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};
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cpu@1 {
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compatible = "arm,cortex-a15";
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reg = <1>;
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clocks = <&a9pll>;
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clock-names = "cpu";
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};
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cpu@2 {
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compatible = "arm,cortex-a15";
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reg = <2>;
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clocks = <&a9pll>;
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clock-names = "cpu";
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};
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cpu@3 {
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compatible = "arm,cortex-a15";
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reg = <3>;
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clocks = <&a9pll>;
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clock-names = "cpu";
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};
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};
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memory@0 {
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name = "memory";
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000 0xff800000>;
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};
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memory@200000000 {
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name = "memory";
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device_type = "memory";
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reg = <0x00000002 0x00000000 0x00000003 0x00000000>;
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};
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soc {
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ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;
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timer {
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compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
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<1 14 0xf08>,
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<1 11 0xf08>,
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<1 10 0xf08>;
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};
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intc: interrupt-controller@fff11000 {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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#size-cells = <0>;
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#address-cells = <1>;
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interrupt-controller;
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interrupts = <1 9 0xf04>;
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reg = <0xfff11000 0x1000>,
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<0xfff12000 0x1000>,
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<0xfff14000 0x2000>,
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<0xfff16000 0x2000>;
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};
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>;
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};
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};
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};
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/include/ "ecx-common.dtsi"
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@ -0,0 +1,237 @@
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/*
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* Copyright 2011-2012 Calxeda, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/ {
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chosen {
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bootargs = "console=ttyAMA0";
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&intc>;
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sata@ffe08000 {
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compatible = "calxeda,hb-ahci";
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reg = <0xffe08000 0x10000>;
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interrupts = <0 83 4>;
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dma-coherent;
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calxeda,port-phys = <&combophy5 0 &combophy0 0
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&combophy0 1 &combophy0 2
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&combophy0 3>;
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};
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sdhci@ffe0e000 {
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compatible = "calxeda,hb-sdhci";
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reg = <0xffe0e000 0x1000>;
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interrupts = <0 90 4>;
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clocks = <&eclk>;
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status = "disabled";
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};
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memory-controller@fff00000 {
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compatible = "calxeda,hb-ddr-ctrl";
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reg = <0xfff00000 0x1000>;
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interrupts = <0 91 4>;
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};
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ipc@fff20000 {
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compatible = "arm,pl320", "arm,primecell";
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reg = <0xfff20000 0x1000>;
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interrupts = <0 7 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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gpioe: gpio@fff30000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfff30000 0x1000>;
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interrupts = <0 14 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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gpiof: gpio@fff31000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfff31000 0x1000>;
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interrupts = <0 15 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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gpiog: gpio@fff32000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfff32000 0x1000>;
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interrupts = <0 16 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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gpioh: gpio@fff33000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfff33000 0x1000>;
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interrupts = <0 17 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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timer@fff34000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0xfff34000 0x1000>;
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interrupts = <0 18 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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rtc@fff35000 {
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compatible = "arm,pl031", "arm,primecell";
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reg = <0xfff35000 0x1000>;
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interrupts = <0 19 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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serial@fff36000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xfff36000 0x1000>;
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interrupts = <0 20 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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smic@fff3a000 {
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compatible = "ipmi-smic";
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device_type = "ipmi";
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reg = <0xfff3a000 0x1000>;
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interrupts = <0 24 4>;
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reg-size = <4>;
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reg-spacing = <4>;
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};
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sregs@fff3c000 {
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compatible = "calxeda,hb-sregs";
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reg = <0xfff3c000 0x1000>;
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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osc: oscillator {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <33333000>;
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};
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ddrpll: ddrpll {
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#clock-cells = <0>;
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compatible = "calxeda,hb-pll-clock";
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clocks = <&osc>;
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reg = <0x108>;
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};
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a9pll: a9pll {
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#clock-cells = <0>;
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compatible = "calxeda,hb-pll-clock";
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clocks = <&osc>;
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reg = <0x100>;
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};
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a9periphclk: a9periphclk {
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#clock-cells = <0>;
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compatible = "calxeda,hb-a9periph-clock";
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clocks = <&a9pll>;
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reg = <0x104>;
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};
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a9bclk: a9bclk {
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#clock-cells = <0>;
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compatible = "calxeda,hb-a9bus-clock";
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clocks = <&a9pll>;
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reg = <0x104>;
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};
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emmcpll: emmcpll {
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#clock-cells = <0>;
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compatible = "calxeda,hb-pll-clock";
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clocks = <&osc>;
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reg = <0x10C>;
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};
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eclk: eclk {
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#clock-cells = <0>;
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compatible = "calxeda,hb-emmc-clock";
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clocks = <&emmcpll>;
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reg = <0x114>;
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};
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pclk: pclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <150000000>;
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};
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};
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};
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dma@fff3d000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0xfff3d000 0x1000>;
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interrupts = <0 92 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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ethernet@fff50000 {
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compatible = "calxeda,hb-xgmac";
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reg = <0xfff50000 0x1000>;
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interrupts = <0 77 4 0 78 4 0 79 4>;
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dma-coherent;
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};
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ethernet@fff51000 {
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compatible = "calxeda,hb-xgmac";
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reg = <0xfff51000 0x1000>;
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interrupts = <0 80 4 0 81 4 0 82 4>;
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dma-coherent;
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};
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combophy0: combo-phy@fff58000 {
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compatible = "calxeda,hb-combophy";
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#phy-cells = <1>;
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reg = <0xfff58000 0x1000>;
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phydev = <5>;
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};
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combophy5: combo-phy@fff5d000 {
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compatible = "calxeda,hb-combophy";
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#phy-cells = <1>;
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reg = <0xfff5d000 0x1000>;
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phydev = <31>;
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};
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};
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};
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@ -69,16 +69,8 @@ memory {
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reg = <0x00000000 0xff900000>;
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};
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chosen {
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bootargs = "console=ttyAMA0";
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&intc>;
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ranges;
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ranges = <0x00000000 0x00000000 0xffffffff>;
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timer@fff10600 {
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compatible = "arm,cortex-a9-twd-timer";
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@ -117,178 +109,6 @@ pmu {
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interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>;
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};
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sata@ffe08000 {
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compatible = "calxeda,hb-ahci";
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reg = <0xffe08000 0x10000>;
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interrupts = <0 83 4>;
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calxeda,port-phys = <&combophy5 0 &combophy0 0
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&combophy0 1 &combophy0 2
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&combophy0 3>;
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dma-coherent;
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};
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sdhci@ffe0e000 {
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compatible = "calxeda,hb-sdhci";
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reg = <0xffe0e000 0x1000>;
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interrupts = <0 90 4>;
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clocks = <&eclk>;
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status = "disabled";
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};
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memory-controller@fff00000 {
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compatible = "calxeda,hb-ddr-ctrl";
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reg = <0xfff00000 0x1000>;
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interrupts = <0 91 4>;
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};
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ipc@fff20000 {
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compatible = "arm,pl320", "arm,primecell";
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reg = <0xfff20000 0x1000>;
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interrupts = <0 7 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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gpioe: gpio@fff30000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfff30000 0x1000>;
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interrupts = <0 14 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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gpiof: gpio@fff31000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfff31000 0x1000>;
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interrupts = <0 15 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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gpiog: gpio@fff32000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfff32000 0x1000>;
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interrupts = <0 16 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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gpioh: gpio@fff33000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0xfff33000 0x1000>;
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interrupts = <0 17 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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timer {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0xfff34000 0x1000>;
|
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interrupts = <0 18 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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rtc@fff35000 {
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compatible = "arm,pl031", "arm,primecell";
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reg = <0xfff35000 0x1000>;
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interrupts = <0 19 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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serial@fff36000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0xfff36000 0x1000>;
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interrupts = <0 20 4>;
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clocks = <&pclk>;
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clock-names = "apb_pclk";
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};
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smic@fff3a000 {
|
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compatible = "ipmi-smic";
|
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device_type = "ipmi";
|
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reg = <0xfff3a000 0x1000>;
|
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interrupts = <0 24 4>;
|
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reg-size = <4>;
|
||||
reg-spacing = <4>;
|
||||
};
|
||||
|
||||
sregs@fff3c000 {
|
||||
compatible = "calxeda,hb-sregs";
|
||||
reg = <0xfff3c000 0x1000>;
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
osc: oscillator {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <33333000>;
|
||||
};
|
||||
|
||||
ddrpll: ddrpll {
|
||||
#clock-cells = <0>;
|
||||
compatible = "calxeda,hb-pll-clock";
|
||||
clocks = <&osc>;
|
||||
reg = <0x108>;
|
||||
};
|
||||
|
||||
a9pll: a9pll {
|
||||
#clock-cells = <0>;
|
||||
compatible = "calxeda,hb-pll-clock";
|
||||
clocks = <&osc>;
|
||||
reg = <0x100>;
|
||||
};
|
||||
|
||||
a9periphclk: a9periphclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "calxeda,hb-a9periph-clock";
|
||||
clocks = <&a9pll>;
|
||||
reg = <0x104>;
|
||||
};
|
||||
|
||||
a9bclk: a9bclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "calxeda,hb-a9bus-clock";
|
||||
clocks = <&a9pll>;
|
||||
reg = <0x104>;
|
||||
};
|
||||
|
||||
emmcpll: emmcpll {
|
||||
#clock-cells = <0>;
|
||||
compatible = "calxeda,hb-pll-clock";
|
||||
clocks = <&osc>;
|
||||
reg = <0x10C>;
|
||||
};
|
||||
|
||||
eclk: eclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "calxeda,hb-emmc-clock";
|
||||
clocks = <&emmcpll>;
|
||||
reg = <0x114>;
|
||||
};
|
||||
|
||||
pclk: pclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <150000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sregs@fff3c200 {
|
||||
compatible = "calxeda,hb-sregs-l2-ecc";
|
||||
|
|
@ -296,40 +116,7 @@ sregs@fff3c200 {
|
|||
interrupts = <0 71 4 0 72 4>;
|
||||
};
|
||||
|
||||
dma@fff3d000 {
|
||||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0xfff3d000 0x1000>;
|
||||
interrupts = <0 92 4>;
|
||||
clocks = <&pclk>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
ethernet@fff50000 {
|
||||
compatible = "calxeda,hb-xgmac";
|
||||
reg = <0xfff50000 0x1000>;
|
||||
interrupts = <0 77 4 0 78 4 0 79 4>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
ethernet@fff51000 {
|
||||
compatible = "calxeda,hb-xgmac";
|
||||
reg = <0xfff51000 0x1000>;
|
||||
interrupts = <0 80 4 0 81 4 0 82 4>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
combophy0: combo-phy@fff58000 {
|
||||
compatible = "calxeda,hb-combophy";
|
||||
#phy-cells = <1>;
|
||||
reg = <0xfff58000 0x1000>;
|
||||
phydev = <5>;
|
||||
};
|
||||
|
||||
combophy5: combo-phy@fff5d000 {
|
||||
compatible = "calxeda,hb-combophy";
|
||||
#phy-cells = <1>;
|
||||
reg = <0xfff5d000 0x1000>;
|
||||
phydev = <31>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "ecx-common.dtsi"
|
||||
|
|
|
|||
Loading…
Reference in New Issue