mirror of https://gitee.com/openkylin/linux.git
ARM: EXYNOS: Clear SYS_WDTRESET bit to use watchdog reset
When SYS_WDTRESET is set, watchdog timer reset request is ignored by power management unit. Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -232,6 +232,11 @@
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#define EXYNOS5_USB_CFG S5P_PMUREG(0x0230)
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#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
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#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
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#define EXYNOS5_SYS_WDTRESET (1 << 20)
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#define EXYNOS5_ARM_CORE0_SYS_PWR_REG S5P_PMUREG(0x1000)
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#define EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG S5P_PMUREG(0x1004)
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#define EXYNOS5_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG S5P_PMUREG(0x1008)
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@ -390,6 +390,8 @@ void exynos_sys_powerdown_conf(enum sys_powerdown mode)
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static int __init exynos_pmu_init(void)
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{
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unsigned int value;
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exynos_pmu_config = exynos4210_pmu_config;
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if (soc_is_exynos4210()) {
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@ -399,6 +401,18 @@ static int __init exynos_pmu_init(void)
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exynos_pmu_config = exynos4x12_pmu_config;
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pr_info("EXYNOS4x12 PMU Initialize\n");
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} else if (soc_is_exynos5250()) {
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/*
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* When SYS_WDTRESET is set, watchdog timer reset request
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* is ignored by power management unit.
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*/
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value = __raw_readl(EXYNOS5_AUTO_WDTRESET_DISABLE);
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value &= ~EXYNOS5_SYS_WDTRESET;
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__raw_writel(value, EXYNOS5_AUTO_WDTRESET_DISABLE);
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value = __raw_readl(EXYNOS5_MASK_WDTRESET_REQUEST);
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value &= ~EXYNOS5_SYS_WDTRESET;
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__raw_writel(value, EXYNOS5_MASK_WDTRESET_REQUEST);
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exynos_pmu_config = exynos5250_pmu_config;
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pr_info("EXYNOS5250 PMU Initialize\n");
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} else {
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