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Merge branch 'v3.4-next/devel-samsung-rtc' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers 

* 'v3.4-next/devel-samsung-rtc' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices
  rtc-s3c: add variants for S3C2443 and S3C2416
  rtc-s3c: make room for more variants in devicetree block
  ARM: SAMSUNG: cleanup of rtc register definitions
This commit is contained in:
Arnd Bergmann 2012-02-13 06:01:37 +00:00
parent ac819a86a7 b2994d318d
commit 7dae8c5209
5 changed files with 131 additions and 52 deletions
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2
arch/arm/mach-s3c2416/s3c2416.c
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@ -59,6 +59,7 @@
#include <plat/fb-core.h>
#include <plat/nand-core.h>
#include <plat/adc-core.h>
#include <plat/rtc-core.h>
static struct map_desc s3c2416_iodesc[] __initdata = {
IODESC_ENT(WATCHDOG),
@ -98,6 +99,7 @@ int __init s3c2416_init(void)
s3c_fb_setname("s3c2443-fb");
s3c_adc_setname("s3c2416-adc");
s3c_rtc_setname("s3c2416-rtc");
#ifdef CONFIG_PM
register_syscore_ops(&s3c2416_pm_syscore_ops);

2
arch/arm/mach-s3c2443/s3c2443.c
View File

@ -41,6 +41,7 @@
#include <plat/fb-core.h>
#include <plat/nand-core.h>
#include <plat/adc-core.h>
#include <plat/rtc-core.h>
static struct map_desc s3c2443_iodesc[] __initdata = {
IODESC_ENT(WATCHDOG),
@ -73,6 +74,7 @@ int __init s3c2443_init(void)
s3c_fb_setname("s3c2443-fb");
s3c_adc_setname("s3c2443-adc");
s3c_rtc_setname("s3c2443-rtc");
/* change WDT IRQ number */
s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;

81
arch/arm/plat-samsung/include/plat/regs-rtc.h
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@ -18,51 +18,54 @@
#define S3C2410_INTP_ALM (1 << 1)
#define S3C2410_INTP_TIC (1 << 0)
#define S3C2410_RTCCON S3C2410_RTCREG(0x40)
#define S3C2410_RTCCON_RTCEN (1<<0)
#define S3C2410_RTCCON_CLKSEL (1<<1)
#define S3C2410_RTCCON_CNTSEL (1<<2)
#define S3C2410_RTCCON_CLKRST (1<<3)
#define S3C64XX_RTCCON_TICEN (1<<8)
#define S3C2410_RTCCON S3C2410_RTCREG(0x40)
#define S3C2410_RTCCON_RTCEN (1 << 0)
#define S3C2410_RTCCON_CNTSEL (1 << 2)
#define S3C2410_RTCCON_CLKRST (1 << 3)
#define S3C2443_RTCCON_TICSEL (1 << 4)
#define S3C64XX_RTCCON_TICEN (1 << 8)
#define S3C64XX_RTCCON_TICMSK (0xF<<7)
#define S3C64XX_RTCCON_TICSHT (7)
#define S3C2410_TICNT S3C2410_RTCREG(0x44)
#define S3C2410_TICNT_ENABLE (1 << 7)
#define S3C2410_TICNT S3C2410_RTCREG(0x44)
#define S3C2410_TICNT_ENABLE (1<<7)
/* S3C2443: tick count is 15 bit wide
* TICNT[6:0] contains upper 7 bits
* TICNT1[7:0] contains lower 8 bits
*/
#define S3C2443_TICNT_PART(x) ((x & 0x7f00) >> 8)
#define S3C2443_TICNT1 S3C2410_RTCREG(0x4C)
#define S3C2443_TICNT1_PART(x) (x & 0xff)
#define S3C2410_RTCALM S3C2410_RTCREG(0x50)
#define S3C2410_RTCALM_ALMEN (1<<6)
#define S3C2410_RTCALM_YEAREN (1<<5)
#define S3C2410_RTCALM_MONEN (1<<4)
#define S3C2410_RTCALM_DAYEN (1<<3)
#define S3C2410_RTCALM_HOUREN (1<<2)
#define S3C2410_RTCALM_MINEN (1<<1)
#define S3C2410_RTCALM_SECEN (1<<0)
/* S3C2416: tick count is 32 bit wide
* TICNT[6:0] contains bits [14:8]
* TICNT1[7:0] contains lower 8 bits
* TICNT2[16:0] contains upper 17 bits
*/
#define S3C2416_TICNT2 S3C2410_RTCREG(0x48)
#define S3C2416_TICNT2_PART(x) ((x & 0xffff8000) >> 15)
#define S3C2410_RTCALM_ALL \
S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
S3C2410_RTCALM_SECEN
#define S3C2410_RTCALM S3C2410_RTCREG(0x50)
#define S3C2410_RTCALM_ALMEN (1 << 6)
#define S3C2410_RTCALM_YEAREN (1 << 5)
#define S3C2410_RTCALM_MONEN (1 << 4)
#define S3C2410_RTCALM_DAYEN (1 << 3)
#define S3C2410_RTCALM_HOUREN (1 << 2)
#define S3C2410_RTCALM_MINEN (1 << 1)
#define S3C2410_RTCALM_SECEN (1 << 0)
#define S3C2410_ALMSEC S3C2410_RTCREG(0x54)
#define S3C2410_ALMMIN S3C2410_RTCREG(0x58)
#define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c)
#define S3C2410_ALMSEC S3C2410_RTCREG(0x54)
#define S3C2410_ALMMIN S3C2410_RTCREG(0x58)
#define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c)
#define S3C2410_ALMDATE S3C2410_RTCREG(0x60)
#define S3C2410_ALMMON S3C2410_RTCREG(0x64)
#define S3C2410_ALMYEAR S3C2410_RTCREG(0x68)
#define S3C2410_RTCRST S3C2410_RTCREG(0x6c)
#define S3C2410_RTCSEC S3C2410_RTCREG(0x70)
#define S3C2410_RTCMIN S3C2410_RTCREG(0x74)
#define S3C2410_RTCHOUR S3C2410_RTCREG(0x78)
#define S3C2410_RTCDATE S3C2410_RTCREG(0x7c)
#define S3C2410_RTCDAY S3C2410_RTCREG(0x80)
#define S3C2410_RTCMON S3C2410_RTCREG(0x84)
#define S3C2410_RTCYEAR S3C2410_RTCREG(0x88)
#define S3C2410_ALMDATE S3C2410_RTCREG(0x60)
#define S3C2410_ALMMON S3C2410_RTCREG(0x64)
#define S3C2410_ALMYEAR S3C2410_RTCREG(0x68)
#define S3C2410_RTCSEC S3C2410_RTCREG(0x70)
#define S3C2410_RTCMIN S3C2410_RTCREG(0x74)
#define S3C2410_RTCHOUR S3C2410_RTCREG(0x78)
#define S3C2410_RTCDATE S3C2410_RTCREG(0x7c)
#define S3C2410_RTCMON S3C2410_RTCREG(0x84)
#define S3C2410_RTCYEAR S3C2410_RTCREG(0x88)
#endif /* __ASM_ARCH_REGS_RTC_H */

27
arch/arm/plat-samsung/include/plat/rtc-core.h Normal file
View File

@ -0,0 +1,27 @@
/* linux/arch/arm/plat-samsung/include/plat/rtc-core.h
*
* Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de>
*
* Samsung RTC Controller core functions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_PLAT_RTC_CORE_H
#define __ASM_PLAT_RTC_CORE_H __FILE__
/* These functions are only for use with the core support code, such as
* the cpu specific initialisation code
*/
/* re-define device name depending on support. */
static inline void s3c_rtc_setname(char *name)
{
#if defined(CONFIG_SAMSUNG_DEV_RTC) || defined(CONFIG_PLAT_S3C24XX)
s3c_device_rtc.name = name;
#endif
}
#endif /* __ASM_PLAT_RTC_CORE_H */

71
drivers/rtc/rtc-s3c.c
View File

@ -35,6 +35,8 @@
enum s3c_cpu_type {
TYPE_S3C2410,
TYPE_S3C2416,
TYPE_S3C2443,
TYPE_S3C64XX,
};
@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
struct platform_device *pdev = to_platform_device(dev);
struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
unsigned int tmp = 0;
int val;
if (!is_power_of_2(freq))
return -EINVAL;
@ -139,12 +142,22 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
clk_enable(rtc_clk);
spin_lock_irq(&s3c_rtc_pie_lock);
if (s3c_rtc_cpu_type == TYPE_S3C2410) {
if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
tmp = readb(s3c_rtc_base + S3C2410_TICNT);
tmp &= S3C2410_TICNT_ENABLE;
}
tmp |= (rtc_dev->max_user_freq / freq)-1;
val = (rtc_dev->max_user_freq / freq) - 1;
if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
tmp |= S3C2443_TICNT_PART(val);
writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
if (s3c_rtc_cpu_type == TYPE_S3C2416)
writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
} else {
tmp |= val;
}
writel(tmp, s3c_rtc_base + S3C2410_TICNT);
spin_unlock_irq(&s3c_rtc_pie_lock);
@ -371,7 +384,7 @@ static void s3c_rtc_enable(struct platform_device *pdev, int en)
tmp &= ~S3C2410_RTCCON_RTCEN;
writew(tmp, base + S3C2410_RTCCON);
if (s3c_rtc_cpu_type == TYPE_S3C2410) {
if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
tmp = readb(base + S3C2410_TICNT);
tmp &= ~S3C2410_TICNT_ENABLE;
writeb(tmp, base + S3C2410_TICNT);
@ -428,12 +441,27 @@ static int __devexit s3c_rtc_remove(struct platform_device *dev)
return 0;
}
static const struct of_device_id s3c_rtc_dt_match[];
static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
{
#ifdef CONFIG_OF
if (pdev->dev.of_node) {
const struct of_device_id *match;
match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
return match->data;
}
#endif
return platform_get_device_id(pdev)->driver_data;
}
static int __devinit s3c_rtc_probe(struct platform_device *pdev)
{
struct rtc_device *rtc;
struct rtc_time rtc_tm;
struct resource *res;
int ret;
int tmp;
pr_debug("%s: probe=%p\n", __func__, pdev);
@ -508,13 +536,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
goto err_nortc;
}
#ifdef CONFIG_OF
if (pdev->dev.of_node)
s3c_rtc_cpu_type = of_device_is_compatible(pdev->dev.of_node,
"samsung,s3c6410-rtc") ? TYPE_S3C64XX : TYPE_S3C2410;
else
#endif
s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
/* Check RTC Time */
@ -533,11 +555,17 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
}
if (s3c_rtc_cpu_type == TYPE_S3C64XX)
if (s3c_rtc_cpu_type != TYPE_S3C2410)
rtc->max_user_freq = 32768;
else
rtc->max_user_freq = 128;
if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
tmp |= S3C2443_RTCCON_TICSEL;
writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
}
platform_set_drvdata(pdev, rtc);
s3c_rtc_setfreq(&pdev->dev, 1);
@ -638,8 +666,19 @@ static int s3c_rtc_resume(struct platform_device *pdev)
#ifdef CONFIG_OF
static const struct of_device_id s3c_rtc_dt_match[] = {
{ .compatible = "samsung,s3c2410-rtc" },
{ .compatible = "samsung,s3c6410-rtc" },
{
.compatible = "samsung,s3c2410-rtc"
.data = TYPE_S3C2410,
}, {
.compatible = "samsung,s3c2416-rtc"
.data = TYPE_S3C2416,
}, {
.compatible = "samsung,s3c2443-rtc"
.data = TYPE_S3C2443,
}, {
.compatible = "samsung,s3c6410-rtc"
.data = TYPE_S3C64XX,
},
{},
};
MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
@ -651,6 +690,12 @@ static struct platform_device_id s3c_rtc_driver_ids[] = {
{
.name = "s3c2410-rtc",
.driver_data = TYPE_S3C2410,
}, {
.name = "s3c2416-rtc",
.driver_data = TYPE_S3C2416,
}, {
.name = "s3c2443-rtc",
.driver_data = TYPE_S3C2443,
}, {
.name = "s3c64xx-rtc",
.driver_data = TYPE_S3C64XX,