drm/nouveau/disp/g94-: port OR DP link setup to nvkm_ior

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c

@@ -240,12 +240,14 @@ nvkm_dp_train_links(struct nvkm_dp *dp)
 		nvbios_exec(&init);
 	}
 
-	ret = dp->func->lnk_ctl(dp, ior->dp.nr, ior->dp.bw, ior->dp.ef);
+	ret = ior->func->dp.links(ior, dp->aux);
 	if (ret) {
-		if (ret < 0)
+		if (ret < 0) {
-			OUTP_ERR(&dp->outp, "lnk_ctl failed with %d", ret);
+			OUTP_ERR(&dp->outp, "train failed with %d", ret);
 			return ret;
 		}
+		return 0;
+	}
 
 	dp->func->lnk_pwr(dp, ior->dp.nr);
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h

@@ -35,7 +35,6 @@ struct nvkm_dp {
 struct nvkm_output_dp_func {
 	int (*pattern)(struct nvkm_output_dp *, int);
 	int (*lnk_pwr)(struct nvkm_output_dp *, int nr);
-	int (*lnk_ctl)(struct nvkm_output_dp *, int nr, int bw, bool ef);
 	int (*drv_ctl)(struct nvkm_output_dp *, int ln, int vs, int pe, int pc);
 	void (*vcpi)(struct nvkm_output_dp *, int head, u8 start_slot,
 		     u8 num_slots, u16 pbn, u16 aligned_pbn);
@@ -55,7 +54,6 @@ int g94_sor_dp_lnk_pwr(struct nvkm_dp *, int);
 
 int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
 		     struct nvkm_output **);
-int gf119_sor_dp_lnk_ctl(struct nvkm_dp *, int, int, bool);
 int gf119_sor_dp_drv_ctl(struct nvkm_dp *, int, int, int, int);
 void gf119_sor_dp_vcpi(struct nvkm_dp *, int, u8, u8, u16, u16);
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h

@@ -1,6 +1,7 @@
 #ifndef __NVKM_DISP_IOR_H__
 #define __NVKM_DISP_IOR_H__
 #include "priv.h"
+struct nvkm_i2c_aux;
 
 struct nvkm_ior {
 	const struct nvkm_ior_func *func;
@@ -52,6 +53,7 @@ struct nvkm_ior_func {
 
 	struct {
 		u8 lanes[4];
+		int (*links)(struct nvkm_ior *, struct nvkm_i2c_aux *);
 	} dp;
 };
 
@@ -69,11 +71,20 @@ nv50_ior_base(struct nvkm_ior *ior)
 void nv50_dac_power(struct nvkm_ior *, bool, bool, bool, bool, bool);
 int nv50_dac_sense(struct nvkm_ior *, u32);
 
+static inline u32
+nv50_sor_link(struct nvkm_ior *ior)
+{
+	return nv50_ior_base(ior) + ((ior->asy.link == 2) * 0x80);
+}
+
 void nv50_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
 void nv50_sor_power(struct nvkm_ior *, bool, bool, bool, bool, bool);
 
 void g94_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
+int g94_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
+
 void gf119_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
+int gf119_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
 
 void g84_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);
 void gt215_hdmi_ctrl(struct nvkm_ior *, int, bool, u8, u8, u8 *, u8 , u8 *, u8);

drivers/gpu/drm/nouveau/nvkm/engine/disp/piornv50.c

@@ -58,10 +58,10 @@ nv50_pior_output_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
 }
 
 static int
-nv50_pior_output_dp_lnk_ctl(struct nvkm_output_dp *outp,
+nv50_pior_dp_links(struct nvkm_ior *pior, struct nvkm_i2c_aux *aux)
-			    int nr, int bw, bool ef)
 {
-	int ret = nvkm_i2c_aux_lnk_ctl(outp->aux, nr, bw, ef);
+	int ret = nvkm_i2c_aux_lnk_ctl(aux, pior->dp.nr, pior->dp.bw,
+					    pior->dp.ef);
 	if (ret)
 		return ret;
 	return 1;
@@ -71,7 +71,6 @@ static const struct nvkm_output_dp_func
 nv50_pior_output_dp_func = {
 	.pattern = nv50_pior_output_dp_pattern,
 	.lnk_pwr = nv50_pior_output_dp_lnk_pwr,
-	.lnk_ctl = nv50_pior_output_dp_lnk_ctl,
 };
 
 int
@@ -129,6 +128,9 @@ static const struct nvkm_ior_func
 nv50_pior = {
 	.state = nv50_pior_state,
 	.power = nv50_pior_power,
+	.dp = {
+		.links = nv50_pior_dp_links,
+	},
 };
 
 int

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c

@@ -110,19 +110,19 @@ g94_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
 	return 0;
 }
 
-static int
+int
-g94_sor_dp_lnk_ctl(struct nvkm_output_dp *outp, int nr, int bw, bool ef)
+g94_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)
 {
-	struct nvkm_device *device = outp->base.disp->engine.subdev.device;
+	struct nvkm_device *device = sor->disp->engine.subdev.device;
-	const u32 soff = g94_sor_soff(outp);
+	const u32 soff = nv50_ior_base(sor);
-	const u32 loff = g94_sor_loff(outp);
+	const u32 loff = nv50_sor_link(sor);
 	u32 dpctrl = 0x00000000;
 	u32 clksor = 0x00000000;
 
-	dpctrl |= ((1 << nr) - 1) << 16;
+	dpctrl |= ((1 << sor->dp.nr) - 1) << 16;
-	if (ef)
+	if (sor->dp.ef)
 		dpctrl |= 0x00004000;
-	if (bw > 0x06)
+	if (sor->dp.bw > 0x06)
 		clksor |= 0x00040000;
 
 	nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor);
@@ -134,7 +134,6 @@ static const struct nvkm_output_dp_func
 g94_sor_dp_func = {
 	.pattern = g94_sor_dp_pattern,
 	.lnk_pwr = g94_sor_dp_lnk_pwr,
-	.lnk_ctl = g94_sor_dp_lnk_ctl,
 	.drv_ctl = g94_sor_dp_drv_ctl,
 };
 
@@ -300,6 +299,7 @@ g94_sor = {
 	.power = nv50_sor_power,
 	.dp = {
 		.lanes = { 2, 1, 0, 3},
+		.links = g94_sor_dp_links,
 	},
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c

@@ -94,19 +94,19 @@ gf119_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
 }
 
 int
-gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *outp, int nr, int bw, bool ef)
+gf119_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)
 {
-	struct nvkm_device *device = outp->base.disp->engine.subdev.device;
+	struct nvkm_device *device = sor->disp->engine.subdev.device;
-	const u32 soff = gf119_sor_soff(outp);
+	const u32 soff = nv50_ior_base(sor);
-	const u32 loff = gf119_sor_loff(outp);
+	const u32 loff = nv50_sor_link(sor);
 	u32 dpctrl = 0x00000000;
 	u32 clksor = 0x00000000;
 
-	clksor |= bw << 18;
+	clksor |= sor->dp.bw << 18;
-	dpctrl |= ((1 << nr) - 1) << 16;
+	dpctrl |= ((1 << sor->dp.nr) - 1) << 16;
-	if (outp->lt.mst)
+	if (sor->dp.mst)
 		dpctrl |= 0x40000000;
-	if (ef)
+	if (sor->dp.ef)
 		dpctrl |= 0x00004000;
 
 	nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor);
@@ -118,7 +118,6 @@ static const struct nvkm_output_dp_func
 gf119_sor_dp_func = {
 	.pattern = gf119_sor_dp_pattern,
 	.lnk_pwr = g94_sor_dp_lnk_pwr,
-	.lnk_ctl = gf119_sor_dp_lnk_ctl,
 	.drv_ctl = gf119_sor_dp_drv_ctl,
 	.vcpi = gf119_sor_dp_vcpi,
 };
@@ -162,6 +161,7 @@ gf119_sor = {
 	},
 	.dp = {
 		.lanes = { 2, 1, 0, 3 },
+		.links = gf119_sor_dp_links,
 	},
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgk104.c

@@ -30,6 +30,7 @@ gk104_sor = {
 	},
 	.dp = {
 		.lanes = { 2, 1, 0, 3 },
+		.links = gf119_sor_dp_links,
 	},
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c

@@ -41,7 +41,6 @@ static const struct nvkm_output_dp_func
 gm107_sor_dp_func = {
 	.pattern = gm107_sor_dp_pattern,
 	.lnk_pwr = g94_sor_dp_lnk_pwr,
-	.lnk_ctl = gf119_sor_dp_lnk_ctl,
 	.drv_ctl = gf119_sor_dp_drv_ctl,
 	.vcpi = gf119_sor_dp_vcpi,
 };
@@ -62,6 +61,7 @@ gm107_sor = {
 	},
 	.dp = {
 		.lanes = { 0, 1, 2, 3 },
+		.links = gf119_sor_dp_links,
 	},
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c

@@ -106,7 +106,6 @@ static const struct nvkm_output_dp_func
 gm200_sor_dp_func = {
 	.pattern = gm107_sor_dp_pattern,
 	.lnk_pwr = gm200_sor_dp_lnk_pwr,
-	.lnk_ctl = gf119_sor_dp_lnk_ctl,
 	.drv_ctl = gm200_sor_dp_drv_ctl,
 	.vcpi = gf119_sor_dp_vcpi,
 };
@@ -139,6 +138,7 @@ gm200_sor = {
 	},
 	.dp = {
 		.lanes = { 0, 1, 2, 3 },
+		.links = gf119_sor_dp_links,
 	},
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c

@@ -30,6 +30,7 @@ gt215_sor = {
 	},
 	.dp = {
 		.lanes = { 2, 1, 0, 3 },
+		.links = g94_sor_dp_links,
 	},
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp77.c

@@ -30,6 +30,7 @@ mcp77_sor = {
 	},
 	.dp = {
 		.lanes = { 2, 1, 0, 3},
+		.links = g94_sor_dp_links,
 	},
 };
 

drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp89.c

@@ -30,6 +30,7 @@ mcp89_sor = {
 	},
 	.dp = {
 		.lanes = { 3, 2, 1, 0 },
+		.links = g94_sor_dp_links,
 	},
 };