mirror of https://gitee.com/openkylin/linux.git
mtd: rawnand: qcom: use the ecc strength from device parameter
Currently the driver uses the ECC strength specified in DT. The QPIC/EBI2 NAND supports 4 or 8-bit ECC correction. The same kind of board can have different NAND parts so use the ECC strength from device parameters if it is not specified in DT. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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@ -2315,19 +2315,39 @@ static const struct mtd_ooblayout_ops qcom_nand_ooblayout_ops = {
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.free = qcom_nand_ooblayout_free,
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};
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static int
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qcom_nandc_calc_ecc_bytes(int step_size, int strength)
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{
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return strength == 4 ? 12 : 16;
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}
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NAND_ECC_CAPS_SINGLE(qcom_nandc_ecc_caps, qcom_nandc_calc_ecc_bytes,
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NANDC_STEP_SIZE, 4, 8);
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static int qcom_nand_host_setup(struct qcom_nand_host *host)
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{
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struct nand_chip *chip = &host->chip;
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struct mtd_info *mtd = nand_to_mtd(chip);
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struct nand_ecc_ctrl *ecc = &chip->ecc;
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struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
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int cwperpage, bad_block_byte;
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int cwperpage, bad_block_byte, ret;
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bool wide_bus;
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int ecc_mode = 1;
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/* controller only supports 512 bytes data steps */
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ecc->size = NANDC_STEP_SIZE;
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wide_bus = chip->options & NAND_BUSWIDTH_16 ? true : false;
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cwperpage = mtd->writesize / NANDC_STEP_SIZE;
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/*
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* Each CW has 4 available OOB bytes which will be protected with ECC
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* so remaining bytes can be used for ECC.
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*/
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ret = nand_ecc_choose_conf(chip, &qcom_nandc_ecc_caps,
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mtd->oobsize - (cwperpage * 4));
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if (ret) {
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dev_err(nandc->dev, "No valid ECC settings possible\n");
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return ret;
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}
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if (ecc->strength >= 8) {
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/* 8 bit ECC defaults to BCH ECC on all platforms */
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@ -2396,7 +2416,6 @@ static int qcom_nand_host_setup(struct qcom_nand_host *host)
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mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops);
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cwperpage = mtd->writesize / ecc->size;
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nandc->max_cwperpage = max_t(unsigned int, nandc->max_cwperpage,
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cwperpage);
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@ -2412,12 +2431,6 @@ static int qcom_nand_host_setup(struct qcom_nand_host *host)
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* for 8 bit ECC
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*/
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host->cw_size = host->cw_data + ecc->bytes;
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if (ecc->bytes * (mtd->writesize / ecc->size) > mtd->oobsize) {
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dev_err(nandc->dev, "ecc data doesn't fit in OOB area\n");
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return -EINVAL;
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}
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bad_block_byte = mtd->writesize - host->cw_size * (cwperpage - 1) + 1;
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host->cfg0 = (cwperpage - 1) << CW_PER_PAGE
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