mirror of https://gitee.com/openkylin/linux.git
KVM: x86 emulator: sort opcodes into ascending order
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
This commit is contained in:
Nitin A Kamble
Avi Kivity
parent
054b136967
commit
7de752482c
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@ -978,19 +978,8 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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dst.val = src.val;
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lock_prefix = 1;
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break;
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case 0xa0 ... 0xa1: /* mov */
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dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
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dst.val = src.val;
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_eip += ad_bytes; /* skip src displacement */
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break;
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case 0xa2 ... 0xa3: /* mov */
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dst.val = (unsigned long)_regs[VCPU_REGS_RAX];
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_eip += ad_bytes; /* skip dst displacement */
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break;
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case 0x88 ... 0x8b: /* mov */
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case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */
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dst.val = src.val;
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break;
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goto mov;
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case 0x8f: /* pop (sole member of Grp1a) */
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/* 64-bit mode: POP always pops a 64-bit operand. */
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if (mode == X86EMUL_MODE_PROT64)
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@ -1001,6 +990,15 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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goto done;
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register_address_increment(_regs[VCPU_REGS_RSP], dst.bytes);
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break;
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case 0xa0 ... 0xa1: /* mov */
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dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
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dst.val = src.val;
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_eip += ad_bytes; /* skip src displacement */
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break;
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case 0xa2 ... 0xa3: /* mov */
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dst.val = (unsigned long)_regs[VCPU_REGS_RAX];
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_eip += ad_bytes; /* skip dst displacement */
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break;
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case 0xc0 ... 0xc1:
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grp2: /* Grp2 */
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switch (modrm_reg) {
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@ -1028,6 +1026,10 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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break;
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}
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break;
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case 0xc6 ... 0xc7: /* mov (sole member of Grp11) */
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mov:
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dst.val = src.val;
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break;
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case 0xd0 ... 0xd1: /* Grp2 */
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src.val = 1;
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goto grp2;
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@ -1186,6 +1188,17 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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dst.ptr = (void *) register_address(
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ctxt->ss_base, _regs[VCPU_REGS_RSP]);
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break;
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case 0x58 ... 0x5f: /* pop reg */
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dst.ptr = (unsigned long *)&_regs[b & 0x7];
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pop_instruction:
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if ((rc = ops->read_std(register_address(ctxt->ss_base,
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_regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt->vcpu))
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!= 0)
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goto done;
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register_address_increment(_regs[VCPU_REGS_RSP], op_bytes);
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no_wb = 1; /* Disable writeback. */
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break;
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case 0x6c: /* insb */
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case 0x6d: /* insw/insd */
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if (kvm_emulate_pio_string(ctxt->vcpu, NULL,
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@ -1217,12 +1230,15 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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) == 0)
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return -1;
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return 0;
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case 0x9c: /* pushf */
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src.val = (unsigned long) _eflags;
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goto push;
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break;
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case 0xc3: /* ret */
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dst.ptr = &_eip;
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goto pop_instruction;
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case 0xf4: /* hlt */
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ctxt->vcpu->halt_request = 1;
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goto done;
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}
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if (rep_prefix) {
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if (_regs[VCPU_REGS_RCX] == 0) {
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@ -1271,24 +1287,7 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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case 0xae ... 0xaf: /* scas */
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DPRINTF("Urk! I don't handle SCAS.\n");
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goto cannot_emulate;
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case 0xf4: /* hlt */
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ctxt->vcpu->halt_request = 1;
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goto done;
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case 0xc3: /* ret */
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dst.ptr = &_eip;
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goto pop_instruction;
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case 0x58 ... 0x5f: /* pop reg */
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dst.ptr = (unsigned long *)&_regs[b & 0x7];
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pop_instruction:
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if ((rc = ops->read_std(register_address(ctxt->ss_base,
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_regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt->vcpu))
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!= 0)
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goto done;
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register_address_increment(_regs[VCPU_REGS_RSP], op_bytes);
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no_wb = 1; /* Disable writeback. */
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break;
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}
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goto writeback;
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@ -1382,6 +1381,16 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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/* Odd cmov opcodes (lsb == 1) have inverted sense. */
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no_wb ^= b & 1;
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break;
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case 0xa3:
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bt: /* bt */
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src.val &= (dst.bytes << 3) - 1; /* only subword offset */
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emulate_2op_SrcV_nobyte("bt", src, dst, _eflags);
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break;
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case 0xab:
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bts: /* bts */
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src.val &= (dst.bytes << 3) - 1; /* only subword offset */
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emulate_2op_SrcV_nobyte("bts", src, dst, _eflags);
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break;
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case 0xb0 ... 0xb1: /* cmpxchg */
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/*
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* Save real source value, then compare EAX against
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@ -1399,30 +1408,15 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX];
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}
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break;
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case 0xa3:
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bt: /* bt */
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src.val &= (dst.bytes << 3) - 1; /* only subword offset */
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emulate_2op_SrcV_nobyte("bt", src, dst, _eflags);
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break;
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case 0xb3:
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btr: /* btr */
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src.val &= (dst.bytes << 3) - 1; /* only subword offset */
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emulate_2op_SrcV_nobyte("btr", src, dst, _eflags);
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break;
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case 0xab:
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bts: /* bts */
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src.val &= (dst.bytes << 3) - 1; /* only subword offset */
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emulate_2op_SrcV_nobyte("bts", src, dst, _eflags);
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break;
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case 0xb6 ... 0xb7: /* movzx */
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dst.bytes = op_bytes;
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dst.val = (d & ByteOp) ? (u8) src.val : (u16) src.val;
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break;
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case 0xbb:
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btc: /* btc */
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src.val &= (dst.bytes << 3) - 1; /* only subword offset */
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emulate_2op_SrcV_nobyte("btc", src, dst, _eflags);
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break;
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case 0xba: /* Grp8 */
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switch (modrm_reg & 3) {
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case 0:
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@ -1435,6 +1429,11 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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goto btc;
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}
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break;
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case 0xbb:
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btc: /* btc */
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src.val &= (dst.bytes << 3) - 1; /* only subword offset */
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emulate_2op_SrcV_nobyte("btc", src, dst, _eflags);
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break;
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case 0xbe ... 0xbf: /* movsx */
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dst.bytes = op_bytes;
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dst.val = (d & ByteOp) ? (s8) src.val : (s16) src.val;
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@ -1446,14 +1445,14 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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/* Disable writeback. */
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no_wb = 1;
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switch (b) {
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case 0x06:
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emulate_clts(ctxt->vcpu);
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break;
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case 0x09: /* wbinvd */
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break;
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case 0x0d: /* GrpP (prefetch) */
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case 0x18: /* Grp16 (prefetch/nop) */
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break;
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case 0x06:
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emulate_clts(ctxt->vcpu);
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break;
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case 0x20: /* mov cr, reg */
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if (modrm_mod != 3)
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goto cannot_emulate;
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