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ARM: dts: Add DT for Hitex LPC4350 Evaluation Board
Add basic support for Hitex LPC4350 Evaluation Board. Board features a LPC4350 Soc, 8 MB SDRAM, 8 MB SPI Flash, USB and Ethernet. More information can be found on: http://www.hitex.com/index.php?id=3212 Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@gmail.com> Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -95,6 +95,7 @@ haoyu Haoyu Microelectronic Co. Ltd.
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himax Himax Technologies, Inc.
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hisilicon Hisilicon Limited.
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hit Hitachi Ltd.
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hitex Hitex Development Tools
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honeywell Honeywell
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hp Hewlett Packard
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i2se I2SE GmbH
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@ -208,6 +208,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
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kirkwood-ts419-6281.dtb \
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kirkwood-ts419-6282.dtb
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dtb-$(CONFIG_ARCH_LPC18XX) += \
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lpc4350-hitex-eval.dtb \
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lpc4357-ea4357-devkit.dtb
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dtb-$(CONFIG_ARCH_LPC32XX) += \
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ea3250.dtb phy3250.dtb
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@ -0,0 +1,45 @@
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/*
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* Hitex LPC4350 Evaluation Board
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*
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* Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
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*
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* This code is released using a dual license strategy: BSD/GPL
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* You can choose the licence that better fits your requirements.
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*
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* Released under the terms of 3-clause BSD License
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* Released under the terms of GNU General Public License Version 2.0
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*
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*/
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/dts-v1/;
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#include "lpc18xx.dtsi"
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#include "lpc4350.dtsi"
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/ {
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model = "Hitex LPC4350 Evaluation Board";
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compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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};
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chosen {
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stdout-path = &uart0;
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};
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memory {
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device_type = "memory";
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reg = <0x28000000 0x800000>; /* 8 MB */
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};
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};
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&pll1 {
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clock-mult = <15>;
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};
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&uart0 {
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status = "okay";
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};
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@ -0,0 +1,39 @@
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/*
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* NXP LPC4350 and LPC4330 SoC
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*
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* Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
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*
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* This code is released using a dual license strategy: BSD/GPL
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* You can choose the licence that better fits your requirements.
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*
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* Released under the terms of 3-clause BSD License
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* Released under the terms of GNU General Public License Version 2.0
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*
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*/
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/ {
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compatible = "nxp,lpc4350", "nxp,lpc4330";
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m4";
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};
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};
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soc {
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sram0: sram@10000000 {
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compatible = "mmio-sram";
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reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */
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};
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sram1: sram@10080000 {
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compatible = "mmio-sram";
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reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */
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};
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sram2: sram@20000000 {
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compatible = "mmio-sram";
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reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
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};
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};
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};
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