mirror of https://gitee.com/openkylin/linux.git
dt-bindings: arm: add Freescale LS1021A SoC device tree binding
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -74,3 +74,41 @@ Required root node properties:
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i.MX6q generic board
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Required root node properties:
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- compatible = "fsl,imx6q";
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Freescale LS1021A Platform Device Tree Bindings
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------------------------------------------------
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Required root node compatible properties:
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- compatible = "fsl,ls1021a";
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Freescale LS1021A SoC-specific Device Tree Bindings
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-------------------------------------------
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Freescale SCFG
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SCFG is the supplemental configuration unit, that provides SoC specific
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configuration and status registers for the chip. Such as getting PEX port
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status.
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Required properties:
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- compatible: should be "fsl,ls1021a-scfg"
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- reg: should contain base address and length of SCFG memory-mapped registers
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Example:
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scfg: scfg@1570000 {
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compatible = "fsl,ls1021a-scfg";
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reg = <0x0 0x1570000 0x0 0x10000>;
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};
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Freescale DCFG
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DCFG is the device configuration unit, that provides general purpose
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configuration and status for the device. Such as setting the secondary
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core start address and release the secondary core from holdoff and startup.
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Required properties:
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- compatible: should be "fsl,ls1021a-dcfg"
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- reg : should contain base address and length of DCFG memory-mapped registers
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Example:
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dcfg: dcfg@1ee0000 {
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compatible = "fsl,ls1021a-dcfg";
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reg = <0x0 0x1ee0000 0x0 0x10000>;
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};
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