mirror of https://gitee.com/openkylin/linux.git
KVM: arm64: Refactor vcpu_{read,write}_sys_reg
Extract the direct HW accessors for later reuse. Reviewed-by: James Morse <james.morse@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
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@ -64,11 +64,8 @@ static bool write_to_read_only(struct kvm_vcpu *vcpu,
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return false;
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}
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u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg)
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static bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val)
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{
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if (!vcpu->arch.sysregs_loaded_on_cpu)
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goto immediate_read;
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/*
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* System registers listed in the switch are not saved on every
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* exit from the guest but are only saved on vcpu_put.
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@ -79,40 +76,37 @@ u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg)
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* thread when emulating cross-VCPU communication.
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*/
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switch (reg) {
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case CSSELR_EL1: return read_sysreg_s(SYS_CSSELR_EL1);
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case SCTLR_EL1: return read_sysreg_s(SYS_SCTLR_EL12);
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case ACTLR_EL1: return read_sysreg_s(SYS_ACTLR_EL1);
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case CPACR_EL1: return read_sysreg_s(SYS_CPACR_EL12);
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case TTBR0_EL1: return read_sysreg_s(SYS_TTBR0_EL12);
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case TTBR1_EL1: return read_sysreg_s(SYS_TTBR1_EL12);
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case TCR_EL1: return read_sysreg_s(SYS_TCR_EL12);
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case ESR_EL1: return read_sysreg_s(SYS_ESR_EL12);
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case AFSR0_EL1: return read_sysreg_s(SYS_AFSR0_EL12);
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case AFSR1_EL1: return read_sysreg_s(SYS_AFSR1_EL12);
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case FAR_EL1: return read_sysreg_s(SYS_FAR_EL12);
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case MAIR_EL1: return read_sysreg_s(SYS_MAIR_EL12);
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case VBAR_EL1: return read_sysreg_s(SYS_VBAR_EL12);
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case CONTEXTIDR_EL1: return read_sysreg_s(SYS_CONTEXTIDR_EL12);
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case TPIDR_EL0: return read_sysreg_s(SYS_TPIDR_EL0);
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case TPIDRRO_EL0: return read_sysreg_s(SYS_TPIDRRO_EL0);
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case TPIDR_EL1: return read_sysreg_s(SYS_TPIDR_EL1);
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case AMAIR_EL1: return read_sysreg_s(SYS_AMAIR_EL12);
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case CNTKCTL_EL1: return read_sysreg_s(SYS_CNTKCTL_EL12);
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case PAR_EL1: return read_sysreg_s(SYS_PAR_EL1);
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case DACR32_EL2: return read_sysreg_s(SYS_DACR32_EL2);
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case IFSR32_EL2: return read_sysreg_s(SYS_IFSR32_EL2);
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case DBGVCR32_EL2: return read_sysreg_s(SYS_DBGVCR32_EL2);
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case CSSELR_EL1: *val = read_sysreg_s(SYS_CSSELR_EL1); break;
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case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break;
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case ACTLR_EL1: *val = read_sysreg_s(SYS_ACTLR_EL1); break;
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case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); break;
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case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); break;
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case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break;
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case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break;
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case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); break;
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case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); break;
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case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); break;
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case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); break;
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case MAIR_EL1: *val = read_sysreg_s(SYS_MAIR_EL12); break;
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case VBAR_EL1: *val = read_sysreg_s(SYS_VBAR_EL12); break;
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case CONTEXTIDR_EL1: *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break;
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case TPIDR_EL0: *val = read_sysreg_s(SYS_TPIDR_EL0); break;
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case TPIDRRO_EL0: *val = read_sysreg_s(SYS_TPIDRRO_EL0); break;
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case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break;
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case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break;
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case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break;
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case PAR_EL1: *val = read_sysreg_s(SYS_PAR_EL1); break;
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case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break;
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case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break;
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case DBGVCR32_EL2: *val = read_sysreg_s(SYS_DBGVCR32_EL2); break;
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default: return false;
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}
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immediate_read:
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return __vcpu_sys_reg(vcpu, reg);
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return true;
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}
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void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg)
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static bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg)
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{
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if (!vcpu->arch.sysregs_loaded_on_cpu)
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goto immediate_write;
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/*
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* System registers listed in the switch are not restored on every
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* entry to the guest but are only restored on vcpu_load.
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@ -122,32 +116,52 @@ void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg)
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* once, before running the VCPU, and never changed later.
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*/
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switch (reg) {
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case CSSELR_EL1: write_sysreg_s(val, SYS_CSSELR_EL1); return;
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case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); return;
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case ACTLR_EL1: write_sysreg_s(val, SYS_ACTLR_EL1); return;
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case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); return;
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case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); return;
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case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); return;
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case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); return;
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case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); return;
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case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); return;
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case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); return;
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case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); return;
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case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); return;
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case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); return;
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case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12); return;
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case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); return;
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case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); return;
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case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); return;
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case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); return;
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case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); return;
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case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); return;
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case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); return;
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case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); return;
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case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); return;
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case CSSELR_EL1: write_sysreg_s(val, SYS_CSSELR_EL1); break;
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case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break;
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case ACTLR_EL1: write_sysreg_s(val, SYS_ACTLR_EL1); break;
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case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break;
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case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break;
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case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break;
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case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break;
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case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break;
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case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break;
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case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break;
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case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break;
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case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break;
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case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); break;
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case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break;
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case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); break;
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case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); break;
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case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); break;
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case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); break;
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case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); break;
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case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); break;
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case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); break;
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case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); break;
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case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); break;
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default: return false;
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}
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immediate_write:
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return true;
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}
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u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, int reg)
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{
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u64 val = 0x8badf00d8badf00d;
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if (vcpu->arch.sysregs_loaded_on_cpu &&
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__vcpu_read_sys_reg_from_cpu(reg, &val))
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return val;
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return __vcpu_sys_reg(vcpu, reg);
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}
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void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, u64 val, int reg)
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{
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if (vcpu->arch.sysregs_loaded_on_cpu &&
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__vcpu_write_sys_reg_to_cpu(val, reg))
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return;
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__vcpu_sys_reg(vcpu, reg) = val;
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}
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