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memory: tegra20: Correct comment to MC_STAT registers writes 

The code was changed multiple times and the comment to MC_STAT
registers writes became slightly outdated. The MC_STAT programming
now isn't hardcoded to the "bandwidth" mode, let's clarify this in
the comment.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210323210446.24867-1-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
This commit is contained in:
Dmitry Osipenko 2021-03-24 00:04:45 +03:00 committed by Krzysztof Kozlowski
parent fbd31f5aa6
commit 7ebb09db5b
1 changed files with 2 additions and 3 deletions
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5
drivers/memory/tegra/tegra20.c
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@ -451,9 +451,8 @@ static void tegra20_mc_stat_gather(struct tegra20_mc_stat *stat)
control_1 = tegra20_mc_stat_gather_control(&stat->gather1);
/*
* Reset statistic gathers state, select bandwidth mode for the
* statistics collection mode and set clocks counter saturation
* limit to maximum.
* Reset statistic gathers state, select statistics collection mode
* and set clocks counter saturation limit to maximum.
*/
mc_writel(mc, 0x00000000, MC_STAT_CONTROL);
mc_writel(mc, control_0, MC_STAT_EMC_CONTROL_0);