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tty: amba-pl011: add support for ZTE UART (EXPERIMENTAL)
Add (incomplete) support for the ZTE UART to the AMBA PL011 driver. This is similar to the ARM and ST variants, except it has a different register address layout, and requires 32-bit accesses to the registers. Use the newly introduced register tables and access size support to cope with these differences. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Reviewed-by: Peter Hurley <peter@hurleysoftware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -171,6 +171,29 @@ static struct vendor_data vendor_st = {
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.get_fifosize = get_fifosize_st,
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};
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static const u16 pl011_zte_offsets[REG_ARRAY_SIZE] = {
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[REG_DR] = ZX_UART011_DR,
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[REG_FR] = ZX_UART011_FR,
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[REG_LCRH_RX] = ZX_UART011_LCRH,
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[REG_LCRH_TX] = ZX_UART011_LCRH,
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[REG_IBRD] = ZX_UART011_IBRD,
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[REG_FBRD] = ZX_UART011_FBRD,
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[REG_CR] = ZX_UART011_CR,
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[REG_IFLS] = ZX_UART011_IFLS,
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[REG_IMSC] = ZX_UART011_IMSC,
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[REG_RIS] = ZX_UART011_RIS,
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[REG_MIS] = ZX_UART011_MIS,
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[REG_ICR] = ZX_UART011_ICR,
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[REG_DMACR] = ZX_UART011_DMACR,
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};
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static struct vendor_data vendor_zte = {
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.reg_offset = pl011_zte_offsets,
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.access_32b = true,
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.ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8,
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.get_fifosize = get_fifosize_arm,
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};
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/* Deals with DMA transactions */
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struct pl011_sgbuf {
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@ -65,6 +65,24 @@
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#define ST_UART011_ABCR 0x100 /* Autobaud control register. */
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#define ST_UART011_ABIMSC 0x15C /* Autobaud interrupt mask/clear register. */
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/*
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* ZTE UART register offsets. This UART has a radically different address
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* allocation from the ARM and ST variants, so we list all registers here.
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* We assume unlisted registers do not exist.
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*/
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#define ZX_UART011_DR 0x04
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#define ZX_UART011_FR 0x14
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#define ZX_UART011_IBRD 0x24
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#define ZX_UART011_FBRD 0x28
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#define ZX_UART011_LCRH 0x30
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#define ZX_UART011_CR 0x34
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#define ZX_UART011_IFLS 0x38
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#define ZX_UART011_IMSC 0x40
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#define ZX_UART011_RIS 0x44
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#define ZX_UART011_MIS 0x48
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#define ZX_UART011_ICR 0x4c
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#define ZX_UART011_DMACR 0x50
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#define UART011_DR_OE (1 << 11)
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#define UART011_DR_BE (1 << 10)
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#define UART011_DR_PE (1 << 9)
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