mirror of https://gitee.com/openkylin/linux.git
clk: ingenic: Add support for clocks whose gate bit is inverted
Support the clocks which are gated when their gate bit is cleared instead of set. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -43,7 +43,8 @@ static inline bool
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ingenic_cgu_gate_get(struct ingenic_cgu *cgu,
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const struct ingenic_cgu_gate_info *info)
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{
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return readl(cgu->base + info->reg) & BIT(info->bit);
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return !!(readl(cgu->base + info->reg) & BIT(info->bit))
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^ info->clear_to_gate;
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}
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/**
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@ -62,7 +63,7 @@ ingenic_cgu_gate_set(struct ingenic_cgu *cgu,
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{
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u32 clkgr = readl(cgu->base + info->reg);
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if (val)
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if (val ^ info->clear_to_gate)
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clkgr |= BIT(info->bit);
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else
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clkgr &= ~BIT(info->bit);
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@ -111,10 +111,12 @@ struct ingenic_cgu_fixdiv_info {
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* struct ingenic_cgu_gate_info - information about a clock gate
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* @reg: offset of the gate control register within the CGU
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* @bit: offset of the bit in the register that controls the gate
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* @clear_to_gate: if set, the clock is gated when the bit is cleared
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*/
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struct ingenic_cgu_gate_info {
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unsigned reg;
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u8 bit;
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bool clear_to_gate;
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};
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/**
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