mirror of https://gitee.com/openkylin/linux.git
ppc/sandpoint: remove ppc_ide_md hooks
* Add IDE_HFLAG_FORCE_LEGACY_IRQS host flag for Motorola-Sandpoint platform to sl82c105 host driver. * Disable ide_generic host driver in arch/ppc/configs/sandpoint_defconfig and enable sl82c105 one. * Remove ppc_ide_md hooks from arch/ppc/platforms/sandpoint.c - no need for them (sl82c105 host driver takes care of all this setup). * Then remove no longer needed <linux/ide.h> include. * Also update arch/ppc/platforms/sandpoint.h. Unfortunately (unlike lopec's case) sl82c105 host driver was not enabled in defconfing so there is a funcionality change. [ Not a big deal since sl82c105 is superior over ide_generic. ] Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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@ -189,7 +189,7 @@ CONFIG_IDE_TASKFILE_IO=y
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#
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#
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# IDE chipset support/bugfixes
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# IDE chipset support/bugfixes
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#
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#
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CONFIG_IDE_GENERIC=y
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CONFIG_BLK_DEV_SL82C105=y
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# CONFIG_BLK_DEV_IDEPCI is not set
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# CONFIG_BLK_DEV_IDEPCI is not set
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# CONFIG_BLK_DEV_IDEDMA is not set
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# CONFIG_BLK_DEV_IDEDMA is not set
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# CONFIG_IDEDMA_AUTO is not set
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# CONFIG_IDEDMA_AUTO is not set
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@ -71,7 +71,6 @@
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#include <linux/initrd.h>
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#include <linux/initrd.h>
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#include <linux/console.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/ide.h>
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#include <linux/seq_file.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/root_dev.h>
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#include <linux/serial.h>
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#include <linux/serial.h>
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@ -559,93 +558,6 @@ sandpoint_show_cpuinfo(struct seq_file *m)
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return 0;
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return 0;
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}
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}
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#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
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/*
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* IDE support.
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*/
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static int sandpoint_ide_ports_known = 0;
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static unsigned long sandpoint_ide_regbase[MAX_HWIFS];
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static unsigned long sandpoint_ide_ctl_regbase[MAX_HWIFS];
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static unsigned long sandpoint_idedma_regbase;
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static void
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sandpoint_ide_probe(void)
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{
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struct pci_dev *pdev = pci_get_device(PCI_VENDOR_ID_WINBOND,
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PCI_DEVICE_ID_WINBOND_82C105, NULL);
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if (pdev) {
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sandpoint_ide_regbase[0]=pdev->resource[0].start;
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sandpoint_ide_regbase[1]=pdev->resource[2].start;
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sandpoint_ide_ctl_regbase[0]=pdev->resource[1].start;
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sandpoint_ide_ctl_regbase[1]=pdev->resource[3].start;
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sandpoint_idedma_regbase=pdev->resource[4].start;
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pci_dev_put(pdev);
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}
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sandpoint_ide_ports_known = 1;
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}
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static int
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sandpoint_ide_default_irq(unsigned long base)
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{
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if (sandpoint_ide_ports_known == 0)
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sandpoint_ide_probe();
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if (base == sandpoint_ide_regbase[0])
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return SANDPOINT_IDE_INT0;
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else if (base == sandpoint_ide_regbase[1])
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return SANDPOINT_IDE_INT1;
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else
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return 0;
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}
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static unsigned long
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sandpoint_ide_default_io_base(int index)
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{
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if (sandpoint_ide_ports_known == 0)
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sandpoint_ide_probe();
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return sandpoint_ide_regbase[index];
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}
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static void __init
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sandpoint_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
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unsigned long ctrl_port, int *irq)
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{
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unsigned long reg = data_port;
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uint alt_status_base;
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int i;
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for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
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hw->io_ports[i] = reg++;
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}
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if (data_port == sandpoint_ide_regbase[0]) {
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alt_status_base = sandpoint_ide_ctl_regbase[0] + 2;
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hw->irq = 14;
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}
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else if (data_port == sandpoint_ide_regbase[1]) {
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alt_status_base = sandpoint_ide_ctl_regbase[1] + 2;
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hw->irq = 15;
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}
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else {
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alt_status_base = 0;
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hw->irq = 0;
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}
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if (ctrl_port) {
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hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
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} else {
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hw->io_ports[IDE_CONTROL_OFFSET] = alt_status_base;
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}
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if (irq != NULL) {
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*irq = hw->irq;
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}
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}
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#endif
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/*
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/*
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* Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
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* Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
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*/
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*/
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@ -736,10 +648,4 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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#ifdef CONFIG_SERIAL_TEXT_DEBUG
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#ifdef CONFIG_SERIAL_TEXT_DEBUG
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ppc_md.progress = gen550_progress;
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ppc_md.progress = gen550_progress;
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#endif
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#endif
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#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
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ppc_ide_md.default_irq = sandpoint_ide_default_irq;
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ppc_ide_md.default_io_base = sandpoint_ide_default_io_base;
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ppc_ide_md.ide_init_hwif = sandpoint_ide_init_hwif_ports;
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#endif
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}
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}
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@ -28,9 +28,6 @@
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*/
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*/
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#define SANDPOINT_IDE_INT0 23 /* EPIC 7 */
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#define SANDPOINT_IDE_INT0 23 /* EPIC 7 */
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#define SANDPOINT_IDE_INT1 24 /* EPIC 8 */
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#define SANDPOINT_IDE_INT1 24 /* EPIC 8 */
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#else
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#define SANDPOINT_IDE_INT0 14 /* 8259 Test */
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#define SANDPOINT_IDE_INT1 15 /* 8259 Test */
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#endif
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#endif
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/*
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/*
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@ -329,7 +329,7 @@ static const struct ide_port_info sl82c105_chipset __devinitdata = {
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.host_flags = IDE_HFLAG_IO_32BIT |
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.host_flags = IDE_HFLAG_IO_32BIT |
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IDE_HFLAG_UNMASK_IRQS |
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IDE_HFLAG_UNMASK_IRQS |
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/* FIXME: check for Compatibility mode in generic IDE PCI code */
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/* FIXME: check for Compatibility mode in generic IDE PCI code */
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#ifdef CONFIG_LOPEC
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#if defined(CONFIG_LOPEC) || defined(CONFIG_SANDPOINT)
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IDE_HFLAG_FORCE_LEGACY_IRQS |
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IDE_HFLAG_FORCE_LEGACY_IRQS |
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#endif
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#endif
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IDE_HFLAG_NO_AUTODMA |
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IDE_HFLAG_NO_AUTODMA |
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