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drm/i915: reserve stolen for LMEM region 

The lmem region needs to remove the stolen part, which should just be a
case of snipping it off the end.

Signed-off-by: CQ Tang <cq.tang@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20210127131417.393872-3-matthew.auld@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
CQ Tang 2021-01-27 13:14:12 +00:00 committed by Daniel Vetter
parent a50ca39fbd
commit 7f2aa5b301
2 changed files with 12 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/gpu/drm/i915/gt/intel_region_lmem.c
View File

@ -146,20 +146,25 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
struct intel_uncore *uncore = gt->uncore;
struct pci_dev *pdev = i915->drm.pdev;
struct intel_memory_region *mem;
resource_size_t io_start;
resource_size_t size;
resource_size_t lmem_size;
if (!IS_DGFX(i915))
return ERR_PTR(-ENODEV);
/* Stolen starts from GSMBASE on DG1 */
lmem_size = intel_uncore_read64(uncore, GEN12_GSMBASE);
io_start = pci_resource_start(pdev, 2);
size = pci_resource_len(pdev, 2);
if (GEM_WARN_ON(lmem_size > pci_resource_len(pdev, 2)))
return ERR_PTR(-ENODEV);
mem = intel_memory_region_create(i915,
0,
size,
lmem_size,
I915_GTT_PAGE_SIZE_4K,
io_start,
&intel_region_lmem_ops);
@ -169,7 +174,8 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
drm_dbg(&i915->drm, "Local memory: %pR\n", &mem->region);
drm_dbg(&i915->drm, "Local memory IO start: %pa\n",
&mem->io_start);
drm_info(&i915->drm, "Local memory available: %pa\n", &size);
drm_info(&i915->drm, "Local memory available: %pa\n",
&lmem_size);
return mem;
}

2
drivers/gpu/drm/i915/i915_reg.h
View File

@ -12187,6 +12187,8 @@ enum skl_power_gate {
#define GEN12_GLOBAL_MOCS(i) _MMIO(0x4000 + (i) * 4) /* Global MOCS regs */
#define GEN12_GSMBASE _MMIO(0x108100)
/* gamt regs */
#define GEN8_L3_LRA_1_GPGPU _MMIO(0x4dd4)
#define GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW 0x67F1427F /* max/min for LRA1/2 */