mirror of https://gitee.com/openkylin/linux.git
ARM64: DT: Hisilicon Hi6220 hikey board updates for 4.8
- name the GPIO lines -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXcq9/AAoJEAvIV27ZiWZcuEUQAIjDX8Bq6WNerOSsn/kyWIhb 0lTNHae6D4mxKax6u9npwiMpBl7JsgVkfzU6es0iZtZe+g6dAOOJMOvjRX/aPZD2 oiO05vHtU+wKlcCvRPTinTRGK3lAzsPda9xMxEuaztbcg1fmFgflpx4r+n4Gwsy4 DsPr/Miw3bMPJGtQrx4YFd9Rb7ehkDyyq7PXUBYlRtnZs4Osgxm2LVhoZsw2vQTi u7JAA/N8R1bg7jYHEAIW+8GgPGJRcRPesGSmt92ELVVZHROP+7wx6y2PAsP+PDIO ZIuVvqGFYWfb5bgzfYS0bApYAzcVdsGLYEzbJHEuHE84ZKzXQ0YGoZmNID3RN5Ns 2gboC7DJU+e3k6AUoBckn7drpCC7BjkwVJr3NqvyvygztdnhoibdRYxaO8ywfzD+ TY3ul0GDyUGdWsLcwTdwtbA3azdh3xFmKGzPfJGGhcN7SNfenkTxJsvNroze5PZC ilqE5W25tS/ATqqqx2PBPbQQK4wTL0sULbFWSvt6jxYyV0OBekOMyvLnLLux/XOg Q4XltZ16nG42ujKv0j/GCz5L0oNIuLBDqt0zF7Wa9pHq0aK+BeDXMmRf3fZ2ZLUu 4/awoQcXqorxWF8Hc8QTg/iE/I9OkiKpWzzhgIoYwabRPay/WV6Dk0kAO8UjkeAJ OK7zJAbKnk1zYAchYxfo =bqGx -----END PGP SIGNATURE----- Merge tag 'hi6220-dt-for-4.8' of git://github.com/hisilicon/linux-hisi into next/dt64 ARM64: DT: Hisilicon Hi6220 hikey board updates for 4.8 - name the GPIO lines * tag 'hi6220-dt-for-4.8' of git://github.com/hisilicon/linux-hisi: arm64: dts: hikey: name the GPIO lines Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
7f95b51d54
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@ -66,6 +66,149 @@ uart3: uart@f7113000 {
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status = "ok";
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};
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/*
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* Legend: proper name = the GPIO line is used as GPIO
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* NC = not connected (not routed from the SoC)
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* "[PER]" = pin is muxed for peripheral (not GPIO)
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* "" = no idea, schematic doesn't say, could be
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* unrouted (not connected to any external pin)
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* LSEC = Low Speed External Connector
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* HSEC = High Speed External Connector
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*
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* Pin assignments taken from LeMaker and CircuitCo Schematics
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* Rev A1.
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*
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* For the lines routed to the external connectors the
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* lines are named after the 96Boards CE Specification 1.0,
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* Appendix "Expansion Connector Signal Description".
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*
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* When the 96Board naming of a line and the schematic name of
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* the same line are in conflict, the 96Board specification
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* takes precedence, which means that the external UART on the
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* LSEC is named UART0 while the schematic and SoC names this
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* UART2. This is only for the informational lines i.e. "[FOO]",
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* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
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* ones actually used for GPIO.
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*/
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gpio0: gpio@f8011000 {
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gpio-line-names = "PWR_HOLD", "DSI_SEL",
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"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
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"PWRON_DET", "5V_HUB_EN";
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};
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gpio1: gpio@f8012000 {
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gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
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"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
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};
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gpio2: gpio@f8013000 {
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gpio-line-names =
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"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
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"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
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"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
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"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
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"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
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"USB_ID_DET", "USB_VBUS_DET",
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"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
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};
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gpio3: gpio@f8014000 {
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gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
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"WLAN_ACTIVE", "NC", "NC";
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};
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gpio4: gpio@f7020000 {
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gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
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"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
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};
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gpio5: gpio@f7021000 {
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gpio-line-names = "NC", "NC",
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"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
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"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
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"[AUX_SSI1]", "NC",
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"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
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"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
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};
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gpio6: gpio@f7022000 {
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gpio-line-names =
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"[SPI0_DIN]", /* Pin 10: SPI0_DI */
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"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
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"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
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"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
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"NC", "NC", "NC",
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"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
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};
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gpio7: gpio@f7023000 {
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gpio-line-names = "NC", "NC", "NC", "NC",
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"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
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"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
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"NC", "NC";
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};
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gpio8: gpio@f7024000 {
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gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
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"", "", "", "", "", "";
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};
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gpio9: gpio@f7025000 {
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gpio-line-names = "",
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"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
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"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
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"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
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};
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gpio10: gpio@f7026000 {
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gpio-line-names = "BOOT_SEL",
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"[ISP_CCLK1]",
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"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
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"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
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"NC", "NC",
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"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
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"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
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};
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gpio11: gpio@f7027000 {
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gpio-line-names =
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"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
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"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
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"", "NC", "NC", "NC", "", "";
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};
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gpio12: gpio@f7028000 {
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gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
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"[BT_PCM_DO]",
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"NC", "NC", "NC", "NC",
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"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
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};
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gpio13: gpio@f7029000 {
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gpio-line-names = "[UART0_RX]", "[UART0_TX]",
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"[BT_UART1_CTS]", "[BT_UART1_RTS]",
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"[BT_UART1_RX]", "[BT_UART1_TX]",
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"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
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"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
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};
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gpio14: gpio@f702a000 {
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gpio-line-names =
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"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
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"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
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"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
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"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
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"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
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"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
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"[I2C2_SCL]", "[I2C2_SDA]";
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};
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gpio15: gpio@f702b000 {
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gpio-line-names = "", "", "", "", "", "", "NC", "";
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};
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/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
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dwmmc_2: dwmmc2@f723f000 {
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ti,non-removable;
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non-removable;
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