mirror of https://gitee.com/openkylin/linux.git
sh-pfc: sh7720: Remove unused input_pu range
The PFC SH7720 SoC data contains a input_pu range used to configure pull-up resistors using the legacy non-pinconf API. That API has been removed from the driver, the range is thus not used anymore. Remove it. If required, configuring pull-up resistors for the SH7720 can be implemented using the pinconf API, as done for the SH-Mobile, R-Mobile and R-Car platforms. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
This commit is contained in:
Laurent Pinchart
parent
ad81f0545e
commit
7f975b3f1e
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@ -81,36 +81,6 @@ enum {
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PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
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PINMUX_INPUT_END,
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PINMUX_INPUT_PULLUP_BEGIN,
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PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
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PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
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PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
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PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
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PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
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PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
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PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
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PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
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PTE4_IN_PU, PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
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PTF0_IN_PU,
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PTG6_IN_PU, PTG5_IN_PU, PTG4_IN_PU,
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PTG3_IN_PU, PTG2_IN_PU, PTG1_IN_PU, PTG0_IN_PU,
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PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
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PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
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PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
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PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
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PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
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PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU, PTL3_IN_PU,
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PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
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PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
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PTP4_IN_PU, PTP3_IN_PU, PTP2_IN_PU, PTP1_IN_PU, PTP0_IN_PU,
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PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
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PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
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PTS4_IN_PU, PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
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PTT4_IN_PU, PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
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PTU4_IN_PU, PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
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PTV4_IN_PU, PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
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PINMUX_INPUT_PULLUP_END,
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PINMUX_OUTPUT_BEGIN,
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PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
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PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
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@ -264,53 +234,53 @@ enum {
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static const pinmux_enum_t pinmux_data[] = {
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/* PTA GPIO */
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PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
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PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
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PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
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PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
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PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
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PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
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PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
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PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
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PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
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PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
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PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
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PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT),
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PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT),
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PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT),
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PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT),
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PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT),
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/* PTB GPIO */
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PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
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PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
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PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
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PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
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PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
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PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
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PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
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PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
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PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
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PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
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PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
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PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
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PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
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PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
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PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
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PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
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/* PTC GPIO */
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PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
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PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
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PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
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PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
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PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
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PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
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PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
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PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
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PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
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PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
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PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
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PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
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PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
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PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
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PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
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PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
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/* PTD GPIO */
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PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
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PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
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PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
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PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
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PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
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PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
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PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
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PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
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PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
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PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
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PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
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PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
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PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
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PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
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PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
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PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
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/* PTE GPIO */
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PINMUX_DATA(PTE6_DATA, PTE6_IN),
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PINMUX_DATA(PTE5_DATA, PTE5_IN),
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PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
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PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
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PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
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PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
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PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
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PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
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PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
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PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
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PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
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PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
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/* PTF GPIO */
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PINMUX_DATA(PTF6_DATA, PTF6_IN),
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@ -319,102 +289,102 @@ static const pinmux_enum_t pinmux_data[] = {
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PINMUX_DATA(PTF3_DATA, PTF3_IN),
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PINMUX_DATA(PTF2_DATA, PTF2_IN),
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PINMUX_DATA(PTF1_DATA, PTF1_IN),
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PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
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PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
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/* PTG GPIO */
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PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT, PTG6_IN_PU),
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PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT, PTG5_IN_PU),
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PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT, PTG4_IN_PU),
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PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT, PTG3_IN_PU),
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PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT, PTG2_IN_PU),
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PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT, PTG1_IN_PU),
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PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT, PTG0_IN_PU),
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PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT),
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PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT),
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PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT),
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PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT),
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PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT),
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PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT),
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PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT),
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/* PTH GPIO */
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PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
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PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
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PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
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PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
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PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
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PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
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PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
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PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
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PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
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PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
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PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
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PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
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PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
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PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
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/* PTJ GPIO */
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PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT, PTJ6_IN_PU),
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PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT, PTJ5_IN_PU),
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PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT, PTJ4_IN_PU),
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PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
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PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
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PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
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PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
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PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT),
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PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT),
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PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT),
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PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
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PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
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PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
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PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
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/* PTK GPIO */
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PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
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PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
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PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
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PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
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PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
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PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
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PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
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PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
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/* PTL GPIO */
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PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
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PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
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PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
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PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
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PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
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PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
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PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
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PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
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PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
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PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
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/* PTM GPIO */
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PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
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PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
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PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
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PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
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PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
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PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
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PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
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PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
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PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT),
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PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
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PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
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PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
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PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
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PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
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PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
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PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
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/* PTP GPIO */
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PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT, PTP4_IN_PU),
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PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT, PTP3_IN_PU),
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PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT, PTP2_IN_PU),
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PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT, PTP1_IN_PU),
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PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT, PTP0_IN_PU),
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PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT),
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PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT),
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PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT),
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PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT),
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PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT),
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/* PTR GPIO */
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PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
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PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
|
||||
PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
|
||||
PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
|
||||
PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT, PTR3_IN_PU),
|
||||
PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT, PTR2_IN_PU),
|
||||
PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
|
||||
PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
|
||||
PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
|
||||
PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
|
||||
PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
|
||||
PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
|
||||
PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT),
|
||||
PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT),
|
||||
PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
|
||||
PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
|
||||
|
||||
/* PTS GPIO */
|
||||
PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
|
||||
PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
|
||||
PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
|
||||
PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
|
||||
PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
|
||||
PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
|
||||
PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
|
||||
PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
|
||||
PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
|
||||
PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
|
||||
|
||||
/* PTT GPIO */
|
||||
PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
|
||||
PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
|
||||
PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
|
||||
PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
|
||||
PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
|
||||
PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
|
||||
PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
|
||||
PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
|
||||
PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
|
||||
PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
|
||||
|
||||
/* PTU GPIO */
|
||||
PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
|
||||
PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
|
||||
PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
|
||||
PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
|
||||
PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
|
||||
PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
|
||||
PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
|
||||
PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
|
||||
PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
|
||||
PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
|
||||
|
||||
/* PTV GPIO */
|
||||
PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
|
||||
PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
|
||||
PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
|
||||
PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
|
||||
PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
|
||||
PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
|
||||
PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
|
||||
PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
|
||||
PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
|
||||
PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
|
||||
|
||||
/* PTA FN */
|
||||
PINMUX_DATA(D23_MARK, PTA7_FN),
|
||||
|
|
@ -959,54 +929,54 @@ static const struct pinmux_func pinmux_func_gpios[] = {
|
|||
|
||||
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
|
||||
PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
|
||||
PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
|
||||
PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
|
||||
PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
|
||||
PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
|
||||
PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
|
||||
PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
|
||||
PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
|
||||
PTA7_FN, PTA7_OUT, 0, PTA7_IN,
|
||||
PTA6_FN, PTA6_OUT, 0, PTA6_IN,
|
||||
PTA5_FN, PTA5_OUT, 0, PTA5_IN,
|
||||
PTA4_FN, PTA4_OUT, 0, PTA4_IN,
|
||||
PTA3_FN, PTA3_OUT, 0, PTA3_IN,
|
||||
PTA2_FN, PTA2_OUT, 0, PTA2_IN,
|
||||
PTA1_FN, PTA1_OUT, 0, PTA1_IN,
|
||||
PTA0_FN, PTA0_OUT, 0, PTA0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
|
||||
PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
|
||||
PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
|
||||
PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
|
||||
PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
|
||||
PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
|
||||
PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
|
||||
PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
|
||||
PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
|
||||
PTB7_FN, PTB7_OUT, 0, PTB7_IN,
|
||||
PTB6_FN, PTB6_OUT, 0, PTB6_IN,
|
||||
PTB5_FN, PTB5_OUT, 0, PTB5_IN,
|
||||
PTB4_FN, PTB4_OUT, 0, PTB4_IN,
|
||||
PTB3_FN, PTB3_OUT, 0, PTB3_IN,
|
||||
PTB2_FN, PTB2_OUT, 0, PTB2_IN,
|
||||
PTB1_FN, PTB1_OUT, 0, PTB1_IN,
|
||||
PTB0_FN, PTB0_OUT, 0, PTB0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
|
||||
PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
|
||||
PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
|
||||
PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
|
||||
PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
|
||||
PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
|
||||
PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
|
||||
PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
|
||||
PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
|
||||
PTC7_FN, PTC7_OUT, 0, PTC7_IN,
|
||||
PTC6_FN, PTC6_OUT, 0, PTC6_IN,
|
||||
PTC5_FN, PTC5_OUT, 0, PTC5_IN,
|
||||
PTC4_FN, PTC4_OUT, 0, PTC4_IN,
|
||||
PTC3_FN, PTC3_OUT, 0, PTC3_IN,
|
||||
PTC2_FN, PTC2_OUT, 0, PTC2_IN,
|
||||
PTC1_FN, PTC1_OUT, 0, PTC1_IN,
|
||||
PTC0_FN, PTC0_OUT, 0, PTC0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
|
||||
PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
|
||||
PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
|
||||
PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
|
||||
PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
|
||||
PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
|
||||
PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
|
||||
PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
|
||||
PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
|
||||
PTD7_FN, PTD7_OUT, 0, PTD7_IN,
|
||||
PTD6_FN, PTD6_OUT, 0, PTD6_IN,
|
||||
PTD5_FN, PTD5_OUT, 0, PTD5_IN,
|
||||
PTD4_FN, PTD4_OUT, 0, PTD4_IN,
|
||||
PTD3_FN, PTD3_OUT, 0, PTD3_IN,
|
||||
PTD2_FN, PTD2_OUT, 0, PTD2_IN,
|
||||
PTD1_FN, PTD1_OUT, 0, PTD1_IN,
|
||||
PTD0_FN, PTD0_OUT, 0, PTD0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
PTE6_FN, 0, 0, PTE6_IN,
|
||||
PTE5_FN, 0, 0, PTE5_IN,
|
||||
PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
|
||||
PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
|
||||
PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
|
||||
PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
|
||||
PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
|
||||
PTE4_FN, PTE4_OUT, 0, PTE4_IN,
|
||||
PTE3_FN, PTE3_OUT, 0, PTE3_IN,
|
||||
PTE2_FN, PTE2_OUT, 0, PTE2_IN,
|
||||
PTE1_FN, PTE1_OUT, 0, PTE1_IN,
|
||||
PTE0_FN, PTE0_OUT, 0, PTE0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
|
|
@ -1020,123 +990,123 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
|
|||
},
|
||||
{ PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
PTG6_FN, PTG6_OUT, PTG6_IN_PU, PTG6_IN,
|
||||
PTG5_FN, PTG5_OUT, PTG5_IN_PU, PTG5_IN,
|
||||
PTG4_FN, PTG4_OUT, PTG4_IN_PU, PTG4_IN,
|
||||
PTG3_FN, PTG3_OUT, PTG3_IN_PU, PTG3_IN,
|
||||
PTG2_FN, PTG2_OUT, PTG2_IN_PU, PTG2_IN,
|
||||
PTG1_FN, PTG1_OUT, PTG1_IN_PU, PTG1_IN,
|
||||
PTG0_FN, PTG0_OUT, PTG0_IN_PU, PTG0_IN }
|
||||
PTG6_FN, PTG6_OUT, 0, PTG6_IN,
|
||||
PTG5_FN, PTG5_OUT, 0, PTG5_IN,
|
||||
PTG4_FN, PTG4_OUT, 0, PTG4_IN,
|
||||
PTG3_FN, PTG3_OUT, 0, PTG3_IN,
|
||||
PTG2_FN, PTG2_OUT, 0, PTG2_IN,
|
||||
PTG1_FN, PTG1_OUT, 0, PTG1_IN,
|
||||
PTG0_FN, PTG0_OUT, 0, PTG0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
|
||||
PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
|
||||
PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
|
||||
PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
|
||||
PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
|
||||
PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
|
||||
PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
|
||||
PTH6_FN, PTH6_OUT, 0, PTH6_IN,
|
||||
PTH5_FN, PTH5_OUT, 0, PTH5_IN,
|
||||
PTH4_FN, PTH4_OUT, 0, PTH4_IN,
|
||||
PTH3_FN, PTH3_OUT, 0, PTH3_IN,
|
||||
PTH2_FN, PTH2_OUT, 0, PTH2_IN,
|
||||
PTH1_FN, PTH1_OUT, 0, PTH1_IN,
|
||||
PTH0_FN, PTH0_OUT, 0, PTH0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
PTJ6_FN, PTJ6_OUT, PTJ6_IN_PU, PTJ6_IN,
|
||||
PTJ5_FN, PTJ5_OUT, PTJ5_IN_PU, PTJ5_IN,
|
||||
PTJ4_FN, PTJ4_OUT, PTJ4_IN_PU, PTJ4_IN,
|
||||
PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
|
||||
PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
|
||||
PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
|
||||
PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
|
||||
PTJ6_FN, PTJ6_OUT, 0, PTJ6_IN,
|
||||
PTJ5_FN, PTJ5_OUT, 0, PTJ5_IN,
|
||||
PTJ4_FN, PTJ4_OUT, 0, PTJ4_IN,
|
||||
PTJ3_FN, PTJ3_OUT, 0, PTJ3_IN,
|
||||
PTJ2_FN, PTJ2_OUT, 0, PTJ2_IN,
|
||||
PTJ1_FN, PTJ1_OUT, 0, PTJ1_IN,
|
||||
PTJ0_FN, PTJ0_OUT, 0, PTJ0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
|
||||
PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
|
||||
PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
|
||||
PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
|
||||
PTK3_FN, PTK3_OUT, 0, PTK3_IN,
|
||||
PTK2_FN, PTK2_OUT, 0, PTK2_IN,
|
||||
PTK1_FN, PTK1_OUT, 0, PTK1_IN,
|
||||
PTK0_FN, PTK0_OUT, 0, PTK0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
|
||||
PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
|
||||
PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
|
||||
PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
|
||||
PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
|
||||
PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
|
||||
PTL7_FN, PTL7_OUT, 0, PTL7_IN,
|
||||
PTL6_FN, PTL6_OUT, 0, PTL6_IN,
|
||||
PTL5_FN, PTL5_OUT, 0, PTL5_IN,
|
||||
PTL4_FN, PTL4_OUT, 0, PTL4_IN,
|
||||
PTL3_FN, PTL3_OUT, 0, PTL3_IN,
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0 }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
|
||||
PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
|
||||
PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
|
||||
PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
|
||||
PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
|
||||
PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
|
||||
PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
|
||||
PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
|
||||
PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
|
||||
PTM7_FN, PTM7_OUT, 0, PTM7_IN,
|
||||
PTM6_FN, PTM6_OUT, 0, PTM6_IN,
|
||||
PTM5_FN, PTM5_OUT, 0, PTM5_IN,
|
||||
PTM4_FN, PTM4_OUT, 0, PTM4_IN,
|
||||
PTM3_FN, PTM3_OUT, 0, PTM3_IN,
|
||||
PTM2_FN, PTM2_OUT, 0, PTM2_IN,
|
||||
PTM1_FN, PTM1_OUT, 0, PTM1_IN,
|
||||
PTM0_FN, PTM0_OUT, 0, PTM0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
PTP4_FN, PTP4_OUT, PTP4_IN_PU, PTP4_IN,
|
||||
PTP3_FN, PTP3_OUT, PTP3_IN_PU, PTP3_IN,
|
||||
PTP2_FN, PTP2_OUT, PTP2_IN_PU, PTP2_IN,
|
||||
PTP1_FN, PTP1_OUT, PTP1_IN_PU, PTP1_IN,
|
||||
PTP0_FN, PTP0_OUT, PTP0_IN_PU, PTP0_IN }
|
||||
PTP4_FN, PTP4_OUT, 0, PTP4_IN,
|
||||
PTP3_FN, PTP3_OUT, 0, PTP3_IN,
|
||||
PTP2_FN, PTP2_OUT, 0, PTP2_IN,
|
||||
PTP1_FN, PTP1_OUT, 0, PTP1_IN,
|
||||
PTP0_FN, PTP0_OUT, 0, PTP0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) {
|
||||
PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
|
||||
PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
|
||||
PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
|
||||
PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
|
||||
PTR3_FN, PTR3_OUT, PTR3_IN_PU, PTR3_IN,
|
||||
PTR2_FN, PTR2_OUT, PTR2_IN_PU, PTR2_IN,
|
||||
PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
|
||||
PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
|
||||
PTR7_FN, PTR7_OUT, 0, PTR7_IN,
|
||||
PTR6_FN, PTR6_OUT, 0, PTR6_IN,
|
||||
PTR5_FN, PTR5_OUT, 0, PTR5_IN,
|
||||
PTR4_FN, PTR4_OUT, 0, PTR4_IN,
|
||||
PTR3_FN, PTR3_OUT, 0, PTR3_IN,
|
||||
PTR2_FN, PTR2_OUT, 0, PTR2_IN,
|
||||
PTR1_FN, PTR1_OUT, 0, PTR1_IN,
|
||||
PTR0_FN, PTR0_OUT, 0, PTR0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
|
||||
PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
|
||||
PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
|
||||
PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
|
||||
PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
|
||||
PTS4_FN, PTS4_OUT, 0, PTS4_IN,
|
||||
PTS3_FN, PTS3_OUT, 0, PTS3_IN,
|
||||
PTS2_FN, PTS2_OUT, 0, PTS2_IN,
|
||||
PTS1_FN, PTS1_OUT, 0, PTS1_IN,
|
||||
PTS0_FN, PTS0_OUT, 0, PTS0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
|
||||
PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
|
||||
PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
|
||||
PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
|
||||
PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
|
||||
PTT4_FN, PTT4_OUT, 0, PTT4_IN,
|
||||
PTT3_FN, PTT3_OUT, 0, PTT3_IN,
|
||||
PTT2_FN, PTT2_OUT, 0, PTT2_IN,
|
||||
PTT1_FN, PTT1_OUT, 0, PTT1_IN,
|
||||
PTT0_FN, PTT0_OUT, 0, PTT0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
|
||||
PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
|
||||
PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
|
||||
PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
|
||||
PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
|
||||
PTU4_FN, PTU4_OUT, 0, PTU4_IN,
|
||||
PTU3_FN, PTU3_OUT, 0, PTU3_IN,
|
||||
PTU2_FN, PTU2_OUT, 0, PTU2_IN,
|
||||
PTU1_FN, PTU1_OUT, 0, PTU1_IN,
|
||||
PTU0_FN, PTU0_OUT, 0, PTU0_IN }
|
||||
},
|
||||
{ PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) {
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
0, 0, 0, 0,
|
||||
PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
|
||||
PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
|
||||
PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
|
||||
PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
|
||||
PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
|
||||
PTV4_FN, PTV4_OUT, 0, PTV4_IN,
|
||||
PTV3_FN, PTV3_OUT, 0, PTV3_IN,
|
||||
PTV2_FN, PTV2_OUT, 0, PTV2_IN,
|
||||
PTV1_FN, PTV1_OUT, 0, PTV1_IN,
|
||||
PTV0_FN, PTV0_OUT, 0, PTV0_IN }
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
|
@ -1220,7 +1190,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
|
|||
const struct sh_pfc_soc_info sh7720_pinmux_info = {
|
||||
.name = "sh7720_pfc",
|
||||
.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
|
||||
.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
|
||||
.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
|
||||
.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue