mirror of https://gitee.com/openkylin/linux.git
pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings
Add pinctrl-paris core that implements vendor dt-binding which MediaTek tablet, box and smartphone-based SoCs such as MT81xx, MT27xx, and MT67xx SoCs really want to depend on. The driver is just completely rewritten according to pinctrl-mtk-common.c but uses the new logic from pinctrl-mtk-common-v2.c to have an elegant way to support new SoCs in the future. Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Zhiyong Tao
Linus Walleij
parent
b7d7f9eeca
commit
805250982b
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@ -24,6 +24,15 @@ config PINCTRL_MTK_MOORE
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select GPIOLIB
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select OF_GPIO
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config PINCTRL_MTK_PARIS
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bool "MediaTek Paris Core that implements vendor binding"
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depends on OF
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select PINMUX
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select GENERIC_PINCONF
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select GPIOLIB
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select EINT_MTK
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select OF_GPIO
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# For ARMv7 SoCs
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config PINCTRL_MT2701
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bool "Mediatek MT2701 pin control"
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@ -3,6 +3,7 @@
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obj-$(CONFIG_EINT_MTK) += mtk-eint.o
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obj-$(CONFIG_PINCTRL_MTK) += pinctrl-mtk-common.o
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obj-$(CONFIG_PINCTRL_MTK_MOORE) += pinctrl-moore.o pinctrl-mtk-common-v2.o
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obj-$(CONFIG_PINCTRL_MTK_PARIS) += pinctrl-paris.o pinctrl-mtk-common-v2.o
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# SoC Drivers
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obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o
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@ -174,6 +174,12 @@ struct mtk_pin_desc {
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struct mtk_func_desc *funcs;
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};
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struct mtk_pinctrl_group {
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const char *name;
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unsigned long config;
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unsigned pin;
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};
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struct mtk_pinctrl;
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/* struct mtk_pin_soc - the structure that holds SoC-specific data */
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@ -228,6 +234,8 @@ struct mtk_pinctrl {
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struct gpio_chip chip;
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const struct mtk_pin_soc *soc;
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struct mtk_eint *eint;
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struct mtk_pinctrl_group *groups;
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const char **grp_names;
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};
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void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set);
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@ -0,0 +1,884 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* MediaTek Pinctrl Paris Driver, which implement the vendor per-pin
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* bindings for MediaTek SoC.
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*
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* Copyright (C) 2018 MediaTek Inc.
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* Author: Sean Wang <sean.wang@mediatek.com>
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* Zhiyong Tao <zhiyong.tao@mediatek.com>
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* Hongzhou.Yang <hongzhou.yang@mediatek.com>
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*/
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#include <dt-bindings/pinctrl/mt65xx.h>
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#include "pinctrl-paris.h"
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#define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
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/* Custom pinconf parameters */
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#define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1)
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#define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2)
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#define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3)
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#define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4)
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static const struct pinconf_generic_params mtk_custom_bindings[] = {
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{"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0},
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{"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0},
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{"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1},
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{"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1},
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};
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#ifdef CONFIG_DEBUG_FS
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static const struct pin_config_item mtk_conf_items[] = {
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PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
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PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
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PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
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PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
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};
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#endif
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static const char * const mtk_gpio_functions[] = {
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"func0", "func1", "func2", "func3",
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"func4", "func5", "func6", "func7",
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"func8", "func9", "func10", "func11",
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"func12", "func13", "func14", "func15",
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};
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static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned int pin)
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{
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
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const struct mtk_pin_desc *desc;
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
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return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
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hw->soc->gpio_m);
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}
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static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned int pin, bool input)
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{
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
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const struct mtk_pin_desc *desc;
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
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/* hardware would take 0 as input direction */
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return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
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}
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static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
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unsigned int pin, unsigned long *config)
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{
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
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u32 param = pinconf_to_config_param(*config);
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int val, val2, err, reg, ret = 1;
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const struct mtk_pin_desc *desc;
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
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switch (param) {
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case PIN_CONFIG_BIAS_DISABLE:
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if (hw->soc->bias_disable_get) {
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err = hw->soc->bias_disable_get(hw, desc, &ret);
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if (err)
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return err;
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} else {
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return -ENOTSUPP;
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}
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break;
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case PIN_CONFIG_BIAS_PULL_UP:
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if (hw->soc->bias_get) {
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err = hw->soc->bias_get(hw, desc, 1, &ret);
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if (err)
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return err;
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} else {
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return -ENOTSUPP;
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}
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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if (hw->soc->bias_get) {
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err = hw->soc->bias_get(hw, desc, 0, &ret);
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if (err)
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return err;
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} else {
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return -ENOTSUPP;
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}
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break;
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case PIN_CONFIG_SLEW_RATE:
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val);
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if (err)
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return err;
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if (!val)
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return -EINVAL;
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break;
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case PIN_CONFIG_INPUT_ENABLE:
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case PIN_CONFIG_OUTPUT_ENABLE:
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
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if (err)
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return err;
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/* HW takes input mode as zero; output mode as non-zero */
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if ((val && param == PIN_CONFIG_INPUT_ENABLE) ||
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(!val && param == PIN_CONFIG_OUTPUT_ENABLE))
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return -EINVAL;
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break;
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
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if (err)
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return err;
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2);
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if (err)
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return err;
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if (val || !val2)
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return -EINVAL;
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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if (hw->soc->drive_get) {
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err = hw->soc->drive_get(hw, desc, &ret);
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if (err)
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return err;
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} else {
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err = -ENOTSUPP;
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}
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break;
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case MTK_PIN_CONFIG_TDSEL:
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case MTK_PIN_CONFIG_RDSEL:
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reg = (param == MTK_PIN_CONFIG_TDSEL) ?
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PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
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err = mtk_hw_get_value(hw, desc, reg, &val);
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if (err)
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return err;
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ret = val;
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break;
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case MTK_PIN_CONFIG_PU_ADV:
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case MTK_PIN_CONFIG_PD_ADV:
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if (hw->soc->adv_pull_get) {
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bool pullup;
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pullup = param == MTK_PIN_CONFIG_PU_ADV;
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err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
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if (err)
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return err;
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} else {
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return -ENOTSUPP;
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}
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break;
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default:
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return -ENOTSUPP;
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}
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*config = pinconf_to_config_packed(param, ret);
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return 0;
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}
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static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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enum pin_config_param param,
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enum pin_config_param arg)
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{
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
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const struct mtk_pin_desc *desc;
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int err = 0;
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u32 reg;
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
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switch ((u32)param) {
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case PIN_CONFIG_BIAS_DISABLE:
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if (hw->soc->bias_disable_set) {
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err = hw->soc->bias_disable_set(hw, desc);
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if (err)
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return err;
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} else {
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return -ENOTSUPP;
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}
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break;
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case PIN_CONFIG_BIAS_PULL_UP:
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if (hw->soc->bias_set) {
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err = hw->soc->bias_set(hw, desc, 1);
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if (err)
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return err;
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} else {
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return -ENOTSUPP;
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}
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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if (hw->soc->bias_set) {
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err = hw->soc->bias_set(hw, desc, 0);
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if (err)
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return err;
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} else {
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return -ENOTSUPP;
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}
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break;
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case PIN_CONFIG_OUTPUT_ENABLE:
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
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MTK_DISABLE);
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if (err)
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goto err;
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
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MTK_OUTPUT);
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if (err)
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goto err;
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break;
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case PIN_CONFIG_INPUT_ENABLE:
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if (hw->soc->ies_present) {
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mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES,
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MTK_ENABLE);
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}
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
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MTK_INPUT);
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if (err)
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goto err;
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break;
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case PIN_CONFIG_SLEW_RATE:
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR,
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arg);
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if (err)
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goto err;
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break;
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case PIN_CONFIG_OUTPUT:
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
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MTK_OUTPUT);
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if (err)
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goto err;
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
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arg);
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if (err)
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goto err;
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break;
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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/* arg = 1: Input mode & SMT enable ;
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* arg = 0: Output mode & SMT disable
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*/
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arg = arg ? 2 : 1;
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
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arg & 1);
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if (err)
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goto err;
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
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!!(arg & 2));
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if (err)
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goto err;
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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if (hw->soc->drive_set) {
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err = hw->soc->drive_set(hw, desc, arg);
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if (err)
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return err;
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} else {
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return -ENOTSUPP;
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}
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break;
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case MTK_PIN_CONFIG_TDSEL:
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case MTK_PIN_CONFIG_RDSEL:
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reg = (param == MTK_PIN_CONFIG_TDSEL) ?
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PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
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err = mtk_hw_set_value(hw, desc, reg, arg);
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if (err)
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goto err;
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break;
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case MTK_PIN_CONFIG_PU_ADV:
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case MTK_PIN_CONFIG_PD_ADV:
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if (hw->soc->adv_pull_set) {
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bool pullup;
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pullup = param == MTK_PIN_CONFIG_PU_ADV;
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err = hw->soc->adv_pull_set(hw, desc, pullup,
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arg);
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if (err)
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return err;
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} else {
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return -ENOTSUPP;
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}
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break;
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default:
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err = -ENOTSUPP;
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}
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err:
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return err;
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}
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static struct mtk_pinctrl_group *
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mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin)
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{
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int i;
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for (i = 0; i < hw->soc->ngrps; i++) {
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struct mtk_pinctrl_group *grp = hw->groups + i;
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if (grp->pin == pin)
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return grp;
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}
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return NULL;
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}
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static const struct mtk_func_desc *
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mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum)
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{
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const struct mtk_pin_desc *pin = hw->soc->pins + pin_num;
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const struct mtk_func_desc *func = pin->funcs;
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while (func && func->name) {
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if (func->muxval == fnum)
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return func;
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func++;
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}
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return NULL;
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}
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static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num,
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u32 fnum)
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{
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int i;
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for (i = 0; i < hw->soc->npins; i++) {
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const struct mtk_pin_desc *pin = hw->soc->pins + i;
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if (pin->number == pin_num) {
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const struct mtk_func_desc *func = pin->funcs;
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while (func && func->name) {
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if (func->muxval == fnum)
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return true;
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func++;
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}
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break;
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}
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}
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return false;
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}
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static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl,
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u32 pin, u32 fnum,
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struct mtk_pinctrl_group *grp,
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struct pinctrl_map **map,
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unsigned *reserved_maps,
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unsigned *num_maps)
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{
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bool ret;
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if (*num_maps == *reserved_maps)
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return -ENOSPC;
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(*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
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(*map)[*num_maps].data.mux.group = grp->name;
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ret = mtk_pctrl_is_function_valid(pctl, pin, fnum);
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if (!ret) {
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dev_err(pctl->dev, "invalid function %d on pin %d .\n",
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fnum, pin);
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return -EINVAL;
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}
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(*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum];
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(*num_maps)++;
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return 0;
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}
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static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
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struct device_node *node,
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struct pinctrl_map **map,
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unsigned *reserved_maps,
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unsigned *num_maps)
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{
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
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int num_pins, num_funcs, maps_per_pin, i, err;
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struct mtk_pinctrl_group *grp;
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unsigned int num_configs;
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bool has_config = false;
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unsigned long *configs;
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u32 pinfunc, pin, func;
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struct property *pins;
|
||||
unsigned reserve = 0;
|
||||
|
||||
pins = of_find_property(node, "pinmux", NULL);
|
||||
if (!pins) {
|
||||
dev_err(hw->dev, "missing pins property in node %s .\n",
|
||||
node->name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
err = pinconf_generic_parse_dt_config(node, pctldev, &configs,
|
||||
&num_configs);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
if (num_configs)
|
||||
has_config = true;
|
||||
|
||||
num_pins = pins->length / sizeof(u32);
|
||||
num_funcs = num_pins;
|
||||
maps_per_pin = 0;
|
||||
if (num_funcs)
|
||||
maps_per_pin++;
|
||||
if (has_config && num_pins >= 1)
|
||||
maps_per_pin++;
|
||||
|
||||
if (!num_pins || !maps_per_pin) {
|
||||
err = -EINVAL;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
reserve = num_pins * maps_per_pin;
|
||||
|
||||
err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps,
|
||||
reserve);
|
||||
if (err < 0)
|
||||
goto exit;
|
||||
|
||||
for (i = 0; i < num_pins; i++) {
|
||||
err = of_property_read_u32_index(node, "pinmux", i, &pinfunc);
|
||||
if (err)
|
||||
goto exit;
|
||||
|
||||
pin = MTK_GET_PIN_NO(pinfunc);
|
||||
func = MTK_GET_PIN_FUNC(pinfunc);
|
||||
|
||||
if (pin >= hw->soc->npins ||
|
||||
func >= ARRAY_SIZE(mtk_gpio_functions)) {
|
||||
dev_err(hw->dev, "invalid pins value.\n");
|
||||
err = -EINVAL;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
grp = mtk_pctrl_find_group_by_pin(hw, pin);
|
||||
if (!grp) {
|
||||
dev_err(hw->dev, "unable to match pin %d to group\n",
|
||||
pin);
|
||||
err = -EINVAL;
|
||||
goto exit;
|
||||
}
|
||||
|
||||
err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map,
|
||||
reserved_maps, num_maps);
|
||||
if (err < 0)
|
||||
goto exit;
|
||||
|
||||
if (has_config) {
|
||||
err = pinctrl_utils_add_map_configs(pctldev, map,
|
||||
reserved_maps,
|
||||
num_maps,
|
||||
grp->name,
|
||||
configs,
|
||||
num_configs,
|
||||
PIN_MAP_TYPE_CONFIGS_GROUP);
|
||||
if (err < 0)
|
||||
goto exit;
|
||||
}
|
||||
}
|
||||
|
||||
err = 0;
|
||||
|
||||
exit:
|
||||
kfree(configs);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
|
||||
struct device_node *np_config,
|
||||
struct pinctrl_map **map,
|
||||
unsigned *num_maps)
|
||||
{
|
||||
struct device_node *np;
|
||||
unsigned reserved_maps;
|
||||
int ret;
|
||||
|
||||
*map = NULL;
|
||||
*num_maps = 0;
|
||||
reserved_maps = 0;
|
||||
|
||||
for_each_child_of_node(np_config, np) {
|
||||
ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map,
|
||||
&reserved_maps,
|
||||
num_maps);
|
||||
if (ret < 0) {
|
||||
pinctrl_utils_free_map(pctldev, *map, *num_maps);
|
||||
of_node_put(np);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return hw->soc->ngrps;
|
||||
}
|
||||
|
||||
static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev,
|
||||
unsigned group)
|
||||
{
|
||||
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return hw->groups[group].name;
|
||||
}
|
||||
|
||||
static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
|
||||
unsigned group, const unsigned **pins,
|
||||
unsigned *num_pins)
|
||||
{
|
||||
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
*pins = (unsigned *)&hw->groups[group].pin;
|
||||
*num_pins = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct pinctrl_ops mtk_pctlops = {
|
||||
.dt_node_to_map = mtk_pctrl_dt_node_to_map,
|
||||
.dt_free_map = pinctrl_utils_free_map,
|
||||
.get_groups_count = mtk_pctrl_get_groups_count,
|
||||
.get_group_name = mtk_pctrl_get_group_name,
|
||||
.get_group_pins = mtk_pctrl_get_group_pins,
|
||||
};
|
||||
|
||||
static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
return ARRAY_SIZE(mtk_gpio_functions);
|
||||
}
|
||||
|
||||
static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev,
|
||||
unsigned selector)
|
||||
{
|
||||
return mtk_gpio_functions[selector];
|
||||
}
|
||||
|
||||
static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
|
||||
unsigned function,
|
||||
const char * const **groups,
|
||||
unsigned * const num_groups)
|
||||
{
|
||||
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
*groups = hw->grp_names;
|
||||
*num_groups = hw->soc->ngrps;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev,
|
||||
unsigned function,
|
||||
unsigned group)
|
||||
{
|
||||
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct mtk_pinctrl_group *grp = hw->groups + group;
|
||||
const struct mtk_func_desc *desc_func;
|
||||
const struct mtk_pin_desc *desc;
|
||||
bool ret;
|
||||
|
||||
ret = mtk_pctrl_is_function_valid(hw, grp->pin, function);
|
||||
if (!ret) {
|
||||
dev_err(hw->dev, "invalid function %d on group %d .\n",
|
||||
function, group);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function);
|
||||
if (!desc_func)
|
||||
return -EINVAL;
|
||||
|
||||
desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin];
|
||||
mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct pinmux_ops mtk_pmxops = {
|
||||
.get_functions_count = mtk_pmx_get_funcs_cnt,
|
||||
.get_function_name = mtk_pmx_get_func_name,
|
||||
.get_function_groups = mtk_pmx_get_func_groups,
|
||||
.set_mux = mtk_pmx_set_mux,
|
||||
.gpio_set_direction = mtk_pinmux_gpio_set_direction,
|
||||
.gpio_request_enable = mtk_pinmux_gpio_request_enable,
|
||||
};
|
||||
|
||||
static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group,
|
||||
unsigned long *config)
|
||||
{
|
||||
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
*config = hw->groups[group].config;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
|
||||
unsigned long *configs, unsigned num_configs)
|
||||
{
|
||||
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct mtk_pinctrl_group *grp = &hw->groups[group];
|
||||
int i, ret;
|
||||
|
||||
for (i = 0; i < num_configs; i++) {
|
||||
ret = mtk_pinconf_set(pctldev, grp->pin,
|
||||
pinconf_to_config_param(configs[i]),
|
||||
pinconf_to_config_argument(configs[i]));
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
grp->config = configs[i];
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct pinconf_ops mtk_confops = {
|
||||
.pin_config_get = mtk_pinconf_get,
|
||||
.pin_config_group_get = mtk_pconf_group_get,
|
||||
.pin_config_group_set = mtk_pconf_group_set,
|
||||
};
|
||||
|
||||
static struct pinctrl_desc mtk_desc = {
|
||||
.name = PINCTRL_PINCTRL_DEV,
|
||||
.pctlops = &mtk_pctlops,
|
||||
.pmxops = &mtk_pmxops,
|
||||
.confops = &mtk_confops,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio)
|
||||
{
|
||||
struct mtk_pinctrl *hw = gpiochip_get_data(chip);
|
||||
const struct mtk_pin_desc *desc;
|
||||
int value, err;
|
||||
|
||||
desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
|
||||
|
||||
err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
return !value;
|
||||
}
|
||||
|
||||
static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
|
||||
{
|
||||
struct mtk_pinctrl *hw = gpiochip_get_data(chip);
|
||||
const struct mtk_pin_desc *desc;
|
||||
int value, err;
|
||||
|
||||
desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
|
||||
|
||||
err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
return !!value;
|
||||
}
|
||||
|
||||
static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
|
||||
{
|
||||
struct mtk_pinctrl *hw = gpiochip_get_data(chip);
|
||||
const struct mtk_pin_desc *desc;
|
||||
|
||||
desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
|
||||
|
||||
mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
|
||||
}
|
||||
|
||||
static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(chip->base + gpio);
|
||||
}
|
||||
|
||||
static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
|
||||
int value)
|
||||
{
|
||||
mtk_gpio_set(chip, gpio, value);
|
||||
|
||||
return pinctrl_gpio_direction_output(chip->base + gpio);
|
||||
}
|
||||
|
||||
static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
|
||||
unsigned long config)
|
||||
{
|
||||
struct mtk_pinctrl *hw = gpiochip_get_data(chip);
|
||||
const struct mtk_pin_desc *desc;
|
||||
u32 debounce;
|
||||
|
||||
desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
|
||||
|
||||
if (!hw->eint ||
|
||||
pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
|
||||
desc->eint.eint_n == EINT_NA)
|
||||
return -ENOTSUPP;
|
||||
|
||||
debounce = pinconf_to_config_argument(config);
|
||||
|
||||
return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
|
||||
}
|
||||
|
||||
static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np)
|
||||
{
|
||||
struct gpio_chip *chip = &hw->chip;
|
||||
int ret;
|
||||
|
||||
chip->label = PINCTRL_PINCTRL_DEV;
|
||||
chip->parent = hw->dev;
|
||||
chip->request = gpiochip_generic_request;
|
||||
chip->free = gpiochip_generic_free;
|
||||
chip->get_direction = mtk_gpio_get_direction;
|
||||
chip->direction_input = mtk_gpio_direction_input;
|
||||
chip->direction_output = mtk_gpio_direction_output;
|
||||
chip->get = mtk_gpio_get;
|
||||
chip->set = mtk_gpio_set;
|
||||
chip->set_config = mtk_gpio_set_config,
|
||||
chip->base = -1;
|
||||
chip->ngpio = hw->soc->npins;
|
||||
chip->of_node = np;
|
||||
chip->of_gpio_n_cells = 2;
|
||||
|
||||
ret = gpiochip_add_data(chip, hw);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mtk_pctrl_build_state(struct platform_device *pdev)
|
||||
{
|
||||
struct mtk_pinctrl *hw = platform_get_drvdata(pdev);
|
||||
int i;
|
||||
|
||||
/* Allocate groups */
|
||||
hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
|
||||
sizeof(*hw->groups), GFP_KERNEL);
|
||||
if (!hw->groups)
|
||||
return -ENOMEM;
|
||||
|
||||
/* We assume that one pin is one group, use pin name as group name. */
|
||||
hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps,
|
||||
sizeof(*hw->grp_names), GFP_KERNEL);
|
||||
if (!hw->grp_names)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < hw->soc->npins; i++) {
|
||||
const struct mtk_pin_desc *pin = hw->soc->pins + i;
|
||||
struct mtk_pinctrl_group *group = hw->groups + i;
|
||||
|
||||
group->name = pin->name;
|
||||
group->pin = pin->number;
|
||||
|
||||
hw->grp_names[i] = pin->name;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mtk_paris_pinctrl_probe(struct platform_device *pdev,
|
||||
const struct mtk_pin_soc *soc)
|
||||
{
|
||||
struct pinctrl_pin_desc *pins;
|
||||
struct mtk_pinctrl *hw;
|
||||
struct resource *res;
|
||||
int err, i;
|
||||
|
||||
hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
|
||||
if (!hw)
|
||||
return -ENOMEM;
|
||||
|
||||
platform_set_drvdata(pdev, hw);
|
||||
hw->soc = soc;
|
||||
hw->dev = &pdev->dev;
|
||||
|
||||
if (!hw->soc->nbase_names) {
|
||||
dev_err(&pdev->dev,
|
||||
"SoC should be assigned at least one register base\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
|
||||
sizeof(*hw->base), GFP_KERNEL);
|
||||
if (IS_ERR(hw->base))
|
||||
return PTR_ERR(hw->base);
|
||||
|
||||
for (i = 0; i < hw->soc->nbase_names; i++) {
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
||||
hw->soc->base_names[i]);
|
||||
if (!res) {
|
||||
dev_err(&pdev->dev, "missing IO resource\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
hw->base[i] = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(hw->base[i]))
|
||||
return PTR_ERR(hw->base[i]);
|
||||
}
|
||||
|
||||
hw->nbase = hw->soc->nbase_names;
|
||||
|
||||
err = mtk_pctrl_build_state(pdev);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "build state failed: %d\n", err);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Copy from internal struct mtk_pin_desc to register to the core */
|
||||
pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
|
||||
GFP_KERNEL);
|
||||
if (IS_ERR(pins))
|
||||
return PTR_ERR(pins);
|
||||
|
||||
for (i = 0; i < hw->soc->npins; i++) {
|
||||
pins[i].number = hw->soc->pins[i].number;
|
||||
pins[i].name = hw->soc->pins[i].name;
|
||||
}
|
||||
|
||||
/* Setup pins descriptions per SoC types */
|
||||
mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
|
||||
mtk_desc.npins = hw->soc->npins;
|
||||
mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
|
||||
mtk_desc.custom_params = mtk_custom_bindings;
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
mtk_desc.custom_conf_items = mtk_conf_items;
|
||||
#endif
|
||||
|
||||
err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
|
||||
&hw->pctrl);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = pinctrl_enable(hw->pctrl);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
/* Build gpiochip should be after pinctrl_enable is done */
|
||||
err = mtk_build_gpiochip(hw, pdev->dev.of_node);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Failed to add gpio_chip\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, hw);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2018 MediaTek Inc.
|
||||
*
|
||||
* Author: Sean Wang <sean.wang@mediatek.com>
|
||||
* Zhiyong Tao <zhiyong.tao@mediatek.com>
|
||||
* Hongzhou.Yang <hongzhou.yang@mediatek.com>
|
||||
*/
|
||||
#ifndef __PINCTRL_PARIS_H
|
||||
#define __PINCTRL_PARIS_H
|
||||
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/pinctrl/pinmux.h>
|
||||
#include <linux/pinctrl/pinconf.h>
|
||||
#include <linux/pinctrl/pinconf-generic.h>
|
||||
|
||||
#include "../core.h"
|
||||
#include "../pinconf.h"
|
||||
#include "../pinctrl-utils.h"
|
||||
#include "../pinmux.h"
|
||||
#include "mtk-eint.h"
|
||||
#include "pinctrl-mtk-common-v2.h"
|
||||
|
||||
#define MTK_RANGE(_a) { .range = (_a), .nranges = ARRAY_SIZE(_a), }
|
||||
|
||||
#define MTK_EINT_FUNCTION(_eintmux, _eintnum) \
|
||||
{ \
|
||||
.eint_m = _eintmux, \
|
||||
.eint_n = _eintnum, \
|
||||
}
|
||||
|
||||
#define MTK_FUNCTION(_val, _name) \
|
||||
{ \
|
||||
.muxval = _val, \
|
||||
.name = _name, \
|
||||
}
|
||||
|
||||
#define MTK_PIN(_number, _name, _eint, _drv_n, ...) { \
|
||||
.number = _number, \
|
||||
.name = _name, \
|
||||
.eint = _eint, \
|
||||
.drv_n = _drv_n, \
|
||||
.funcs = (struct mtk_func_desc[]){ \
|
||||
__VA_ARGS__, { } }, \
|
||||
}
|
||||
|
||||
#define PINCTRL_PIN_GROUP(name, id) \
|
||||
{ \
|
||||
name, \
|
||||
id##_pins, \
|
||||
ARRAY_SIZE(id##_pins), \
|
||||
id##_funcs, \
|
||||
}
|
||||
|
||||
int mtk_paris_pinctrl_probe(struct platform_device *pdev,
|
||||
const struct mtk_pin_soc *soc);
|
||||
|
||||
#endif /* __PINCTRL_PARIS_H */
|
||||
Loading…
Reference in New Issue