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drm/radeon/kms: clean HDMI definitions 

We already know same offsets are used for different encoders/transmitters, so
just numeric them instead naming incorrectly. Additionaly we found additional
registers needed for RV770+

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Rafał Miłecki 2010-03-06 13:03:33 +00:00 committed by Dave Airlie
parent d805f50aa1
commit 808032ee29
3 changed files with 13 additions and 8 deletions
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10
drivers/gpu/drm/radeon/r600_hdmi.c
View File

@ -470,27 +470,27 @@ void r600_hdmi_init(struct drm_encoder *encoder)
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
radeon_encoder->hdmi_offset = R600_HDMI_TMDS1;
radeon_encoder->hdmi_offset = R600_HDMI_BLOCK1;
break;
case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
switch (r600_audio_tmds_index(encoder)) {
case 0:
radeon_encoder->hdmi_offset = R600_HDMI_TMDS1;
radeon_encoder->hdmi_offset = R600_HDMI_BLOCK1;
break;
case 1:
radeon_encoder->hdmi_offset = R600_HDMI_TMDS2;
radeon_encoder->hdmi_offset = R600_HDMI_BLOCK2;
break;
default:
radeon_encoder->hdmi_offset = 0;
break;
}
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
radeon_encoder->hdmi_offset = R600_HDMI_TMDS2;
radeon_encoder->hdmi_offset = R600_HDMI_BLOCK2;
break;
case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
radeon_encoder->hdmi_offset = R600_HDMI_DIG;
radeon_encoder->hdmi_offset = R600_HDMI_BLOCK3;
break;
default:

10
drivers/gpu/drm/radeon/r600_reg.h
View File

@ -152,9 +152,9 @@
#define R600_AUDIO_STATUS_BITS 0x73d8
/* HDMI base register addresses */
#define R600_HDMI_TMDS1 0x7400
#define R600_HDMI_TMDS2 0x7700
#define R600_HDMI_DIG 0x7800
#define R600_HDMI_BLOCK1 0x7400
#define R600_HDMI_BLOCK2 0x7700
#define R600_HDMI_BLOCK3 0x7800
/* HDMI registers */
#define R600_HDMI_ENABLE 0x00
@ -185,4 +185,8 @@
#define R600_HDMI_AUDIO_DEBUG_2 0xe8
#define R600_HDMI_AUDIO_DEBUG_3 0xec
/* HDMI additional config base register addresses */
#define R600_HDMI_CONFIG1 0x7600
#define R600_HDMI_CONFIG2 0x7a00
#endif

1
drivers/gpu/drm/radeon/radeon_mode.h
View File

@ -345,6 +345,7 @@ struct radeon_encoder {
struct drm_display_mode native_mode;
void *enc_priv;
int hdmi_offset;
int hdmi_config_offset;
int hdmi_audio_workaround;
int hdmi_buffer_status;
};