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net: mvpp2: simplify MVPP2_PRS_RI_* definitions
Some of the MVPP2_PRS_RI_* definitions use the ~(value) syntax, which doesn't compile nicely on 64-bit. Moreover, those definitions are in fact unneeded, since they are always used in combination with a bit mask that ensures only the appropriate bits are modified. Therefore, such definitions should just be set to 0x0. In addition, as suggested by Russell King, we change the _MASK definitions to also use the BIT() macro so that it is clear they are related to the values defined afterwards. For example: #define MVPP2_PRS_RI_L2_CAST_MASK 0x600 #define MVPP2_PRS_RI_L2_UCAST ~(BIT(9) | BIT(10)) #define MVPP2_PRS_RI_L2_MCAST BIT(9) #define MVPP2_PRS_RI_L2_BCAST BIT(10) becomes #define MVPP2_PRS_RI_L2_CAST_MASK (BIT(9) | BIT(10)) #define MVPP2_PRS_RI_L2_UCAST 0x0 #define MVPP2_PRS_RI_L2_MCAST BIT(9) #define MVPP2_PRS_RI_L2_BCAST BIT(10) Because the values (MVPP2_PRS_RI_L2_UCAST, MVPP2_PRS_RI_L2_MCAST and MVPP2_PRS_RI_L2_BCAST) are always applied with MVPP2_PRS_RI_L2_CAST_MASK, and therefore there is no need for MVPP2_PRS_RI_L2_UCAST to be defined as ~(BIT(9) | BIT(10)). It fixes the following warnings when building the driver on a 64-bit platform (which is not possible as of this commit, but will be enabled in a follow-up commit): drivers/net/ethernet/marvell/mvpp2.c: In function ‘mvpp2_prs_mac_promisc_set’: drivers/net/ethernet/marvell/mvpp2.c:524:33: warning: large integer implicitly truncated to unsigned type [-Woverflow] #define MVPP2_PRS_RI_L2_UCAST ~(BIT(9) | BIT(10)) ^ drivers/net/ethernet/marvell/mvpp2.c:1459:33: note: in expansion of macro ‘MVPP2_PRS_RI_L2_UCAST’ mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L2_UCAST, Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -510,28 +510,28 @@ enum mvpp2_tag_type {
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/* Sram result info bits assignment */
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#define MVPP2_PRS_RI_MAC_ME_MASK 0x1
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#define MVPP2_PRS_RI_DSA_MASK 0x2
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#define MVPP2_PRS_RI_VLAN_MASK 0xc
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#define MVPP2_PRS_RI_VLAN_NONE ~(BIT(2) | BIT(3))
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#define MVPP2_PRS_RI_VLAN_MASK (BIT(2) | BIT(3))
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#define MVPP2_PRS_RI_VLAN_NONE 0x0
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#define MVPP2_PRS_RI_VLAN_SINGLE BIT(2)
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#define MVPP2_PRS_RI_VLAN_DOUBLE BIT(3)
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#define MVPP2_PRS_RI_VLAN_TRIPLE (BIT(2) | BIT(3))
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#define MVPP2_PRS_RI_CPU_CODE_MASK 0x70
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#define MVPP2_PRS_RI_CPU_CODE_RX_SPEC BIT(4)
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#define MVPP2_PRS_RI_L2_CAST_MASK 0x600
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#define MVPP2_PRS_RI_L2_UCAST ~(BIT(9) | BIT(10))
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#define MVPP2_PRS_RI_L2_CAST_MASK (BIT(9) | BIT(10))
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#define MVPP2_PRS_RI_L2_UCAST 0x0
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#define MVPP2_PRS_RI_L2_MCAST BIT(9)
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#define MVPP2_PRS_RI_L2_BCAST BIT(10)
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#define MVPP2_PRS_RI_PPPOE_MASK 0x800
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#define MVPP2_PRS_RI_L3_PROTO_MASK 0x7000
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#define MVPP2_PRS_RI_L3_UN ~(BIT(12) | BIT(13) | BIT(14))
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#define MVPP2_PRS_RI_L3_PROTO_MASK (BIT(12) | BIT(13) | BIT(14))
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#define MVPP2_PRS_RI_L3_UN 0x0
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#define MVPP2_PRS_RI_L3_IP4 BIT(12)
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#define MVPP2_PRS_RI_L3_IP4_OPT BIT(13)
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#define MVPP2_PRS_RI_L3_IP4_OTHER (BIT(12) | BIT(13))
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#define MVPP2_PRS_RI_L3_IP6 BIT(14)
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#define MVPP2_PRS_RI_L3_IP6_EXT (BIT(12) | BIT(14))
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#define MVPP2_PRS_RI_L3_ARP (BIT(13) | BIT(14))
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#define MVPP2_PRS_RI_L3_ADDR_MASK 0x18000
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#define MVPP2_PRS_RI_L3_UCAST ~(BIT(15) | BIT(16))
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#define MVPP2_PRS_RI_L3_ADDR_MASK (BIT(15) | BIT(16))
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#define MVPP2_PRS_RI_L3_UCAST 0x0
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#define MVPP2_PRS_RI_L3_MCAST BIT(15)
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#define MVPP2_PRS_RI_L3_BCAST (BIT(15) | BIT(16))
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#define MVPP2_PRS_RI_IP_FRAG_MASK 0x20000
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