mirror of https://gitee.com/openkylin/linux.git
x86, 64bit: Use a #PF handler to materialize early mappings on demand
Linear mode (CR0.PG = 0) is mutually exclusive with 64-bit mode; all 64-bit code has to use page tables. This makes it awkward before we have first set up properly all-covering page tables to access objects that are outside the static kernel range. So far we have dealt with that simply by mapping a fixed amount of low memory, but that fails in at least two upcoming use cases: 1. We will support load and run kernel, struct boot_params, ramdisk, command line, etc. above the 4 GiB mark. 2. need to access ramdisk early to get microcode to update that as early possible. We could use early_iomap to access them too, but it will make code to messy and hard to be unified with 32 bit. Hence, set up a #PF table and use a fixed number of buffers to set up page tables on demand. If the buffers fill up then we simply flush them and start over. These buffers are all in __initdata, so it does not increase RAM usage at runtime. Thus, with the help of the #PF handler, we can set the final kernel mapping from blank, and switch to init_level4_pgt later. During the switchover in head_64.S, before #PF handler is available, we use three pages to handle kernel crossing 1G, 512G boundaries with sharing page by playing games with page aliasing: the same page is mapped twice in the higher-level tables with appropriate wraparound. The kernel region itself will be properly mapped; other mappings may be spurious. early_make_pgtable is using kernel high mapping address to access pages to set page table. -v4: Add phys_base offset to make kexec happy, and add init_mapping_kernel() - Yinghai -v5: fix compiling with xen, and add back ident level3 and level2 for xen also move back init_level4_pgt from BSS to DATA again. because we have to clear it anyway. - Yinghai -v6: switch to init_level4_pgt in init_mem_mapping. - Yinghai -v7: remove not needed clear_page for init_level4_page it is with fill 512,8,0 already in head_64.S - Yinghai -v8: we need to keep that handler alive until init_mem_mapping and don't let early_trap_init to trash that early #PF handler. So split early_trap_pf_init out and move it down. - Yinghai -v9: switchover only cover kernel space instead of 1G so could avoid touch possible mem holes. - Yinghai -v11: change far jmp back to far return to initial_code, that is needed to fix failure that is reported by Konrad on AMD systems. - Yinghai Signed-off-by: Yinghai Lu <yinghai@kernel.org> Link: http://lkml.kernel.org/r/1359058816-7615-12-git-send-email-yinghai@kernel.org Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
This commit is contained in:
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8170e6bed4
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@ -1,6 +1,8 @@
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#ifndef _ASM_X86_PGTABLE_64_DEFS_H
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#define _ASM_X86_PGTABLE_64_DEFS_H
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#include <asm/sparsemem.h>
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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@ -60,4 +62,6 @@ typedef struct { pteval_t pte; } pte_t;
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#define MODULES_END _AC(0xffffffffff000000, UL)
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#define MODULES_LEN (MODULES_END - MODULES_VADDR)
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#define EARLY_DYNAMIC_PAGE_TABLES 64
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#endif /* _ASM_X86_PGTABLE_64_DEFS_H */
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@ -731,6 +731,7 @@ extern void enable_sep_cpu(void);
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extern int sysenter_setup(void);
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extern void early_trap_init(void);
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void early_trap_pf_init(void);
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/* Defined in head.S */
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extern struct desc_ptr early_gdt_descr;
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@ -27,11 +27,73 @@
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#include <asm/bios_ebda.h>
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#include <asm/bootparam_utils.h>
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static void __init zap_identity_mappings(void)
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/*
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* Manage page tables very early on.
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*/
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extern pgd_t early_level4_pgt[PTRS_PER_PGD];
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extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD];
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static unsigned int __initdata next_early_pgt = 2;
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/* Wipe all early page tables except for the kernel symbol map */
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static void __init reset_early_page_tables(void)
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{
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pgd_t *pgd = pgd_offset_k(0UL);
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pgd_clear(pgd);
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__flush_tlb_all();
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unsigned long i;
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for (i = 0; i < PTRS_PER_PGD-1; i++)
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early_level4_pgt[i].pgd = 0;
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next_early_pgt = 0;
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write_cr3(__pa(early_level4_pgt));
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}
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/* Create a new PMD entry */
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int __init early_make_pgtable(unsigned long address)
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{
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unsigned long physaddr = address - __PAGE_OFFSET;
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unsigned long i;
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pgdval_t pgd, *pgd_p;
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pudval_t *pud_p;
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pmdval_t pmd, *pmd_p;
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/* Invalid address or early pgt is done ? */
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if (physaddr >= MAXMEM || read_cr3() != __pa(early_level4_pgt))
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return -1;
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i = (address >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1);
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pgd_p = &early_level4_pgt[i].pgd;
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pgd = *pgd_p;
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/*
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* The use of __START_KERNEL_map rather than __PAGE_OFFSET here is
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* critical -- __PAGE_OFFSET would point us back into the dynamic
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* range and we might end up looping forever...
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*/
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if (pgd && next_early_pgt < EARLY_DYNAMIC_PAGE_TABLES) {
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pud_p = (pudval_t *)((pgd & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
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} else {
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if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES-1)
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reset_early_page_tables();
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pud_p = (pudval_t *)early_dynamic_pgts[next_early_pgt++];
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for (i = 0; i < PTRS_PER_PUD; i++)
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pud_p[i] = 0;
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*pgd_p = (pgdval_t)pud_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
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}
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i = (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
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pud_p += i;
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pmd_p = (pmdval_t *)early_dynamic_pgts[next_early_pgt++];
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pmd = (physaddr & PUD_MASK) + (__PAGE_KERNEL_LARGE & ~_PAGE_GLOBAL);
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for (i = 0; i < PTRS_PER_PMD; i++) {
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pmd_p[i] = pmd;
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pmd += PMD_SIZE;
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}
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*pud_p = (pudval_t)pmd_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
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return 0;
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}
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/* Don't add a printk in there. printk relies on the PDA which is not initialized
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@ -72,12 +134,13 @@ void __init x86_64_start_kernel(char * real_mode_data)
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(__START_KERNEL & PGDIR_MASK)));
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BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
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/* Kill off the identity-map trampoline */
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reset_early_page_tables();
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/* clear bss before set_intr_gate with early_idt_handler */
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clear_bss();
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/* Make NULL pointers segfault */
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zap_identity_mappings();
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/* XXX - this is wrong... we need to build page tables from scratch */
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max_pfn_mapped = KERNEL_IMAGE_SIZE >> PAGE_SHIFT;
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for (i = 0; i < NUM_EXCEPTION_VECTORS; i++) {
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@ -94,6 +157,10 @@ void __init x86_64_start_kernel(char * real_mode_data)
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if (console_loglevel == 10)
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early_printk("Kernel alive\n");
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clear_page(init_level4_pgt);
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/* set init_level4_pgt kernel high mapping*/
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init_level4_pgt[511] = early_level4_pgt[511];
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x86_64_start_reservations(real_mode_data);
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}
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@ -47,14 +47,13 @@ L3_START_KERNEL = pud_index(__START_KERNEL_map)
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.code64
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.globl startup_64
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startup_64:
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/*
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* At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1,
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* and someone has loaded an identity mapped page table
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* for us. These identity mapped page tables map all of the
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* kernel pages and possibly all of memory.
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*
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* %esi holds a physical pointer to real_mode_data.
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* %rsi holds a physical pointer to real_mode_data.
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*
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* We come here either directly from a 64bit bootloader, or from
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* arch/x86_64/boot/compressed/head.S.
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@ -66,7 +65,8 @@ startup_64:
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* tables and then reload them.
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*/
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/* Compute the delta between the address I am compiled to run at and the
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/*
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* Compute the delta between the address I am compiled to run at and the
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* address I am actually running at.
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*/
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leaq _text(%rip), %rbp
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@ -78,45 +78,62 @@ startup_64:
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testl %eax, %eax
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jnz bad_address
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/* Is the address too large? */
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leaq _text(%rip), %rdx
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movq $PGDIR_SIZE, %rax
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cmpq %rax, %rdx
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jae bad_address
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/* Fixup the physical addresses in the page table
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/*
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* Is the address too large?
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*/
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addq %rbp, init_level4_pgt + 0(%rip)
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addq %rbp, init_level4_pgt + (L4_PAGE_OFFSET*8)(%rip)
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addq %rbp, init_level4_pgt + (L4_START_KERNEL*8)(%rip)
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leaq _text(%rip), %rax
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shrq $MAX_PHYSMEM_BITS, %rax
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jnz bad_address
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addq %rbp, level3_ident_pgt + 0(%rip)
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/*
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* Fixup the physical addresses in the page table
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*/
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addq %rbp, early_level4_pgt + (L4_START_KERNEL*8)(%rip)
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addq %rbp, level3_kernel_pgt + (510*8)(%rip)
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addq %rbp, level3_kernel_pgt + (511*8)(%rip)
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addq %rbp, level2_fixmap_pgt + (506*8)(%rip)
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/* Add an Identity mapping if I am above 1G */
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/*
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* Set up the identity mapping for the switchover. These
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* entries should *NOT* have the global bit set! This also
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* creates a bunch of nonsense entries but that is fine --
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* it avoids problems around wraparound.
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*/
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leaq _text(%rip), %rdi
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andq $PMD_PAGE_MASK, %rdi
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leaq early_level4_pgt(%rip), %rbx
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movq %rdi, %rax
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shrq $PGDIR_SHIFT, %rax
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leaq (4096 + _KERNPG_TABLE)(%rbx), %rdx
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movq %rdx, 0(%rbx,%rax,8)
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movq %rdx, 8(%rbx,%rax,8)
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addq $4096, %rdx
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movq %rdi, %rax
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shrq $PUD_SHIFT, %rax
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andq $(PTRS_PER_PUD - 1), %rax
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jz ident_complete
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leaq (level2_spare_pgt - __START_KERNEL_map + _KERNPG_TABLE)(%rbp), %rdx
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leaq level3_ident_pgt(%rip), %rbx
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movq %rdx, 0(%rbx, %rax, 8)
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andl $(PTRS_PER_PUD-1), %eax
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movq %rdx, (4096+0)(%rbx,%rax,8)
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movq %rdx, (4096+8)(%rbx,%rax,8)
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addq $8192, %rbx
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movq %rdi, %rax
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shrq $PMD_SHIFT, %rax
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andq $(PTRS_PER_PMD - 1), %rax
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leaq __PAGE_KERNEL_IDENT_LARGE_EXEC(%rdi), %rdx
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leaq level2_spare_pgt(%rip), %rbx
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movq %rdx, 0(%rbx, %rax, 8)
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ident_complete:
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shrq $PMD_SHIFT, %rdi
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addq $(__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL), %rax
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leaq (_end - 1)(%rip), %rcx
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shrq $PMD_SHIFT, %rcx
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subq %rdi, %rcx
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incl %ecx
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1:
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andq $(PTRS_PER_PMD - 1), %rdi
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movq %rax, (%rbx,%rdi,8)
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incq %rdi
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addq $PMD_SIZE, %rax
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decl %ecx
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jnz 1b
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/*
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* Fixup the kernel text+data virtual addresses. Note that
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* cleanup_highmap() fixes this up along with the mappings
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* beyond _end.
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*/
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leaq level2_kernel_pgt(%rip), %rdi
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leaq 4096(%rdi), %r8
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/* See if it is a valid page table entry */
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/* Fixup phys_base */
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addq %rbp, phys_base(%rip)
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/* Due to ENTRY(), sometimes the empty space gets filled with
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* zeros. Better take a jmp than relying on empty space being
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* filled with 0x90 (nop)
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*/
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jmp secondary_startup_64
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movq $(early_level4_pgt - __START_KERNEL_map), %rax
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jmp 1f
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ENTRY(secondary_startup_64)
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/*
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* At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1,
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* and someone has loaded a mapped page table.
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*
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* %esi holds a physical pointer to real_mode_data.
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* %rsi holds a physical pointer to real_mode_data.
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*
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* We come here either from startup_64 (using physical addresses)
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* or from trampoline.S (using virtual addresses).
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* after the boot processor executes this code.
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*/
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movq $(init_level4_pgt - __START_KERNEL_map), %rax
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1:
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/* Enable PAE mode and PGE */
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movl $(X86_CR4_PAE | X86_CR4_PGE), %eax
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movq %rax, %cr4
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movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx
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movq %rcx, %cr4
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/* Setup early boot stage 4 level pagetables. */
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movq $(init_level4_pgt - __START_KERNEL_map), %rax
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addq phys_base(%rip), %rax
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movq %rax, %cr3
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movq %rax, %cr0
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/* Setup a boot time stack */
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movq stack_start(%rip),%rsp
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movq stack_start(%rip), %rsp
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/* zero EFLAGS after setting rsp */
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pushq $0
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@ -236,15 +251,33 @@ ENTRY(secondary_startup_64)
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movl initial_gs+4(%rip),%edx
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wrmsr
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/* esi is pointer to real mode structure with interesting info.
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/* rsi is pointer to real mode structure with interesting info.
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pass it to C */
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movl %esi, %edi
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movq %rsi, %rdi
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/* Finally jump to run C code and to be on real kernel address
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* Since we are running on identity-mapped space we have to jump
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* to the full 64bit address, this is only possible as indirect
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* jump. In addition we need to ensure %cs is set so we make this
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* a far return.
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*
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* Note: do not change to far jump indirect with 64bit offset.
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*
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* AMD does not support far jump indirect with 64bit offset.
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* AMD64 Architecture Programmer's Manual, Volume 3: states only
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* JMP FAR mem16:16 FF /5 Far jump indirect,
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* with the target specified by a far pointer in memory.
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* JMP FAR mem16:32 FF /5 Far jump indirect,
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* with the target specified by a far pointer in memory.
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*
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* Intel64 does support 64bit offset.
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* Software Developer Manual Vol 2: states:
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* FF /5 JMP m16:16 Jump far, absolute indirect,
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* address given in m16:16
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* FF /5 JMP m16:32 Jump far, absolute indirect,
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* address given in m16:32.
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* REX.W + FF /5 JMP m16:64 Jump far, absolute indirect,
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* address given in m16:64.
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*/
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movq initial_code(%rip),%rax
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pushq $0 # fake return address to stop unwinder
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/* SMP bootup changes these two */
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__REFDATA
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.align 8
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ENTRY(initial_code)
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.balign 8
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GLOBAL(initial_code)
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.quad x86_64_start_kernel
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ENTRY(initial_gs)
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GLOBAL(initial_gs)
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.quad INIT_PER_CPU_VAR(irq_stack_union)
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ENTRY(stack_start)
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GLOBAL(stack_start)
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.quad init_thread_union+THREAD_SIZE-8
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.word 0
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__FINITDATA
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bad_address:
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jmp bad_address
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.section ".init.text","ax"
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__INIT
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.globl early_idt_handlers
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early_idt_handlers:
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# 104(%rsp) %rflags
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pushq %r11 # 0(%rsp)
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cmpl $__KERNEL_CS,96(%rsp)
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jne 10f
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jne 11f
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cmpl $14,72(%rsp) # Page fault?
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jnz 10f
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GET_CR2_INTO(%rdi) # can clobber any volatile register if pv
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call early_make_pgtable
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andl %eax,%eax
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jz 20f # All good
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10:
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leaq 88(%rsp),%rdi # Pointer to %rip
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call early_fixup_exception
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andl %eax,%eax
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jnz 20f # Found an exception entry
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10:
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11:
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#ifdef CONFIG_EARLY_PRINTK
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GET_CR2_INTO(%r9) # can clobber any volatile register if pv
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movl 80(%rsp),%r8d # error code
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1: hlt
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jmp 1b
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20: # Exception table entry found
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20: # Exception table entry found or page table generated
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popq %r11
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popq %r10
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popq %r9
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@ -364,6 +405,8 @@ ENTRY(early_idt_handler)
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decl early_recursion_flag(%rip)
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INTERRUPT_RETURN
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__INITDATA
|
||||
|
||||
.balign 4
|
||||
early_recursion_flag:
|
||||
.long 0
|
||||
|
@ -374,11 +417,10 @@ early_idt_msg:
|
|||
early_idt_ripmsg:
|
||||
.asciz "RIP %s\n"
|
||||
#endif /* CONFIG_EARLY_PRINTK */
|
||||
.previous
|
||||
|
||||
#define NEXT_PAGE(name) \
|
||||
.balign PAGE_SIZE; \
|
||||
ENTRY(name)
|
||||
GLOBAL(name)
|
||||
|
||||
/* Automate the creation of 1 to 1 mapping pmd entries */
|
||||
#define PMDS(START, PERM, COUNT) \
|
||||
|
@ -388,24 +430,37 @@ ENTRY(name)
|
|||
i = i + 1 ; \
|
||||
.endr
|
||||
|
||||
.data
|
||||
/*
|
||||
* This default setting generates an ident mapping at address 0x100000
|
||||
* and a mapping for the kernel that precisely maps virtual address
|
||||
* 0xffffffff80000000 to physical address 0x000000. (always using
|
||||
* 2Mbyte large pages provided by PAE mode)
|
||||
*/
|
||||
NEXT_PAGE(init_level4_pgt)
|
||||
.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
|
||||
.org init_level4_pgt + L4_PAGE_OFFSET*8, 0
|
||||
.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
|
||||
.org init_level4_pgt + L4_START_KERNEL*8, 0
|
||||
/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
|
||||
__INITDATA
|
||||
NEXT_PAGE(early_level4_pgt)
|
||||
.fill 511,8,0
|
||||
.quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE
|
||||
|
||||
NEXT_PAGE(early_dynamic_pgts)
|
||||
.fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0
|
||||
|
||||
.data
|
||||
|
||||
#ifndef CONFIG_XEN
|
||||
NEXT_PAGE(init_level4_pgt)
|
||||
.fill 512,8,0
|
||||
#else
|
||||
NEXT_PAGE(init_level4_pgt)
|
||||
.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
|
||||
.org init_level4_pgt + L4_PAGE_OFFSET*8, 0
|
||||
.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
|
||||
.org init_level4_pgt + L4_START_KERNEL*8, 0
|
||||
/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
|
||||
.quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE
|
||||
|
||||
NEXT_PAGE(level3_ident_pgt)
|
||||
.quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
|
||||
.fill 511,8,0
|
||||
.fill 511, 8, 0
|
||||
NEXT_PAGE(level2_ident_pgt)
|
||||
/* Since I easily can, map the first 1G.
|
||||
* Don't set NX because code runs from these pages.
|
||||
*/
|
||||
PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
|
||||
#endif
|
||||
|
||||
NEXT_PAGE(level3_kernel_pgt)
|
||||
.fill L3_START_KERNEL,8,0
|
||||
|
@ -413,21 +468,6 @@ NEXT_PAGE(level3_kernel_pgt)
|
|||
.quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
|
||||
.quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE
|
||||
|
||||
NEXT_PAGE(level2_fixmap_pgt)
|
||||
.fill 506,8,0
|
||||
.quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE
|
||||
/* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */
|
||||
.fill 5,8,0
|
||||
|
||||
NEXT_PAGE(level1_fixmap_pgt)
|
||||
.fill 512,8,0
|
||||
|
||||
NEXT_PAGE(level2_ident_pgt)
|
||||
/* Since I easily can, map the first 1G.
|
||||
* Don't set NX because code runs from these pages.
|
||||
*/
|
||||
PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
|
||||
|
||||
NEXT_PAGE(level2_kernel_pgt)
|
||||
/*
|
||||
* 512 MB kernel mapping. We spend a full page on this pagetable
|
||||
|
@ -442,11 +482,16 @@ NEXT_PAGE(level2_kernel_pgt)
|
|||
PMDS(0, __PAGE_KERNEL_LARGE_EXEC,
|
||||
KERNEL_IMAGE_SIZE/PMD_SIZE)
|
||||
|
||||
NEXT_PAGE(level2_spare_pgt)
|
||||
.fill 512, 8, 0
|
||||
NEXT_PAGE(level2_fixmap_pgt)
|
||||
.fill 506,8,0
|
||||
.quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE
|
||||
/* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */
|
||||
.fill 5,8,0
|
||||
|
||||
NEXT_PAGE(level1_fixmap_pgt)
|
||||
.fill 512,8,0
|
||||
|
||||
#undef PMDS
|
||||
#undef NEXT_PAGE
|
||||
|
||||
.data
|
||||
.align 16
|
||||
|
@ -472,6 +517,5 @@ ENTRY(nmi_idt_table)
|
|||
.skip IDT_ENTRIES * 16
|
||||
|
||||
__PAGE_ALIGNED_BSS
|
||||
.align PAGE_SIZE
|
||||
ENTRY(empty_zero_page)
|
||||
NEXT_PAGE(empty_zero_page)
|
||||
.skip PAGE_SIZE
|
||||
|
|
|
@ -1005,6 +1005,8 @@ void __init setup_arch(char **cmdline_p)
|
|||
|
||||
init_mem_mapping();
|
||||
|
||||
early_trap_pf_init();
|
||||
|
||||
setup_real_mode();
|
||||
|
||||
memblock.current_limit = get_max_mapped();
|
||||
|
|
|
@ -688,10 +688,19 @@ void __init early_trap_init(void)
|
|||
set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
|
||||
/* int3 can be called from all */
|
||||
set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
|
||||
#ifdef CONFIG_X86_32
|
||||
set_intr_gate(X86_TRAP_PF, &page_fault);
|
||||
#endif
|
||||
load_idt(&idt_descr);
|
||||
}
|
||||
|
||||
void __init early_trap_pf_init(void)
|
||||
{
|
||||
#ifdef CONFIG_X86_64
|
||||
set_intr_gate(X86_TRAP_PF, &page_fault);
|
||||
#endif
|
||||
}
|
||||
|
||||
void __init trap_init(void)
|
||||
{
|
||||
int i;
|
||||
|
|
|
@ -446,9 +446,10 @@ void __init init_mem_mapping(void)
|
|||
}
|
||||
#else
|
||||
early_ioremap_page_table_range_init();
|
||||
#endif
|
||||
|
||||
load_cr3(swapper_pg_dir);
|
||||
__flush_tlb_all();
|
||||
#endif
|
||||
|
||||
early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue