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PCI: brcmstb: Add suspend and resume pm_ops
Broadcom Set-top (BrcmSTB) boards typically support S2, S3, and S5 suspend and resume. Now the PCIe driver may do so as well. Link: https://lore.kernel.org/r/20200911175232.19016-5-james.quinlan@broadcom.com Signed-off-by: Jim Quinlan <jquinlan@broadcom.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
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@ -978,6 +978,47 @@ static void brcm_pcie_turn_off(struct brcm_pcie *pcie)
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brcm_pcie_bridge_sw_init_set(pcie, 1);
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}
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static int brcm_pcie_suspend(struct device *dev)
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{
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struct brcm_pcie *pcie = dev_get_drvdata(dev);
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brcm_pcie_turn_off(pcie);
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clk_disable_unprepare(pcie->clk);
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return 0;
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}
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static int brcm_pcie_resume(struct device *dev)
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{
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struct brcm_pcie *pcie = dev_get_drvdata(dev);
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void __iomem *base;
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u32 tmp;
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int ret;
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base = pcie->base;
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clk_prepare_enable(pcie->clk);
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/* Take bridge out of reset so we can access the SERDES reg */
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brcm_pcie_bridge_sw_init_set(pcie, 0);
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/* SERDES_IDDQ = 0 */
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tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
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u32p_replace_bits(&tmp, 0, PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
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writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
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/* wait for serdes to be stable */
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udelay(100);
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ret = brcm_pcie_setup(pcie);
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if (ret)
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return ret;
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if (pcie->msi)
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brcm_msi_set_regs(pcie->msi);
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return 0;
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}
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static void __brcm_pcie_remove(struct brcm_pcie *pcie)
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{
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brcm_msi_remove(pcie);
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@ -1087,12 +1128,18 @@ static int brcm_pcie_probe(struct platform_device *pdev)
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MODULE_DEVICE_TABLE(of, brcm_pcie_match);
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static const struct dev_pm_ops brcm_pcie_pm_ops = {
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.suspend = brcm_pcie_suspend,
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.resume = brcm_pcie_resume,
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};
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static struct platform_driver brcm_pcie_driver = {
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.probe = brcm_pcie_probe,
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.remove = brcm_pcie_remove,
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.driver = {
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.name = "brcm-pcie",
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.of_match_table = brcm_pcie_match,
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.pm = &brcm_pcie_pm_ops,
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},
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};
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module_platform_driver(brcm_pcie_driver);
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