mirror of https://gitee.com/openkylin/linux.git
ASoC: fsl_ssi: enable IPG clock during AC'97 reg access
IPG clock have to be enabled during AC'97 CODEC register access in fsl_ssi driver. Signed-off-by: Maciej Szmigiero <mail@maciej.szmigiero.name> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1127,10 +1127,17 @@ static void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
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struct regmap *regs = fsl_ac97_data->regs;
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unsigned int lreg;
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unsigned int lval;
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int ret;
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if (reg > 0x7f)
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return;
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ret = clk_prepare_enable(fsl_ac97_data->clk);
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if (ret) {
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pr_err("ac97 write clk_prepare_enable failed: %d\n",
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ret);
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return;
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}
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lreg = reg << 12;
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regmap_write(regs, CCSR_SSI_SACADD, lreg);
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@ -1141,6 +1148,8 @@ static void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
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regmap_update_bits(regs, CCSR_SSI_SACNT, CCSR_SSI_SACNT_RDWR_MASK,
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CCSR_SSI_SACNT_WR);
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udelay(100);
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clk_disable_unprepare(fsl_ac97_data->clk);
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}
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static unsigned short fsl_ssi_ac97_read(struct snd_ac97 *ac97,
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@ -1151,6 +1160,14 @@ static unsigned short fsl_ssi_ac97_read(struct snd_ac97 *ac97,
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unsigned short val = -1;
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u32 reg_val;
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unsigned int lreg;
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int ret;
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ret = clk_prepare_enable(fsl_ac97_data->clk);
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if (ret) {
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pr_err("ac97 read clk_prepare_enable failed: %d\n",
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ret);
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return -1;
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}
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lreg = (reg & 0x7f) << 12;
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regmap_write(regs, CCSR_SSI_SACADD, lreg);
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@ -1162,6 +1179,8 @@ static unsigned short fsl_ssi_ac97_read(struct snd_ac97 *ac97,
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regmap_read(regs, CCSR_SSI_SACDAT, ®_val);
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val = (reg_val >> 4) & 0xffff;
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clk_disable_unprepare(fsl_ac97_data->clk);
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return val;
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}
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