mirror of https://gitee.com/openkylin/linux.git
staging: ccree: remove useless debug code
Remove a bunch of useless debug code ifdef'ed out Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1834,51 +1834,6 @@ static int cc_gcm(struct aead_request *req, struct cc_hw_desc desc[],
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return 0;
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}
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#ifdef CC_DEBUG
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static void cc_dump_gcm(const char *title, struct aead_request *req)
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{
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struct crypto_aead *tfm = crypto_aead_reqtfm(req);
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struct cc_aead_ctx *ctx = crypto_aead_ctx(tfm);
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struct aead_req_ctx *req_ctx = aead_request_ctx(req);
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if (ctx->cipher_mode != DRV_CIPHER_GCTR)
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return;
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if (title) {
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dev_dbg(dev, "----------------------------------------------------------------------------------");
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dev_dbg(dev, "%s\n", title);
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}
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dev_dbg(dev, "cipher_mode %d, authsize %d, enc_keylen %d, assoclen %d, cryptlen %d\n",
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ctx->cipher_mode, ctx->authsize, ctx->enc_keylen,
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req->assoclen, req_ctx->cryptlen);
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if (ctx->enckey)
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dump_byte_array("mac key", ctx->enckey, 16);
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dump_byte_array("req->iv", req->iv, AES_BLOCK_SIZE);
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dump_byte_array("gcm_iv_inc1", req_ctx->gcm_iv_inc1, AES_BLOCK_SIZE);
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dump_byte_array("gcm_iv_inc2", req_ctx->gcm_iv_inc2, AES_BLOCK_SIZE);
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dump_byte_array("hkey", req_ctx->hkey, AES_BLOCK_SIZE);
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dump_byte_array("mac_buf", req_ctx->mac_buf, AES_BLOCK_SIZE);
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dump_byte_array("gcm_len_block", req_ctx->gcm_len_block.len_a,
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AES_BLOCK_SIZE);
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if (req->src && req->cryptlen)
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dump_byte_array("req->src", sg_virt(req->src),
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req->cryptlen + req->assoclen);
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if (req->dst)
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dump_byte_array("req->dst", sg_virt(req->dst),
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req->cryptlen + ctx->authsize + req->assoclen);
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}
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#endif
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static int config_gcm_context(struct aead_request *req)
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{
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struct crypto_aead *tfm = crypto_aead_reqtfm(req);
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@ -23,11 +23,8 @@
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#include <linux/version.h>
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//#define FLUSH_CACHE_ALL
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//#define COMPLETION_DELAY
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//#define CC_DUMP_DESCS
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// #define CC_DUMP_BYTES
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// #define CC_DEBUG
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/* was 32 bit, but for juno's sake it was enlarged to 48 bit */
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#define DMA_BIT_MASK_LEN 48
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@ -446,19 +446,6 @@ static int cc7x_probe(struct platform_device *plat_dev)
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{
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int rc;
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struct device *dev = &plat_dev->dev;
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#if defined(CONFIG_ARM) && defined(CC_DEBUG)
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u32 ctr, cacheline_size;
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asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
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cacheline_size = 4 << ((ctr >> 16) & 0xf);
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dev_dbg(dev, "CP15(L1_CACHE_BYTES) = %u , Kconfig(L1_CACHE_BYTES) = %u\n",
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cacheline_size, L1_CACHE_BYTES);
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asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r" (ctr));
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dev_dbg(dev, "Main ID register (MIDR): Implementer 0x%02X, Arch 0x%01X, Part 0x%03X, Rev r%dp%d\n",
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(ctr >> 24), (ctr >> 16) & 0xF, (ctr >> 4) & 0xFFF,
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(ctr >> 20) & 0xF, ctr & 0xF);
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#endif
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/* Map registers space */
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rc = init_cc_resources(plat_dev);
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@ -20,9 +20,6 @@
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <crypto/ctr.h>
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#ifdef FLUSH_CACHE_ALL
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#include <asm/cacheflush.h>
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#endif
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#include <linux/pm_runtime.h>
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#include "ssi_driver.h"
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#include "ssi_buffer_mgr.h"
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@ -359,9 +356,6 @@ int send_request(struct cc_drvdata *drvdata, struct cc_crypto_req *cc_req,
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dev_dbg(dev, "Enqueue request head=%u\n", req_mgr_h->req_queue_head);
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#ifdef FLUSH_CACHE_ALL
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flush_cache_all();
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#endif
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/*
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* We are about to push command to the HW via the command registers
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* that may refernece hsot memory. We need to issue a memory barrier
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@ -493,23 +487,6 @@ static void proc_completions(struct cc_drvdata *drvdata)
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cc_req = &request_mgr_handle->req_queue[*tail];
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#ifdef FLUSH_CACHE_ALL
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flush_cache_all();
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#endif
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#ifdef COMPLETION_DELAY
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/* Delay */
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{
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u32 axi_err;
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int i;
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dev_info(dev, "Delay\n");
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for (i = 0; i < 1000000; i++)
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axi_err = cc_ioread(drvdata,
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CC_REG(AXIM_MON_ERR));
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}
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#endif /* COMPLETION_DELAY */
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if (cc_req->user_cb)
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cc_req->user_cb(dev, cc_req->user_arg);
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*tail = (*tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1);
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