mirror of https://gitee.com/openkylin/linux.git
dt-bindings: mtd: Convert Denali NAND controller to json-schema
Convert the Denali NAND controller binding to DT schema format. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Masahiro Yamada
Rob Herring
parent
8dbdf23ae3
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82ba499712
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/denali,nand.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Denali NAND controller
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maintainers:
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- Masahiro Yamada <yamada.masahiro@socionext.com>
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properties:
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compatible:
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enum:
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- altr,socfpga-denali-nand
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- socionext,uniphier-denali-nand-v5a
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- socionext,uniphier-denali-nand-v5b
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reg-names:
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description: |
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There are two register regions:
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nand_data: host data/command interface
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denali_reg: register interface
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items:
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- const: nand_data
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- const: denali_reg
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reg:
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minItems: 2
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maxItems: 2
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interrupts:
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maxItems: 1
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clock-names:
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description: |
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There are three clocks:
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nand: controller core clock
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nand_x: bus interface clock
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ecc: ECC circuit clock
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items:
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- const: nand
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- const: nand_x
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- const: ecc
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clocks:
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minItems: 3
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maxItems: 3
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reset-names:
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description: |
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There are two optional resets:
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nand: controller core reset
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reg: register reset
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oneOf:
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- items:
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- const: nand
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- const: reg
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- const: nand
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- const: reg
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resets:
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minItems: 1
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maxItems: 2
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allOf:
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- $ref: nand-controller.yaml
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- if:
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properties:
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compatible:
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contains:
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const: altr,socfpga-denali-nand
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then:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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properties:
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nand-ecc-strength:
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enum:
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- 8
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- 15
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nand-ecc-step-size:
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enum:
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- 512
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- if:
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properties:
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compatible:
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contains:
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const: socionext,uniphier-denali-nand-v5a
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then:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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properties:
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nand-ecc-strength:
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enum:
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- 8
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- 16
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- 24
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nand-ecc-step-size:
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enum:
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- 1024
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- if:
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properties:
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compatible:
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contains:
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const: socionext,uniphier-denali-nand-v5b
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then:
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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properties:
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nand-ecc-strength:
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enum:
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- 8
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- 16
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nand-ecc-step-size:
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enum:
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- 1024
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required:
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- compatible
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- reg
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- interrupts
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- clock-names
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- clocks
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examples:
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- |
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nand-controller@ff900000 {
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compatible = "altr,socfpga-denali-nand";
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reg-names = "nand_data", "denali_reg";
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reg = <0xff900000 0x20>, <0xffb80000 0x1000>;
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interrupts = <0 144 4>;
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clock-names = "nand", "nand_x", "ecc";
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clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
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reset-names = "nand", "reg";
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resets = <&nand_rst>, <&nand_reg_rst>;
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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reg = <0>;
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};
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};
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@ -1,61 +0,0 @@
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* Denali NAND controller
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Required properties:
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- compatible : should be one of the following:
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"altr,socfpga-denali-nand" - for Altera SOCFPGA
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"socionext,uniphier-denali-nand-v5a" - for Socionext UniPhier (v5a)
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"socionext,uniphier-denali-nand-v5b" - for Socionext UniPhier (v5b)
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- reg : should contain registers location and length for data and reg.
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- reg-names: Should contain the reg names "nand_data" and "denali_reg"
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- #address-cells: should be 1. The cell encodes the chip select connection.
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- #size-cells : should be 0.
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- interrupts : The interrupt number.
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- clocks: should contain phandle of the controller core clock, the bus
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interface clock, and the ECC circuit clock.
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- clock-names: should contain "nand", "nand_x", "ecc"
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Optional properties:
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- resets: may contain phandles to the controller core reset, the register
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reset
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- reset-names: may contain "nand", "reg"
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Sub-nodes:
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Sub-nodes represent available NAND chips.
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Required properties:
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- reg: should contain the bank ID of the controller to which each chip
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select is connected.
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Optional properties:
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- nand-ecc-step-size: see nand-controller.yaml for details.
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If present, the value must be
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512 for "altr,socfpga-denali-nand"
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1024 for "socionext,uniphier-denali-nand-v5a"
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1024 for "socionext,uniphier-denali-nand-v5b"
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- nand-ecc-strength: see nand-controller.yaml for details. Valid values are:
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8, 15 for "altr,socfpga-denali-nand"
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8, 16, 24 for "socionext,uniphier-denali-nand-v5a"
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8, 16 for "socionext,uniphier-denali-nand-v5b"
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- nand-ecc-maximize: see nand-controller.yaml for details
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The chip nodes may optionally contain sub-nodes describing partitions of the
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address space. See partition.txt for more detail.
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Examples:
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nand: nand@ff900000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "altr,socfpga-denali-nand";
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reg = <0xff900000 0x20>, <0xffb80000 0x1000>;
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reg-names = "nand_data", "denali_reg";
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clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
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clock-names = "nand", "nand_x", "ecc";
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resets = <&nand_rst>, <&nand_reg_rst>;
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reset-names = "nand", "reg";
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interrupts = <0 144 4>;
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nand@0 {
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reg = <0>;
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}
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};
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