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clk: at91: sckc: improve error path for sam9x5 sck register 

Improve error path for sam9x5 slow clock registration.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Claudiu Beznea 2019-06-27 18:53:42 +03:00 committed by Stephen Boyd
parent 016d22dd10
commit 82e25dc8f6
1 changed files with 32 additions and 18 deletions
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50
drivers/clk/at91/sckc.c
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@ -366,16 +366,17 @@ static void __init at91sam9x5_sckc_register(struct device_node *np,
void __iomem *regbase = of_iomap(np, 0); void __iomem *regbase = of_iomap(np, 0);
struct device_node *child = NULL; struct device_node *child = NULL;
const char *xtal_name; const char *xtal_name;
struct clk_hw *hw; struct clk_hw *slow_rc, *slow_osc, *slowck;
bool bypass; bool bypass;
int ret;
if (!regbase) if (!regbase)
return; return;
hw = at91_clk_register_slow_rc_osc(regbase, parent_names[0], 32768, slow_rc = at91_clk_register_slow_rc_osc(regbase, parent_names[0],
50000000, rc_osc_startup_us, 32768, 50000000,
bits); rc_osc_startup_us, bits);
if (IS_ERR(hw)) if (IS_ERR(slow_rc))
return; return;
xtal_name = of_clk_get_parent_name(np, 0); xtal_name = of_clk_get_parent_name(np, 0);
@ -383,7 +384,7 @@ static void __init at91sam9x5_sckc_register(struct device_node *np,
/* DT backward compatibility */ /* DT backward compatibility */
child = of_get_compatible_child(np, "atmel,at91sam9x5-clk-slow-osc"); child = of_get_compatible_child(np, "atmel,at91sam9x5-clk-slow-osc");
if (!child) if (!child)
return; goto unregister_slow_rc;
xtal_name = of_clk_get_parent_name(child, 0); xtal_name = of_clk_get_parent_name(child, 0);
bypass = of_property_read_bool(child, "atmel,osc-bypass"); bypass = of_property_read_bool(child, "atmel,osc-bypass");
@ -394,23 +395,36 @@ static void __init at91sam9x5_sckc_register(struct device_node *np,
} }
if (!xtal_name) if (!xtal_name)
return; goto unregister_slow_rc;
hw = at91_clk_register_slow_osc(regbase, parent_names[1], xtal_name, slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1],
1200000, bypass, bits); xtal_name, 1200000, bypass, bits);
if (IS_ERR(hw)) if (IS_ERR(slow_osc))
return; goto unregister_slow_rc;
hw = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 2, slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names,
bits); 2, bits);
if (IS_ERR(hw)) if (IS_ERR(slowck))
return; goto unregister_slow_osc;
of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
/* DT backward compatibility */ /* DT backward compatibility */
if (child) if (child)
of_clk_add_hw_provider(child, of_clk_hw_simple_get, hw); ret = of_clk_add_hw_provider(child, of_clk_hw_simple_get,
slowck);
else
ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, slowck);
if (WARN_ON(ret))
goto unregister_slowck;
return;
unregister_slowck:
at91_clk_unregister_sam9x5_slow(slowck);
unregister_slow_osc:
at91_clk_unregister_slow_osc(slow_osc);
unregister_slow_rc:
at91_clk_unregister_slow_rc_osc(slow_rc);
} }
static const struct clk_slow_bits at91sam9x5_bits = { static const struct clk_slow_bits at91sam9x5_bits = {