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drm/i915/skl: Provide a gen9 specific init_render_ring() 

WaDisableAsyncFlipPerfMode isn't listed for SKL and
INSTPM_FORCE_ORDERING is MBZ so let's make a gen9 specific render init
function.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Damien Lespiau 2015-02-09 19:33:08 +00:00 committed by Daniel Vetter
parent 6f97235b8b
commit 82ef822e65
1 changed files with 15 additions and 1 deletions
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16
drivers/gpu/drm/i915/intel_lrc.c
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@ -1150,6 +1150,17 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring)
return init_workarounds_ring(ring); return init_workarounds_ring(ring);
} }
static int gen9_init_render_ring(struct intel_engine_cs *ring)
{
int ret;
ret = gen8_init_common_ring(ring);
if (ret)
return ret;
return init_workarounds_ring(ring);
}
static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf, static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
struct intel_context *ctx, struct intel_context *ctx,
u64 offset, unsigned flags) u64 offset, unsigned flags)
@ -1440,7 +1451,10 @@ static int logical_render_ring_init(struct drm_device *dev)
if (HAS_L3_DPF(dev)) if (HAS_L3_DPF(dev))
ring->irq_keep_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT; ring->irq_keep_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
ring->init_hw = gen8_init_render_ring; if (INTEL_INFO(dev)->gen >= 9)
ring->init_hw = gen9_init_render_ring;
else
ring->init_hw = gen8_init_render_ring;
ring->init_context = gen8_init_rcs_context; ring->init_context = gen8_init_rcs_context;
ring->cleanup = intel_fini_pipe_control; ring->cleanup = intel_fini_pipe_control;
ring->get_seqno = gen8_get_seqno; ring->get_seqno = gen8_get_seqno;