From 5d9a76cd0ed367d01b0b237253adb7607e86a277 Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Sun, 17 Aug 2008 16:49:25 +0200 Subject: [PATCH 01/49] MIPS: Use compat_sys_ptrace This replaces mips's sys_ptrace32 with a compat_arch_ptrace and enables the new generic definition of compat_sys_ptrace instead. Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle --- arch/mips/kernel/ptrace32.c | 43 +++++++--------------------------- arch/mips/kernel/scall64-n32.S | 2 +- arch/mips/kernel/scall64-o32.S | 2 +- arch/mips/kernel/signal32.c | 12 ++++++++++ include/asm-mips/ptrace.h | 3 +++ 5 files changed, 25 insertions(+), 37 deletions(-) diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index 76818be6ba7c..cac56a8c8679 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -15,6 +15,7 @@ * binaries. */ #include +#include #include #include #include @@ -46,37 +47,13 @@ int ptrace_setfpregs(struct task_struct *child, __u32 __user *data); * Tracing a 32-bit process with a 64-bit strace and vice versa will not * work. I don't know how to fix this. */ -asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) +long compat_arch_ptrace(struct task_struct *child, compat_long_t request, + compat_ulong_t caddr, compat_ulong_t cdata) { - struct task_struct *child; + int addr = caddr; + int data = cdata; int ret; -#if 0 - printk("ptrace(r=%d,pid=%d,addr=%08lx,data=%08lx)\n", - (int) request, (int) pid, (unsigned long) addr, - (unsigned long) data); -#endif - lock_kernel(); - if (request == PTRACE_TRACEME) { - ret = ptrace_traceme(); - goto out; - } - - child = ptrace_get_task_struct(pid); - if (IS_ERR(child)) { - ret = PTR_ERR(child); - goto out; - } - - if (request == PTRACE_ATTACH) { - ret = ptrace_attach(child); - goto out_tsk; - } - - ret = ptrace_check_attach(child, request == PTRACE_KILL); - if (ret < 0) - goto out_tsk; - switch (request) { /* when I and D space are separate, these will need to be fixed. */ case PTRACE_PEEKTEXT: /* read word at location addr. */ @@ -214,7 +191,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) if (!cpu_has_dsp) { tmp = 0; ret = -EIO; - goto out_tsk; + goto out; } dregs = __get_dsp_regs(child); tmp = (unsigned long) (dregs[addr - DSP_BASE]); @@ -224,14 +201,14 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) if (!cpu_has_dsp) { tmp = 0; ret = -EIO; - goto out_tsk; + goto out; } tmp = child->thread.dsp.dspcontrol; break; default: tmp = 0; ret = -EIO; - goto out_tsk; + goto out; } ret = put_user(tmp, (unsigned __user *) (unsigned long) data); break; @@ -414,10 +391,6 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) ret = ptrace_request(child, request, addr, data); break; } - -out_tsk: - put_task_struct(child); out: - unlock_kernel(); return ret; } diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index da7f1b6ea0fb..324c5499dec2 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -219,7 +219,7 @@ EXPORT(sysn32_call_table) PTR compat_sys_getrusage PTR compat_sys_sysinfo PTR compat_sys_times - PTR sys32_ptrace + PTR compat_sys_ptrace PTR sys_getuid /* 6100 */ PTR sys_syslog PTR sys_getgid diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index d7cd1aac9ada..85fedac99a57 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -231,7 +231,7 @@ sys_call_table: PTR sys_setuid PTR sys_getuid PTR compat_sys_stime /* 4025 */ - PTR sys32_ptrace + PTR compat_sys_ptrace PTR sys_alarm PTR sys_ni_syscall /* was sys_fstat */ PTR sys_pause diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index 572c610db1b1..652709b353ad 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c @@ -482,6 +482,18 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from) return err; } +int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from) +{ + memset(to, 0, sizeof *to); + + if (copy_from_user(to, from, 3*sizeof(int)) || + copy_from_user(to->_sifields._pad, + from->_sifields._pad, SI_PAD_SIZE32)) + return -EFAULT; + + return 0; +} + asmlinkage void sys32_sigreturn(nabi_no_regargs struct pt_regs regs) { struct sigframe32 __user *frame; diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h index 786f7e3c99bc..c00cca24dae0 100644 --- a/include/asm-mips/ptrace.h +++ b/include/asm-mips/ptrace.h @@ -9,6 +9,9 @@ #ifndef _ASM_PTRACE_H #define _ASM_PTRACE_H +#ifdef CONFIG_64BIT +#define __ARCH_WANT_COMPAT_SYS_PTRACE +#endif /* 0 - 31 are integer registers, 32 - 63 are fp registers. */ #define FPR_BASE 32 From 9fa32c6b0275ab1e8b19f74fbfa3ed8411345db6 Mon Sep 17 00:00:00 2001 From: Patrick Glass Date: Mon, 18 Aug 2008 14:41:30 -0700 Subject: [PATCH 02/49] MIPS: PMC MSP71XX gpio drivers This new gpio driver for PMC-Sierra's MSP71xx SoC allows standard api calls for access to the general and extended gpio's. Signed-off-by: Patrick Glass Signed-off-by: Ralf Baechle create mode 100755 arch/mips/pmc-sierra/msp71xx/gpio.c create mode 100755 arch/mips/pmc-sierra/msp71xx/gpio_extended.c create mode 100755 include/asm-mips/pmc-sierra/msp71xx/gpio.h --- arch/mips/pmc-sierra/msp71xx/Makefile | 1 + arch/mips/pmc-sierra/msp71xx/gpio.c | 218 +++++++++++++++++++ arch/mips/pmc-sierra/msp71xx/gpio_extended.c | 148 +++++++++++++ include/asm-mips/pmc-sierra/msp71xx/gpio.h | 46 ++++ 4 files changed, 413 insertions(+) create mode 100644 arch/mips/pmc-sierra/msp71xx/gpio.c create mode 100644 arch/mips/pmc-sierra/msp71xx/gpio_extended.c create mode 100644 include/asm-mips/pmc-sierra/msp71xx/gpio.h diff --git a/arch/mips/pmc-sierra/msp71xx/Makefile b/arch/mips/pmc-sierra/msp71xx/Makefile index 4bba79c1cc79..e107f79b1491 100644 --- a/arch/mips/pmc-sierra/msp71xx/Makefile +++ b/arch/mips/pmc-sierra/msp71xx/Makefile @@ -3,6 +3,7 @@ # obj-y += msp_prom.o msp_setup.o msp_irq.o \ msp_time.o msp_serial.o msp_elb.o +obj-$(CONFIG_HAVE_GPIO_LIB) += gpio.o gpio_extended.o obj-$(CONFIG_PMC_MSP7120_GW) += msp_hwbutton.o obj-$(CONFIG_IRQ_MSP_SLP) += msp_irq_slp.o obj-$(CONFIG_IRQ_MSP_CIC) += msp_irq_cic.o diff --git a/arch/mips/pmc-sierra/msp71xx/gpio.c b/arch/mips/pmc-sierra/msp71xx/gpio.c new file mode 100644 index 000000000000..69848c5813e2 --- /dev/null +++ b/arch/mips/pmc-sierra/msp71xx/gpio.c @@ -0,0 +1,218 @@ +/* + * @file /arch/mips/pmc-sierra/msp71xx/gpio.c + * + * Generic PMC MSP71xx GPIO handling. These base gpio are controlled by two + * types of registers. The data register sets the output level when in output + * mode and when in input mode will contain the value at the input. The config + * register sets the various modes for each gpio. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * @author Patrick Glass + */ + +#include +#include +#include +#include +#include +#include + +#define MSP71XX_CFG_OFFSET(gpio) (4 * (gpio)) +#define CONF_MASK 0x0F +#define MSP71XX_GPIO_INPUT 0x01 +#define MSP71XX_GPIO_OUTPUT 0x08 + +#define MSP71XX_GPIO_BASE 0x0B8400000L + +#define to_msp71xx_gpio_chip(c) container_of(c, struct msp71xx_gpio_chip, chip) + +static spinlock_t gpio_lock; + +/* + * struct msp71xx_gpio_chip - container for gpio chip and registers + * @chip: chip structure for the specified gpio bank + * @data_reg: register for reading and writing the gpio pin value + * @config_reg: register to set the mode for the gpio pin bank + * @out_drive_reg: register to set the output drive mode for the gpio pin bank + */ +struct msp71xx_gpio_chip { + struct gpio_chip chip; + void __iomem *data_reg; + void __iomem *config_reg; + void __iomem *out_drive_reg; +}; + +/* + * msp71xx_gpio_get() - return the chip's gpio value + * @chip: chip structure which controls the specified gpio + * @offset: gpio whose value will be returned + * + * It will return 0 if gpio value is low and other if high. + */ +static int msp71xx_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct msp71xx_gpio_chip *msp_chip = to_msp71xx_gpio_chip(chip); + + return __raw_readl(msp_chip->data_reg) & (1 << offset); +} + +/* + * msp71xx_gpio_set() - set the output value for the gpio + * @chip: chip structure who controls the specified gpio + * @offset: gpio whose value will be assigned + * @value: logic level to assign to the gpio initially + * + * This will set the gpio bit specified to the desired value. It will set the + * gpio pin low if value is 0 otherwise it will be high. + */ +static void msp71xx_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +{ + struct msp71xx_gpio_chip *msp_chip = to_msp71xx_gpio_chip(chip); + unsigned long flags; + u32 data; + + spin_lock_irqsave(&gpio_lock, flags); + + data = __raw_readl(msp_chip->data_reg); + if (value) + data |= (1 << offset); + else + data &= ~(1 << offset); + __raw_writel(data, msp_chip->data_reg); + + spin_unlock_irqrestore(&gpio_lock, flags); +} + +/* + * msp71xx_set_gpio_mode() - declare the mode for a gpio + * @chip: chip structure which controls the specified gpio + * @offset: gpio whose value will be assigned + * @mode: desired configuration for the gpio (see datasheet) + * + * It will set the gpio pin config to the @mode value passed in. + */ +static int msp71xx_set_gpio_mode(struct gpio_chip *chip, + unsigned offset, int mode) +{ + struct msp71xx_gpio_chip *msp_chip = to_msp71xx_gpio_chip(chip); + const unsigned bit_offset = MSP71XX_CFG_OFFSET(offset); + unsigned long flags; + u32 cfg; + + spin_lock_irqsave(&gpio_lock, flags); + + cfg = __raw_readl(msp_chip->config_reg); + cfg &= ~(CONF_MASK << bit_offset); + cfg |= (mode << bit_offset); + __raw_writel(cfg, msp_chip->config_reg); + + spin_unlock_irqrestore(&gpio_lock, flags); + + return 0; +} + +/* + * msp71xx_direction_output() - declare the direction mode for a gpio + * @chip: chip structure which controls the specified gpio + * @offset: gpio whose value will be assigned + * @value: logic level to assign to the gpio initially + * + * This call will set the mode for the @gpio to output. It will set the + * gpio pin low if value is 0 otherwise it will be high. + */ +static int msp71xx_direction_output(struct gpio_chip *chip, + unsigned offset, int value) +{ + msp71xx_gpio_set(chip, offset, value); + + return msp71xx_set_gpio_mode(chip, offset, MSP71XX_GPIO_OUTPUT); +} + +/* + * msp71xx_direction_input() - declare the direction mode for a gpio + * @chip: chip structure which controls the specified gpio + * @offset: gpio whose to which the value will be assigned + * + * This call will set the mode for the @gpio to input. + */ +static int msp71xx_direction_input(struct gpio_chip *chip, unsigned offset) +{ + return msp71xx_set_gpio_mode(chip, offset, MSP71XX_GPIO_INPUT); +} + +/* + * msp71xx_set_output_drive() - declare the output drive for the gpio line + * @gpio: gpio pin whose output drive you wish to modify + * @value: zero for active drain 1 for open drain drive + * + * This call will set the output drive mode for the @gpio to output. + */ +int msp71xx_set_output_drive(unsigned gpio, int value) +{ + unsigned long flags; + u32 data; + + if (gpio > 15 || gpio < 0) + return -EINVAL; + + spin_lock_irqsave(&gpio_lock, flags); + + data = __raw_readl((void __iomem *)(MSP71XX_GPIO_BASE + 0x190)); + if (value) + data |= (1 << gpio); + else + data &= ~(1 << gpio); + __raw_writel(data, (void __iomem *)(MSP71XX_GPIO_BASE + 0x190)); + + spin_unlock_irqrestore(&gpio_lock, flags); + + return 0; +} +EXPORT_SYMBOL(msp71xx_set_output_drive); + +#define MSP71XX_GPIO_BANK(name, dr, cr, base_gpio, num_gpio) \ +{ \ + .chip = { \ + .label = name, \ + .direction_input = msp71xx_direction_input, \ + .direction_output = msp71xx_direction_output, \ + .get = msp71xx_gpio_get, \ + .set = msp71xx_gpio_set, \ + .base = base_gpio, \ + .ngpio = num_gpio \ + }, \ + .data_reg = (void __iomem *)(MSP71XX_GPIO_BASE + dr), \ + .config_reg = (void __iomem *)(MSP71XX_GPIO_BASE + cr), \ + .out_drive_reg = (void __iomem *)(MSP71XX_GPIO_BASE + 0x190), \ +} + +/* + * struct msp71xx_gpio_banks[] - container array of gpio banks + * @chip: chip structure for the specified gpio bank + * @data_reg: register for reading and writing the gpio pin value + * @config_reg: register to set the mode for the gpio pin bank + * + * This array structure defines the gpio banks for the PMC MIPS Processor. + * We specify the bank name, the data register, the config register, base + * starting gpio number, and the number of gpios exposed by the bank. + */ +static struct msp71xx_gpio_chip msp71xx_gpio_banks[] = { + + MSP71XX_GPIO_BANK("GPIO_1_0", 0x170, 0x180, 0, 2), + MSP71XX_GPIO_BANK("GPIO_5_2", 0x174, 0x184, 2, 4), + MSP71XX_GPIO_BANK("GPIO_9_6", 0x178, 0x188, 6, 4), + MSP71XX_GPIO_BANK("GPIO_15_10", 0x17C, 0x18C, 10, 6), +}; + +void __init msp71xx_init_gpio(void) +{ + int i; + + spin_lock_init(&gpio_lock); + + for (i = 0; i < ARRAY_SIZE(msp71xx_gpio_banks); i++) + gpiochip_add(&msp71xx_gpio_banks[i].chip); +} diff --git a/arch/mips/pmc-sierra/msp71xx/gpio_extended.c b/arch/mips/pmc-sierra/msp71xx/gpio_extended.c new file mode 100644 index 000000000000..fc6dbc6cf1c0 --- /dev/null +++ b/arch/mips/pmc-sierra/msp71xx/gpio_extended.c @@ -0,0 +1,148 @@ +/* + * @file /arch/mips/pmc-sierra/msp71xx/gpio_extended.c + * + * Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is + * a set of hardware registers that have no need for explicit locking as + * it is handled by unique method of writing individual set/clr bits. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * @author Patrick Glass + */ + +#include +#include +#include +#include +#include + +#define MSP71XX_DATA_OFFSET(gpio) (2 * (gpio)) +#define MSP71XX_READ_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 1) +#define MSP71XX_CFG_OUT_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 16) +#define MSP71XX_CFG_IN_OFFSET(gpio) (MSP71XX_CFG_OUT_OFFSET(gpio) + 1) + +#define MSP71XX_EXD_GPIO_BASE 0x0BC000000L + +#define to_msp71xx_exd_gpio_chip(c) \ + container_of(c, struct msp71xx_exd_gpio_chip, chip) + +/* + * struct msp71xx_exd_gpio_chip - container for gpio chip and registers + * @chip: chip structure for the specified gpio bank + * @reg: register for control and data of gpio pin + */ +struct msp71xx_exd_gpio_chip { + struct gpio_chip chip; + void __iomem *reg; +}; + +/* + * msp71xx_exd_gpio_get() - return the chip's gpio value + * @chip: chip structure which controls the specified gpio + * @offset: gpio whose value will be returned + * + * It will return 0 if gpio value is low and other if high. + */ +static int msp71xx_exd_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct msp71xx_exd_gpio_chip *msp71xx_chip = + to_msp71xx_exd_gpio_chip(chip); + const unsigned bit = MSP71XX_READ_OFFSET(offset); + + return __raw_readl(msp71xx_chip->reg) & (1 << bit); +} + +/* + * msp71xx_exd_gpio_set() - set the output value for the gpio + * @chip: chip structure who controls the specified gpio + * @offset: gpio whose value will be assigned + * @value: logic level to assign to the gpio initially + * + * This will set the gpio bit specified to the desired value. It will set the + * gpio pin low if value is 0 otherwise it will be high. + */ +static void msp71xx_exd_gpio_set(struct gpio_chip *chip, + unsigned offset, int value) +{ + struct msp71xx_exd_gpio_chip *msp71xx_chip = + to_msp71xx_exd_gpio_chip(chip); + const unsigned bit = MSP71XX_DATA_OFFSET(offset); + + __raw_writel(1 << (bit + (value ? 1 : 0)), msp71xx_chip->reg); +} + +/* + * msp71xx_exd_direction_output() - declare the direction mode for a gpio + * @chip: chip structure which controls the specified gpio + * @offset: gpio whose value will be assigned + * @value: logic level to assign to the gpio initially + * + * This call will set the mode for the @gpio to output. It will set the + * gpio pin low if value is 0 otherwise it will be high. + */ +static int msp71xx_exd_direction_output(struct gpio_chip *chip, + unsigned offset, int value) +{ + struct msp71xx_exd_gpio_chip *msp71xx_chip = + to_msp71xx_exd_gpio_chip(chip); + + msp71xx_exd_gpio_set(chip, offset, value); + __raw_writel(1 << MSP71XX_CFG_OUT_OFFSET(offset), msp71xx_chip->reg); + return 0; +} + +/* + * msp71xx_exd_direction_input() - declare the direction mode for a gpio + * @chip: chip structure which controls the specified gpio + * @offset: gpio whose to which the value will be assigned + * + * This call will set the mode for the @gpio to input. + */ +static int msp71xx_exd_direction_input(struct gpio_chip *chip, unsigned offset) +{ + struct msp71xx_exd_gpio_chip *msp71xx_chip = + to_msp71xx_exd_gpio_chip(chip); + + __raw_writel(1 << MSP71XX_CFG_IN_OFFSET(offset), msp71xx_chip->reg); + return 0; +} + +#define MSP71XX_EXD_GPIO_BANK(name, exd_reg, base_gpio, num_gpio) \ +{ \ + .chip = { \ + .label = name, \ + .direction_input = msp71xx_exd_direction_input, \ + .direction_output = msp71xx_exd_direction_output, \ + .get = msp71xx_exd_gpio_get, \ + .set = msp71xx_exd_gpio_set, \ + .base = base_gpio, \ + .ngpio = num_gpio, \ + }, \ + .reg = (void __iomem *)(MSP71XX_EXD_GPIO_BASE + exd_reg), \ +} + +/* + * struct msp71xx_exd_gpio_banks[] - container array of gpio banks + * @chip: chip structure for the specified gpio bank + * @reg: register for reading and writing the gpio pin value + * + * This array structure defines the extended gpio banks for the + * PMC MIPS Processor. We specify the bank name, the data/config + * register,the base starting gpio number, and the number of + * gpios exposed by the bank of gpios. + */ +static struct msp71xx_exd_gpio_chip msp71xx_exd_gpio_banks[] = { + + MSP71XX_EXD_GPIO_BANK("GPIO_23_16", 0x188, 16, 8), + MSP71XX_EXD_GPIO_BANK("GPIO_27_24", 0x18C, 24, 4), +}; + +void __init msp71xx_init_gpio_extended(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(msp71xx_exd_gpio_banks); i++) + gpiochip_add(&msp71xx_exd_gpio_banks[i].chip); +} diff --git a/include/asm-mips/pmc-sierra/msp71xx/gpio.h b/include/asm-mips/pmc-sierra/msp71xx/gpio.h new file mode 100644 index 000000000000..ebdbab973e41 --- /dev/null +++ b/include/asm-mips/pmc-sierra/msp71xx/gpio.h @@ -0,0 +1,46 @@ +/* + * include/asm-mips/pmc-sierra/msp71xx/gpio.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * @author Patrick Glass + */ + +#ifndef __PMC_MSP71XX_GPIO_H +#define __PMC_MSP71XX_GPIO_H + +/* Max number of gpio's is 28 on chip plus 3 banks of I2C IO Expanders */ +#define ARCH_NR_GPIOS (28 + (3 * 8)) + +/* new generic GPIO API - see Documentation/gpio.txt */ +#include + +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value +#define gpio_cansleep __gpio_cansleep + +/* Setup calls for the gpio and gpio extended */ +extern void msp71xx_init_gpio(void); +extern void msp71xx_init_gpio_extended(void); +extern int msp71xx_set_output_drive(unsigned gpio, int value); + +/* Custom output drive functionss */ +static inline int gpio_set_output_drive(unsigned gpio, int value) +{ + return msp71xx_set_output_drive(gpio, value); +} + +/* IRQ's are not supported for gpio lines */ +static inline int gpio_to_irq(unsigned gpio) +{ + return -EINVAL; +} + +static inline int irq_to_gpio(unsigned irq) +{ + return -EINVAL; +} + +#endif /* __PMC_MSP71XX_GPIO_H */ From f96a3383cfede841cdf80a5927f14478981ed78c Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:05 +0900 Subject: [PATCH 03/49] MIPS: RBTX4927: More explicit initialization * Make sure all interrupts cleared on startup * Initialize some GPIOs Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/rbtx4927/irq.c | 5 +++++ arch/mips/txx9/rbtx4927/setup.c | 9 +++++++++ include/asm-mips/txx9/rbtx4927.h | 2 ++ 3 files changed, 16 insertions(+) diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index 00cd5231da30..22076e3f03a8 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c @@ -142,6 +142,11 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void) { int i; + /* mask all IOC interrupts */ + writeb(0, rbtx4927_imask_addr); + /* clear SoftInt interrupts */ + writeb(0, rbtx4927_softint_addr); + for (i = RBTX4927_IRQ_IOC; i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++) set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c index 0d39bafea794..5985f330838a 100644 --- a/arch/mips/txx9/rbtx4927/setup.c +++ b/arch/mips/txx9/rbtx4927/setup.c @@ -48,6 +48,7 @@ #include #include #include +#include #include #include #include @@ -212,6 +213,14 @@ static void __init rbtx4927_mem_setup(void) set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET); #endif + /* TX4927-SIO DTR on (PIO[15]) */ + gpio_request(15, "sio-dtr"); + gpio_direction_output(15, 1); + gpio_request(0, "led"); + gpio_direction_output(0, 1); + gpio_request(1, "led"); + gpio_direction_output(1, 1); + tx4927_sio_init(0, 0); #ifdef CONFIG_SERIAL_TXX9_CONSOLE argptr = prom_getcmdline(); diff --git a/include/asm-mips/txx9/rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h index 6fcec912c143..c6015463432e 100644 --- a/include/asm-mips/txx9/rbtx4927.h +++ b/include/asm-mips/txx9/rbtx4927.h @@ -36,6 +36,7 @@ #define RBTX4927_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000) #define RBTX4927_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006) +#define RBTX4927_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000) #define RBTX4927_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f000) #define RBTX4927_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f002) #define RBTX4927_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f006) @@ -47,6 +48,7 @@ #define rbtx4927_imask_addr ((__u8 __iomem *)RBTX4927_IMASK_ADDR) #define rbtx4927_imstat_addr ((__u8 __iomem *)RBTX4927_IMSTAT_ADDR) +#define rbtx4927_softint_addr ((__u8 __iomem *)RBTX4927_SOFTINT_ADDR) #define rbtx4927_softreset_addr ((__u8 __iomem *)RBTX4927_SOFTRESET_ADDR) #define rbtx4927_softresetlock_addr \ ((__u8 __iomem *)RBTX4927_SOFTRESETLOCK_ADDR) From e0dfb20c2b77c6626a24578240266ace928cd2e7 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:06 +0900 Subject: [PATCH 04/49] MIPS: TXx9: Improve handling of built-in and command-line args * Make prom_init_cmdline() static and be called from prom_init. * Append built-in args if the first character was '+'. * Drop command-line args if the first character of built-in was '-'. * Enclose args include spaces by quotes. * TX4938_NAND_BOOT is no longer needed. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/Kconfig | 7 ------ arch/mips/txx9/generic/setup.c | 42 ++++++++++++++++++++++++--------- arch/mips/txx9/jmr3927/prom.c | 1 - arch/mips/txx9/rbtx4927/prom.c | 1 - arch/mips/txx9/rbtx4938/prom.c | 3 --- include/asm-mips/txx9/generic.h | 1 - 6 files changed, 31 insertions(+), 24 deletions(-) diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index 840fe757c48d..6fb2ef09d5dd 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig @@ -97,13 +97,6 @@ config TOSHIBA_RBTX4938_MPLEX_ATA endchoice -config TX4938_NAND_BOOT - depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND - bool "NAND Boot Support (EXPERIMENTAL)" - help - This is only for Toshiba RBTX4938 reference board, which has NAND IPL. - Select this option if you need to use NAND boot. - endif config PCI_TX4927 diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index fe6bee09cece..33d8c9e3223d 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -127,31 +127,51 @@ extern struct txx9_board_vec rbtx4938_vec; struct txx9_board_vec *txx9_board_vec __initdata; static char txx9_system_type[32]; -void __init prom_init_cmdline(void) +static void __init prom_init_cmdline(void) { int argc = (int)fw_arg0; - char **argv = (char **)fw_arg1; + int *argv32 = (int *)fw_arg1; int i; /* Always ignore the "-c" at argv[0] */ -#ifdef CONFIG_64BIT - char *fixed_argv[32]; - for (i = 0; i < argc; i++) - fixed_argv[i] = (char *)(long)(*((__s32 *)argv + i)); - argv = fixed_argv; -#endif + char builtin[CL_SIZE]; /* ignore all built-in args if any f/w args given */ - if (argc > 1) - *arcs_cmdline = '\0'; + /* + * But if built-in strings was started with '+', append them + * to command line args. If built-in was started with '-', + * ignore all f/w args. + */ + builtin[0] = '\0'; + if (arcs_cmdline[0] == '+') + strcpy(builtin, arcs_cmdline + 1); + else if (arcs_cmdline[0] == '-') { + strcpy(builtin, arcs_cmdline + 1); + argc = 0; + } else if (argc <= 1) + strcpy(builtin, arcs_cmdline); + arcs_cmdline[0] = '\0'; for (i = 1; i < argc; i++) { + char *str = (char *)(long)argv32[i]; if (i != 1) strcat(arcs_cmdline, " "); - strcat(arcs_cmdline, argv[i]); + if (strchr(str, ' ')) { + strcat(arcs_cmdline, "\""); + strcat(arcs_cmdline, str); + strcat(arcs_cmdline, "\""); + } else + strcat(arcs_cmdline, str); + } + /* append saved builtin args */ + if (builtin[0]) { + if (arcs_cmdline[0]) + strcat(arcs_cmdline, " "); + strcat(arcs_cmdline, builtin); } } void __init prom_init(void) { + prom_init_cmdline(); #ifdef CONFIG_CPU_TX39XX txx9_board_vec = &jmr3927_vec; #endif diff --git a/arch/mips/txx9/jmr3927/prom.c b/arch/mips/txx9/jmr3927/prom.c index 70c4c8ec3e84..c899c0c087a0 100644 --- a/arch/mips/txx9/jmr3927/prom.c +++ b/arch/mips/txx9/jmr3927/prom.c @@ -47,7 +47,6 @@ void __init jmr3927_prom_init(void) if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) printk(KERN_ERR "TX3927 TLB off\n"); - prom_init_cmdline(); add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); txx9_sio_putchar_init(TX3927_SIO_REG(1)); } diff --git a/arch/mips/txx9/rbtx4927/prom.c b/arch/mips/txx9/rbtx4927/prom.c index 1dc0a5b1956b..cc97c6a6011b 100644 --- a/arch/mips/txx9/rbtx4927/prom.c +++ b/arch/mips/txx9/rbtx4927/prom.c @@ -36,7 +36,6 @@ void __init rbtx4927_prom_init(void) { - prom_init_cmdline(); add_memory_region(0, tx4927_get_mem_size(), BOOT_MEM_RAM); txx9_sio_putchar_init(TX4927_SIO_REG(0) & 0xfffffffffULL); } diff --git a/arch/mips/txx9/rbtx4938/prom.c b/arch/mips/txx9/rbtx4938/prom.c index d73123cd2ab9..bcb469247e8c 100644 --- a/arch/mips/txx9/rbtx4938/prom.c +++ b/arch/mips/txx9/rbtx4938/prom.c @@ -18,9 +18,6 @@ void __init rbtx4938_prom_init(void) { -#ifndef CONFIG_TX4938_NAND_BOOT - prom_init_cmdline(); -#endif add_memory_region(0, tx4938_get_mem_size(), BOOT_MEM_RAM); txx9_sio_putchar_init(TX4938_SIO_REG(0) & 0xfffffffffULL); } diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index 5b1ccf901c62..c9eed7ea148c 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -42,7 +42,6 @@ struct txx9_board_vec { }; extern struct txx9_board_vec *txx9_board_vec; extern int (*txx9_irq_dispatch)(int pending); -void prom_init_cmdline(void); char *prom_getcmdline(void); void txx9_wdt_init(unsigned long base); void txx9_spi_init(int busid, unsigned long base, int irq); From 265b89db1058124ddbf0091ba3f8c020e3a5ae9d Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:07 +0900 Subject: [PATCH 05/49] MIPS: TXx9: Add prom_getenv Add prom_getenv() which can be used for YAMON. This assumes other firmware should pass NULL for fw_arg2. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup.c | 15 +++++++++++++++ include/asm-mips/txx9/generic.h | 1 + 2 files changed, 16 insertions(+) diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 33d8c9e3223d..005179c2af21 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -212,6 +212,21 @@ char * __init prom_getcmdline(void) return &(arcs_cmdline[0]); } +const char *__init prom_getenv(const char *name) +{ + const s32 *str = (const s32 *)fw_arg2; + + if (!str) + return NULL; + /* YAMON style ("name", "value" pairs) */ + while (str[0] && str[1]) { + if (!strcmp((const char *)(unsigned long)str[0], name)) + return (const char *)(unsigned long)str[1]; + str += 2; + } + return NULL; +} + static void __noreturn txx9_machine_halt(void) { local_irq_disable(); diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index c9eed7ea148c..0a225bf73496 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -43,6 +43,7 @@ struct txx9_board_vec { extern struct txx9_board_vec *txx9_board_vec; extern int (*txx9_irq_dispatch)(int pending); char *prom_getcmdline(void); +const char *prom_getenv(const char *name); void txx9_wdt_init(unsigned long base); void txx9_spi_init(int busid, unsigned long base, int irq); void txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr); From 860e546c19d88c21819c7f0861c505debd2d6eed Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:08 +0900 Subject: [PATCH 06/49] MIPS: TXx9: Early command-line preprocessing * Select board by command-line option or firmware environment variable. * Handle "masterclk=" option. * Add boards.h to centerize board_vec declaration. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle create mode 100644 include/asm-mips/txx9/boards.h --- arch/mips/txx9/generic/setup.c | 74 +++++++++++++++++++++++++++++++--- include/asm-mips/txx9/boards.h | 10 +++++ 2 files changed, 78 insertions(+), 6 deletions(-) create mode 100644 include/asm-mips/txx9/boards.h diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 005179c2af21..dc5dbcc53a91 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -119,14 +119,31 @@ int irq_to_gpio(unsigned irq) EXPORT_SYMBOL(irq_to_gpio); #endif -extern struct txx9_board_vec jmr3927_vec; -extern struct txx9_board_vec rbtx4927_vec; -extern struct txx9_board_vec rbtx4937_vec; -extern struct txx9_board_vec rbtx4938_vec; +#define BOARD_VEC(board) extern struct txx9_board_vec board; +#include +#undef BOARD_VEC struct txx9_board_vec *txx9_board_vec __initdata; static char txx9_system_type[32]; +static struct txx9_board_vec *board_vecs[] __initdata = { +#define BOARD_VEC(board) &board, +#include +#undef BOARD_VEC +}; + +static struct txx9_board_vec *__init find_board_byname(const char *name) +{ + int i; + + /* search board_vecs table */ + for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { + if (strstr(board_vecs[i]->system, name)) + return board_vecs[i]; + } + return NULL; +} + static void __init prom_init_cmdline(void) { int argc = (int)fw_arg0; @@ -169,9 +186,47 @@ static void __init prom_init_cmdline(void) } } -void __init prom_init(void) +static void __init preprocess_cmdline(void) { - prom_init_cmdline(); + char cmdline[CL_SIZE]; + char *s; + + strcpy(cmdline, arcs_cmdline); + s = cmdline; + arcs_cmdline[0] = '\0'; + while (s && *s) { + char *str = strsep(&s, " "); + if (strncmp(str, "board=", 6) == 0) { + txx9_board_vec = find_board_byname(str + 6); + continue; + } else if (strncmp(str, "masterclk=", 10) == 0) { + unsigned long val; + if (strict_strtoul(str + 10, 10, &val) == 0) + txx9_master_clock = val; + continue; + } + if (arcs_cmdline[0]) + strcat(arcs_cmdline, " "); + strcat(arcs_cmdline, str); + } +} + +static void __init select_board(void) +{ + const char *envstr; + + /* first, determine by "board=" argument in preprocess_cmdline() */ + if (txx9_board_vec) + return; + /* next, determine by "board" envvar */ + envstr = prom_getenv("board"); + if (envstr) { + txx9_board_vec = find_board_byname(envstr); + if (txx9_board_vec) + return; + } + + /* select "default" board */ #ifdef CONFIG_CPU_TX39XX txx9_board_vec = &jmr3927_vec; #endif @@ -192,6 +247,13 @@ void __init prom_init(void) #endif } #endif +} + +void __init prom_init(void) +{ + prom_init_cmdline(); + preprocess_cmdline(); + select_board(); strcpy(txx9_system_type, txx9_board_vec->system); diff --git a/include/asm-mips/txx9/boards.h b/include/asm-mips/txx9/boards.h new file mode 100644 index 000000000000..4abc8142fbb7 --- /dev/null +++ b/include/asm-mips/txx9/boards.h @@ -0,0 +1,10 @@ +#ifdef CONFIG_TOSHIBA_JMR3927 +BOARD_VEC(jmr3927_vec) +#endif +#ifdef CONFIG_TOSHIBA_RBTX4927 +BOARD_VEC(rbtx4927_vec) +BOARD_VEC(rbtx4937_vec) +#endif +#ifdef CONFIG_TOSHIBA_RBTX4938 +BOARD_VEC(rbtx4938_vec) +#endif From d10e025f0e4ba4b96d7b5786d232ac5b0b232b11 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:09 +0900 Subject: [PATCH 07/49] MIPS: TXx9: Cache fixup TX39/TX49 can enable/disable I/D cache at runtime. Add kernel options to control them. This is useful to debug some cache-related issues, such as aliasing or I/D coherency. Also enable CWF bit for TX49 SoCs. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup.c | 113 ++++++++++++++++++++++++++ arch/mips/txx9/generic/setup_tx3927.c | 18 ++-- arch/mips/txx9/generic/setup_tx4927.c | 1 + arch/mips/txx9/generic/setup_tx4938.c | 1 + arch/mips/txx9/jmr3927/setup.c | 11 +-- arch/mips/txx9/rbtx4927/setup.c | 6 -- 6 files changed, 124 insertions(+), 26 deletions(-) diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index dc5dbcc53a91..fa88aefea9ef 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #ifdef CONFIG_CPU_TX49XX @@ -186,6 +187,110 @@ static void __init prom_init_cmdline(void) } } +static int txx9_ic_disable __initdata; +static int txx9_dc_disable __initdata; + +#if defined(CONFIG_CPU_TX49XX) +/* flush all cache on very early stage (before 4k_cache_init) */ +static void __init early_flush_dcache(void) +{ + unsigned int conf = read_c0_config(); + unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6)); + unsigned int linesz = 32; + unsigned long addr, end; + + end = INDEX_BASE + dc_size / 4; + /* 4way, waybit=0 */ + for (addr = INDEX_BASE; addr < end; addr += linesz) { + cache_op(Index_Writeback_Inv_D, addr | 0); + cache_op(Index_Writeback_Inv_D, addr | 1); + cache_op(Index_Writeback_Inv_D, addr | 2); + cache_op(Index_Writeback_Inv_D, addr | 3); + } +} + +static void __init txx9_cache_fixup(void) +{ + unsigned int conf; + + conf = read_c0_config(); + /* flush and disable */ + if (txx9_ic_disable) { + conf |= TX49_CONF_IC; + write_c0_config(conf); + } + if (txx9_dc_disable) { + early_flush_dcache(); + conf |= TX49_CONF_DC; + write_c0_config(conf); + } + + /* enable cache */ + conf = read_c0_config(); + if (!txx9_ic_disable) + conf &= ~TX49_CONF_IC; + if (!txx9_dc_disable) + conf &= ~TX49_CONF_DC; + write_c0_config(conf); + + if (conf & TX49_CONF_IC) + pr_info("TX49XX I-Cache disabled.\n"); + if (conf & TX49_CONF_DC) + pr_info("TX49XX D-Cache disabled.\n"); +} +#elif defined(CONFIG_CPU_TX39XX) +/* flush all cache on very early stage (before tx39_cache_init) */ +static void __init early_flush_dcache(void) +{ + unsigned int conf = read_c0_config(); + unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >> + TX39_CONF_DCS_SHIFT)); + unsigned int linesz = 16; + unsigned long addr, end; + + end = INDEX_BASE + dc_size / 2; + /* 2way, waybit=0 */ + for (addr = INDEX_BASE; addr < end; addr += linesz) { + cache_op(Index_Writeback_Inv_D, addr | 0); + cache_op(Index_Writeback_Inv_D, addr | 1); + } +} + +static void __init txx9_cache_fixup(void) +{ + unsigned int conf; + + conf = read_c0_config(); + /* flush and disable */ + if (txx9_ic_disable) { + conf &= ~TX39_CONF_ICE; + write_c0_config(conf); + } + if (txx9_dc_disable) { + early_flush_dcache(); + conf &= ~TX39_CONF_DCE; + write_c0_config(conf); + } + + /* enable cache */ + conf = read_c0_config(); + if (!txx9_ic_disable) + conf |= TX39_CONF_ICE; + if (!txx9_dc_disable) + conf |= TX39_CONF_DCE; + write_c0_config(conf); + + if (!(conf & TX39_CONF_ICE)) + pr_info("TX39XX I-Cache disabled.\n"); + if (!(conf & TX39_CONF_DCE)) + pr_info("TX39XX D-Cache disabled.\n"); +} +#else +static inline void txx9_cache_fixup(void) +{ +} +#endif + static void __init preprocess_cmdline(void) { char cmdline[CL_SIZE]; @@ -204,11 +309,19 @@ static void __init preprocess_cmdline(void) if (strict_strtoul(str + 10, 10, &val) == 0) txx9_master_clock = val; continue; + } else if (strcmp(str, "icdisable") == 0) { + txx9_ic_disable = 1; + continue; + } else if (strcmp(str, "dcdisable") == 0) { + txx9_dc_disable = 1; + continue; } if (arcs_cmdline[0]) strcat(arcs_cmdline, " "); strcat(arcs_cmdline, str); } + + txx9_cache_fixup(); } static void __init select_board(void) diff --git a/arch/mips/txx9/generic/setup_tx3927.c b/arch/mips/txx9/generic/setup_tx3927.c index 7bd963d37fc3..4bc2f859379d 100644 --- a/arch/mips/txx9/generic/setup_tx3927.c +++ b/arch/mips/txx9/generic/setup_tx3927.c @@ -99,16 +99,14 @@ void __init tx3927_setup(void) txx9_gpio_init(TX3927_PIO_REG, 0, 16); conf = read_c0_conf(); - if (!(conf & TX39_CONF_ICE)) - printk(KERN_INFO "TX3927 I-Cache disabled.\n"); - if (!(conf & TX39_CONF_DCE)) - printk(KERN_INFO "TX3927 D-Cache disabled.\n"); - else if (!(conf & TX39_CONF_WBON)) - printk(KERN_INFO "TX3927 D-Cache WriteThrough.\n"); - else if (!(conf & TX39_CONF_CWFON)) - printk(KERN_INFO "TX3927 D-Cache WriteBack.\n"); - else - printk(KERN_INFO "TX3927 D-Cache WriteBack (CWF) .\n"); + if (conf & TX39_CONF_DCE) { + if (!(conf & TX39_CONF_WBON)) + pr_info("TX3927 D-Cache WriteThrough.\n"); + else if (!(conf & TX39_CONF_CWFON)) + pr_info("TX3927 D-Cache WriteBack.\n"); + else + pr_info("TX3927 D-Cache WriteBack (CWF) .\n"); + } } void __init tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr) diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index f80d4b7a694d..e679c79a4b0f 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -44,6 +44,7 @@ void __init tx4927_setup(void) txx9_reg_res_init(TX4927_REV_PCODE(), TX4927_REG_BASE, TX4927_REG_SIZE); + set_c0_config(TX49_CONF_CWFON); /* SDRAMC,EBUSC are configured by PROM */ for (i = 0; i < 8; i++) { diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index f3040b9ba059..95c058f0a96c 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -47,6 +47,7 @@ void __init tx4938_setup(void) txx9_reg_res_init(TX4938_REV_PCODE(), TX4938_REG_BASE, TX4938_REG_SIZE); + set_c0_config(TX49_CONF_CWFON); /* SDRAMC,EBUSC are configured by PROM */ for (i = 0; i < 8; i++) { diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c index 87db41be8a56..2e40a9268254 100644 --- a/arch/mips/txx9/jmr3927/setup.c +++ b/arch/mips/txx9/jmr3927/setup.c @@ -62,7 +62,6 @@ static void __init jmr3927_time_init(void) } #define DO_WRITE_THROUGH -#define DO_ENABLE_CACHE static void jmr3927_board_init(void); @@ -77,11 +76,6 @@ static void __init jmr3927_mem_setup(void) /* cache setup */ { unsigned int conf; -#ifdef DO_ENABLE_CACHE - int mips_ic_disable = 0, mips_dc_disable = 0; -#else - int mips_ic_disable = 1, mips_dc_disable = 1; -#endif #ifdef DO_WRITE_THROUGH int mips_config_cwfon = 0; int mips_config_wbon = 0; @@ -91,10 +85,7 @@ static void __init jmr3927_mem_setup(void) #endif conf = read_c0_conf(); - conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | - TX39_CONF_WBON | TX39_CONF_CWFON); - conf |= mips_ic_disable ? 0 : TX39_CONF_ICE; - conf |= mips_dc_disable ? 0 : TX39_CONF_DCE; + conf &= ~(TX39_CONF_WBON | TX39_CONF_CWFON); conf |= mips_config_wbon ? TX39_CONF_WBON : 0; conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0; diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c index 5985f330838a..0464a39b39ac 100644 --- a/arch/mips/txx9/rbtx4927/setup.c +++ b/arch/mips/txx9/rbtx4927/setup.c @@ -186,14 +186,8 @@ static void __init rbtx4937_clock_init(void); static void __init rbtx4927_mem_setup(void) { - u32 cp0_config; char *argptr; - /* enable caches -- HCP5 does this, pmon does not */ - cp0_config = read_c0_config(); - cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC); - write_c0_config(cp0_config); - if (TX4927_REV_PCODE() == 0x4927) { rbtx4927_clock_init(); tx4927_setup(); From c7b95bcb38ea492fd025008ef99501a2b90aa237 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:10 +0900 Subject: [PATCH 08/49] MIPS: TXx9: Runtime configuration of timeout-error Add kernel options to control bus timeout error. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup.c | 11 +++++++++++ arch/mips/txx9/generic/setup_tx3927.c | 5 ----- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index fa88aefea9ef..fa45f174b0ee 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -68,7 +68,12 @@ unsigned int txx9_master_clock; unsigned int txx9_cpu_clock; unsigned int txx9_gbus_clock; +#ifdef CONFIG_CPU_TX39XX +/* don't enable by default - see errata */ +int txx9_ccfg_toeon __initdata; +#else int txx9_ccfg_toeon __initdata = 1; +#endif /* Minimum CLK support */ @@ -315,6 +320,12 @@ static void __init preprocess_cmdline(void) } else if (strcmp(str, "dcdisable") == 0) { txx9_dc_disable = 1; continue; + } else if (strcmp(str, "toeoff") == 0) { + txx9_ccfg_toeon = 0; + continue; + } else if (strcmp(str, "toeon") == 0) { + txx9_ccfg_toeon = 1; + continue; } if (arcs_cmdline[0]) strcat(arcs_cmdline, " "); diff --git a/arch/mips/txx9/generic/setup_tx3927.c b/arch/mips/txx9/generic/setup_tx3927.c index 4bc2f859379d..06c492576078 100644 --- a/arch/mips/txx9/generic/setup_tx3927.c +++ b/arch/mips/txx9/generic/setup_tx3927.c @@ -32,11 +32,6 @@ void __init tx3927_setup(void) int i; unsigned int conf; - /* don't enable - see errata */ - txx9_ccfg_toeon = 0; - if (strstr(prom_getcmdline(), "toeon") != NULL) - txx9_ccfg_toeon = 1; - txx9_reg_res_init(TX3927_REV_PCODE(), TX3927_REG_BASE, TX3927_REG_SIZE); From 51f607c76e1e7bd089dcad97b6b0a58649be06a3 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:11 +0900 Subject: [PATCH 09/49] MIPS: TXx9: Add mtd support Add helper routines to register physmap-flash platform devices for NOR flashes. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup.c | 41 +++++++++++++++++++++++++++ arch/mips/txx9/generic/setup_tx3927.c | 14 +++++++++ arch/mips/txx9/generic/setup_tx4927.c | 14 +++++++++ arch/mips/txx9/generic/setup_tx4938.c | 14 +++++++++ arch/mips/txx9/jmr3927/setup.c | 9 ++++++ arch/mips/txx9/rbtx4927/setup.c | 9 ++++++ arch/mips/txx9/rbtx4938/setup.c | 38 +++++++++++++++++++++++++ include/asm-mips/txx9/generic.h | 4 +++ include/asm-mips/txx9/tx3927.h | 2 ++ include/asm-mips/txx9/tx4927.h | 3 ++ include/asm-mips/txx9/tx4938.h | 2 ++ 11 files changed, 150 insertions(+) diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index fa45f174b0ee..cfa3ccf493bb 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -593,3 +594,43 @@ static unsigned long __swizzle_addr_none(unsigned long port) unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; EXPORT_SYMBOL(__swizzle_addr_b); #endif + +void __init txx9_physmap_flash_init(int no, unsigned long addr, + unsigned long size, + const struct physmap_flash_data *pdata) +{ +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) + struct resource res = { + .start = addr, + .end = addr + size - 1, + .flags = IORESOURCE_MEM, + }; + struct platform_device *pdev; +#ifdef CONFIG_MTD_PARTITIONS + static struct mtd_partition parts[2]; + struct physmap_flash_data pdata_part; + + /* If this area contained boot area, make separate partition */ + if (pdata->nr_parts == 0 && !pdata->parts && + addr < 0x1fc00000 && addr + size > 0x1fc00000 && + !parts[0].name) { + parts[0].name = "boot"; + parts[0].offset = 0x1fc00000 - addr; + parts[0].size = addr + size - 0x1fc00000; + parts[1].name = "user"; + parts[1].offset = 0; + parts[1].size = 0x1fc00000 - addr; + pdata_part = *pdata; + pdata_part.nr_parts = ARRAY_SIZE(parts); + pdata_part.parts = parts; + pdata = &pdata_part; + } +#endif + pdev = platform_device_alloc("physmap-flash", no); + if (!pdev || + platform_device_add_resources(pdev, &res, 1) || + platform_device_add_data(pdev, pdata, sizeof(*pdata)) || + platform_device_add(pdev)) + platform_device_put(pdev); +#endif +} diff --git a/arch/mips/txx9/generic/setup_tx3927.c b/arch/mips/txx9/generic/setup_tx3927.c index 06c492576078..9505d58454c8 100644 --- a/arch/mips/txx9/generic/setup_tx3927.c +++ b/arch/mips/txx9/generic/setup_tx3927.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -121,3 +122,16 @@ void __init tx3927_sio_init(unsigned int sclk, unsigned int cts_mask) TXX9_IRQ_BASE + TX3927_IR_SIO(i), i, sclk, (1 << i) & cts_mask); } + +void __init tx3927_mtd_init(int ch) +{ + struct physmap_flash_data pdata = { + .width = TX3927_ROMC_WIDTH(ch) / 8, + }; + unsigned long start = txx9_ce_res[ch].start; + unsigned long size = txx9_ce_res[ch].end - start + 1; + + if (!(tx3927_romcptr->cr[ch] & 0x8)) + return; /* disabled */ + txx9_physmap_flash_init(ch, start, size, &pdata); +} diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index e679c79a4b0f..0840ef930e40 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -187,3 +188,16 @@ void __init tx4927_sio_init(unsigned int sclk, unsigned int cts_mask) TXX9_IRQ_BASE + TX4927_IR_SIO(i), i, sclk, (1 << i) & cts_mask); } + +void __init tx4927_mtd_init(int ch) +{ + struct physmap_flash_data pdata = { + .width = TX4927_EBUSC_WIDTH(ch) / 8, + }; + unsigned long start = txx9_ce_res[ch].start; + unsigned long size = txx9_ce_res[ch].end - start + 1; + + if (!(TX4927_EBUSC_CR(ch) & 0x8)) + return; /* disabled */ + txx9_physmap_flash_init(ch, start, size, &pdata); +} diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index 95c058f0a96c..630a7aac61f6 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -269,3 +270,16 @@ void __init tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1) if (addr1 && (pcfg & TX4938_PCFG_ETH1_SEL)) txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH1, addr1); } + +void __init tx4938_mtd_init(int ch) +{ + struct physmap_flash_data pdata = { + .width = TX4938_EBUSC_WIDTH(ch) / 8, + }; + unsigned long start = txx9_ce_res[ch].start; + unsigned long size = txx9_ce_res[ch].end - start + 1; + + if (!(TX4938_EBUSC_CR(ch) & 0x8)) + return; /* disabled */ + txx9_physmap_flash_init(ch, start, size, &pdata); +} diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c index 2e40a9268254..0f3843c92cf7 100644 --- a/arch/mips/txx9/jmr3927/setup.c +++ b/arch/mips/txx9/jmr3927/setup.c @@ -190,11 +190,20 @@ static void __init jmr3927_rtc_init(void) platform_device_register_simple("rtc-ds1742", -1, &res, 1); } +static void __init jmr3927_mtd_init(void) +{ + int i; + + for (i = 0; i < 2; i++) + tx3927_mtd_init(i); +} + static void __init jmr3927_device_init(void) { __swizzle_addr_b = jmr3927_swizzle_addr_b; jmr3927_rtc_init(); tx3927_wdt_init(); + jmr3927_mtd_init(); } struct txx9_board_vec jmr3927_vec __initdata = { diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c index 0464a39b39ac..abe32c1a79dc 100644 --- a/arch/mips/txx9/rbtx4927/setup.c +++ b/arch/mips/txx9/rbtx4927/setup.c @@ -307,11 +307,20 @@ static void __init rbtx4927_ne_init(void) platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res)); } +static void __init rbtx4927_mtd_init(void) +{ + int i; + + for (i = 0; i < 2; i++) + tx4927_mtd_init(i); +} + static void __init rbtx4927_device_init(void) { toshiba_rbtx4927_rtc_init(); rbtx4927_ne_init(); tx4927_wdt_init(); + rbtx4927_mtd_init(); } struct txx9_board_vec rbtx4927_vec __initdata = { diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index 9ab48dec0fe8..e7bc5b8c7db8 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -294,6 +295,42 @@ static int __init rbtx4938_spi_init(void) return 0; } +static void __init rbtx4938_mtd_init(void) +{ + struct physmap_flash_data pdata = { + .width = 4, + }; + + switch (readb(rbtx4938_bdipsw_addr) & 7) { + case 0: + /* Boot */ + txx9_physmap_flash_init(0, 0x1fc00000, 0x400000, &pdata); + /* System */ + txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata); + break; + case 1: + /* System */ + txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata); + /* Boot */ + txx9_physmap_flash_init(1, 0x1ec00000, 0x400000, &pdata); + break; + case 2: + /* Ext */ + txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata); + /* System */ + txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata); + /* Boot */ + txx9_physmap_flash_init(2, 0x1dc00000, 0x400000, &pdata); + break; + case 3: + /* Boot */ + txx9_physmap_flash_init(1, 0x1bc00000, 0x400000, &pdata); + /* System */ + txx9_physmap_flash_init(2, 0x1a000000, 0x1000000, &pdata); + break; + } +} + static void __init rbtx4938_arch_init(void) { gpiochip_add(&rbtx4938_spi_gpio_chip); @@ -306,6 +343,7 @@ static void __init rbtx4938_device_init(void) rbtx4938_ethaddr_init(); rbtx4938_ne_init(); tx4938_wdt_init(); + rbtx4938_mtd_init(); } struct txx9_board_vec rbtx4938_vec __initdata = { diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index 0a225bf73496..1982c4437b1d 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -59,4 +59,8 @@ static inline void txx9_sio_putchar_init(unsigned long baseaddr) } #endif +struct physmap_flash_data; +void txx9_physmap_flash_init(int no, unsigned long addr, unsigned long size, + const struct physmap_flash_data *pdata); + #endif /* __ASM_TXX9_GENERIC_H */ diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h index 587deb9592d2..dc30c8d42061 100644 --- a/include/asm-mips/txx9/tx3927.h +++ b/include/asm-mips/txx9/tx3927.h @@ -325,6 +325,7 @@ struct tx3927_ccfg_reg { #define TX3927_ROMC_BA(ch) (tx3927_romcptr->cr[(ch)] & 0xfff00000) #define TX3927_ROMC_SIZE(ch) \ (0x00100000 << ((tx3927_romcptr->cr[(ch)] >> 8) & 0xf)) +#define TX3927_ROMC_WIDTH(ch) (32 >> ((tx3927_romcptr->cr[(ch)] >> 7) & 0x1)) void tx3927_wdt_init(void); void tx3927_setup(void); @@ -335,5 +336,6 @@ void tx3927_pcic_setup(struct pci_controller *channel, unsigned long sdram_size, int extarb); void tx3927_setup_pcierr_irq(void); void tx3927_irq_init(void); +void tx3927_mtd_init(int ch); #endif /* __ASM_TXX9_TX3927_H */ diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h index 195f6515db9a..36a9241b0cac 100644 --- a/include/asm-mips/txx9/tx4927.h +++ b/include/asm-mips/txx9/tx4927.h @@ -196,6 +196,8 @@ struct tx4927_ccfg_reg { #define TX4927_EBUSC_BA(ch) ((TX4927_EBUSC_CR(ch) >> 48) << 20) #define TX4927_EBUSC_SIZE(ch) \ (0x00100000 << ((unsigned long)(TX4927_EBUSC_CR(ch) >> 8) & 0xf)) +#define TX4927_EBUSC_WIDTH(ch) \ + (64 >> ((__u32)(TX4927_EBUSC_CR(ch) >> 20) & 0x3)) /* utilities */ static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits) @@ -251,5 +253,6 @@ int tx4927_report_pciclk(void); int tx4927_pciclk66_setup(void); void tx4927_setup_pcierr_irq(void); void tx4927_irq_init(void); +void tx4927_mtd_init(int ch); #endif /* __ASM_TXX9_TX4927_H */ diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h index 8175d4ccbc39..989e7751135a 100644 --- a/include/asm-mips/txx9/tx4938.h +++ b/include/asm-mips/txx9/tx4938.h @@ -274,6 +274,7 @@ struct tx4938_ccfg_reg { #define TX4938_EBUSC_CR(ch) TX4927_EBUSC_CR(ch) #define TX4938_EBUSC_BA(ch) TX4927_EBUSC_BA(ch) #define TX4938_EBUSC_SIZE(ch) TX4927_EBUSC_SIZE(ch) +#define TX4938_EBUSC_WIDTH(ch) TX4927_EBUSC_WIDTH(ch) #define tx4938_get_mem_size() tx4927_get_mem_size() void tx4938_wdt_init(void); @@ -289,5 +290,6 @@ struct pci_dev; int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot); void tx4938_setup_pcierr_irq(void); void tx4938_irq_init(void); +void tx4938_mtd_init(int ch); #endif From 74894363499942a76f2c20e41e8bfebc9fdc267a Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:12 +0900 Subject: [PATCH 10/49] MIPS: TXx9: Raise priority of interrupts for errors, timers, SIO Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/irq_tx4927.c | 11 +++++++++++ arch/mips/txx9/generic/irq_tx4938.c | 11 +++++++++++ include/asm-mips/txx9/tx4927.h | 11 +++++++++++ 3 files changed, 33 insertions(+) diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c index cbea1fdde82b..ad2870def8f1 100644 --- a/arch/mips/txx9/generic/irq_tx4927.c +++ b/arch/mips/txx9/generic/irq_tx4927.c @@ -30,8 +30,19 @@ void __init tx4927_irq_init(void) { + int i; + mips_cpu_irq_init(); txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL); set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT, handle_simple_irq); + /* raise priority for errors, timers, SIO */ + txx9_irq_set_pri(TX4927_IR_ECCERR, 7); + txx9_irq_set_pri(TX4927_IR_WTOERR, 7); + txx9_irq_set_pri(TX4927_IR_PCIERR, 7); + txx9_irq_set_pri(TX4927_IR_PCIPME, 7); + for (i = 0; i < TX4927_NUM_IR_TMR; i++) + txx9_irq_set_pri(TX4927_IR_TMR(i), 6); + for (i = 0; i < TX4927_NUM_IR_SIO; i++) + txx9_irq_set_pri(TX4927_IR_SIO(i), 5); } diff --git a/arch/mips/txx9/generic/irq_tx4938.c b/arch/mips/txx9/generic/irq_tx4938.c index 6eac684bf190..025ae11359a8 100644 --- a/arch/mips/txx9/generic/irq_tx4938.c +++ b/arch/mips/txx9/generic/irq_tx4938.c @@ -18,8 +18,19 @@ void __init tx4938_irq_init(void) { + int i; + mips_cpu_irq_init(); txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL); set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT, handle_simple_irq); + /* raise priority for errors, timers, SIO */ + txx9_irq_set_pri(TX4938_IR_ECCERR, 7); + txx9_irq_set_pri(TX4938_IR_WTOERR, 7); + txx9_irq_set_pri(TX4938_IR_PCIERR, 7); + txx9_irq_set_pri(TX4938_IR_PCIPME, 7); + for (i = 0; i < TX4938_NUM_IR_TMR; i++) + txx9_irq_set_pri(TX4938_IR_TMR(i), 6); + for (i = 0; i < TX4938_NUM_IR_SIO; i++) + txx9_irq_set_pri(TX4938_IR_SIO(i), 5); } diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h index 36a9241b0cac..7d813f1cb98d 100644 --- a/include/asm-mips/txx9/tx4927.h +++ b/include/asm-mips/txx9/tx4927.h @@ -50,12 +50,23 @@ #define TX4927_SIO_REG(ch) (TX4927_REG_BASE + 0xf300 + (ch) * 0x100) #define TX4927_PIO_REG (TX4927_REG_BASE + 0xf500) +#define TX4927_IR_ECCERR 0 +#define TX4927_IR_WTOERR 1 +#define TX4927_NUM_IR_INT 6 #define TX4927_IR_INT(n) (2 + (n)) +#define TX4927_NUM_IR_SIO 2 #define TX4927_IR_SIO(n) (8 + (n)) +#define TX4927_NUM_IR_DMA 4 +#define TX4927_IR_DMA(n) (10 + (n)) +#define TX4927_IR_PIO 14 +#define TX4927_IR_PDMAC 15 #define TX4927_IR_PCIC 16 #define TX4927_NUM_IR_TMR 3 #define TX4927_IR_TMR(n) (17 + (n)) #define TX4927_IR_PCIERR 22 +#define TX4927_IR_PCIPME 23 +#define TX4927_IR_ACLC 24 +#define TX4927_IR_ACLCPME 25 #define TX4927_NUM_IR 32 #define TX4927_IRC_INT 2 /* IP[2] in Status register */ From e6332374770ae5aa370af5792115261edbad05c1 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:13 +0900 Subject: [PATCH 11/49] MIPS: RBTX4938: Add TOSHIBA_RBTX4938_MPLEX_KEEP Add TOSHIBA_RBTX4938_MPLEX_KEEP to keep MPLEX settings by firmware. Also replace some printk with pr_info. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/Kconfig | 2 ++ arch/mips/txx9/rbtx4938/setup.c | 13 ++++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index 6fb2ef09d5dd..aade3348af29 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig @@ -94,6 +94,8 @@ config TOSHIBA_RBTX4938_MPLEX_NAND bool "NAND" config TOSHIBA_RBTX4938_MPLEX_ATA bool "ATA" +config TOSHIBA_RBTX4938_MPLEX_KEEP + bool "Keep firmware settings" endchoice diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index e7bc5b8c7db8..7aba92a12399 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c @@ -174,23 +174,30 @@ static void __init rbtx4938_mem_setup(void) #endif #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61 - printk(KERN_INFO "PIOSEL: disabling both ata and nand selection\n"); + pr_info("PIOSEL: disabling both ATA and NAND selection\n"); txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL); #endif #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND - printk(KERN_INFO "PIOSEL: enabling nand selection\n"); + pr_info("PIOSEL: enabling NAND selection\n"); txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); #endif #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA - printk(KERN_INFO "PIOSEL: enabling ata selection\n"); + pr_info("PIOSEL: enabling ATA selection\n"); txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); #endif +#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP + pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); + pr_info("PIOSEL: NAND %s, ATA %s\n", + (pcfg & TX4938_PCFG_NDF_SEL) ? "enabled" : "disabled", + (pcfg & TX4938_PCFG_ATA_SEL) ? "enabled" : "disabled"); +#endif + rbtx4938_spi_setup(); pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */ /* fixup piosel */ From d75a40e90e9eb08c2159e719a90a7922dab231d3 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:14 +0900 Subject: [PATCH 12/49] MIPS: TXx9: Make spi_eeprom.c more generic Helper routines in txx9/rbtx4938/spi_eeprom.c is not TX4938 specific. Move it to txx9/generic/ directory and make it works with SPI bus number other than 0. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle create mode 100644 arch/mips/txx9/generic/spi_eeprom.c delete mode 100644 arch/mips/txx9/rbtx4938/spi_eeprom.c --- arch/mips/txx9/generic/Makefile | 1 + .../txx9/{rbtx4938 => generic}/spi_eeprom.c | 28 +++++++++++-------- arch/mips/txx9/rbtx4938/Makefile | 2 +- arch/mips/txx9/rbtx4938/setup.c | 11 ++++---- include/asm-mips/txx9/spi.h | 19 +++++++++++-- 5 files changed, 41 insertions(+), 20 deletions(-) rename arch/mips/txx9/{rbtx4938 => generic}/spi_eeprom.c (79%) diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile index 9bb34af26b73..986852cc774c 100644 --- a/arch/mips/txx9/generic/Makefile +++ b/arch/mips/txx9/generic/Makefile @@ -8,5 +8,6 @@ obj-$(CONFIG_SOC_TX3927) += setup_tx3927.o irq_tx3927.o obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o setup_tx4927.o irq_tx4927.o obj-$(CONFIG_SOC_TX4938) += mem_tx4927.o setup_tx4938.o irq_tx4938.o obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o +obj-$(CONFIG_SPI) += spi_eeprom.o EXTRA_CFLAGS += -Werror diff --git a/arch/mips/txx9/rbtx4938/spi_eeprom.c b/arch/mips/txx9/generic/spi_eeprom.c similarity index 79% rename from arch/mips/txx9/rbtx4938/spi_eeprom.c rename to arch/mips/txx9/generic/spi_eeprom.c index a7ea8b041c1d..75c347238f47 100644 --- a/arch/mips/txx9/rbtx4938/spi_eeprom.c +++ b/arch/mips/txx9/generic/spi_eeprom.c @@ -18,29 +18,31 @@ #define AT250X0_PAGE_SIZE 8 /* register board information for at25 driver */ -int __init spi_eeprom_register(int chipid) +int __init spi_eeprom_register(int busid, int chipid, int size) { - static struct spi_eeprom eeprom = { - .name = "at250x0", - .byte_len = 128, - .page_size = AT250X0_PAGE_SIZE, - .flags = EE_ADDR1, - }; struct spi_board_info info = { .modalias = "at25", .max_speed_hz = 1500000, /* 1.5Mbps */ - .bus_num = 0, + .bus_num = busid, .chip_select = chipid, - .platform_data = &eeprom, /* Mode 0: High-Active, Sample-Then-Shift */ }; - + struct spi_eeprom *eeprom; + eeprom = kzalloc(sizeof(*eeprom), GFP_KERNEL); + if (!eeprom) + return -ENOMEM; + strcpy(eeprom->name, "at250x0"); + eeprom->byte_len = size; + eeprom->page_size = AT250X0_PAGE_SIZE; + eeprom->flags = EE_ADDR1; + info.platform_data = eeprom; return spi_register_board_info(&info, 1); } /* simple temporary spi driver to provide early access to seeprom. */ static struct read_param { + int busid; int chipid; int address; unsigned char *buf; @@ -57,7 +59,8 @@ static int __init early_seeprom_probe(struct spi_device *spi) dev_info(&spi->dev, "spiclk %u KHz.\n", (spi->max_speed_hz + 500) / 1000); - if (read_param->chipid != spi->chip_select) + if (read_param->busid != spi->master->bus_num || + read_param->chipid != spi->chip_select) return -ENODEV; while (len > 0) { /* spi_write_then_read can only work with small chunk */ @@ -80,11 +83,12 @@ static struct spi_driver early_seeprom_driver __initdata = { .probe = early_seeprom_probe, }; -int __init spi_eeprom_read(int chipid, int address, +int __init spi_eeprom_read(int busid, int chipid, int address, unsigned char *buf, int len) { int ret; struct read_param param = { + .busid = busid, .chipid = chipid, .address = address, .buf = buf, diff --git a/arch/mips/txx9/rbtx4938/Makefile b/arch/mips/txx9/rbtx4938/Makefile index 9dcc52ae5b9d..f3e1f597b4f1 100644 --- a/arch/mips/txx9/rbtx4938/Makefile +++ b/arch/mips/txx9/rbtx4938/Makefile @@ -1,3 +1,3 @@ -obj-y += prom.o setup.o irq.o spi_eeprom.o +obj-y += prom.o setup.o irq.o EXTRA_CFLAGS += -Werror diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index 7aba92a12399..ec6e81258f73 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c @@ -111,6 +111,7 @@ static void __init rbtx4938_pci_setup(void) #define SEEPROM2_CS 0 /* IOC */ #define SEEPROM3_CS 1 /* IOC */ #define SRTC_CS 2 /* IOC */ +#define SPI_BUSNO 0 static int __init rbtx4938_ethaddr_init(void) { @@ -120,7 +121,7 @@ static int __init rbtx4938_ethaddr_init(void) int i; /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */ - if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) { + if (spi_eeprom_read(SPI_BUSNO, SEEPROM1_CS, 0, dat, sizeof(dat))) { printk(KERN_ERR "seeprom: read error.\n"); return -ENODEV; } else { @@ -287,9 +288,9 @@ static int __init rbtx4938_spi_init(void) .mode = SPI_MODE_1 | SPI_CS_HIGH, }; spi_register_board_info(&srtc_info, 1); - spi_eeprom_register(SEEPROM1_CS); - spi_eeprom_register(16 + SEEPROM2_CS); - spi_eeprom_register(16 + SEEPROM3_CS); + spi_eeprom_register(SPI_BUSNO, SEEPROM1_CS, 128); + spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM2_CS, 128); + spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM3_CS, 128); gpio_request(16 + SRTC_CS, "rtc-rs5c348"); gpio_direction_output(16 + SRTC_CS, 0); gpio_request(SEEPROM1_CS, "seeprom1"); @@ -298,7 +299,7 @@ static int __init rbtx4938_spi_init(void) gpio_direction_output(16 + SEEPROM2_CS, 1); gpio_request(16 + SEEPROM3_CS, "seeprom3"); gpio_direction_output(16 + SEEPROM3_CS, 1); - tx4938_spi_init(0); + tx4938_spi_init(SPI_BUSNO); return 0; } diff --git a/include/asm-mips/txx9/spi.h b/include/asm-mips/txx9/spi.h index ddfb2a0dc432..0d727f354557 100644 --- a/include/asm-mips/txx9/spi.h +++ b/include/asm-mips/txx9/spi.h @@ -13,7 +13,22 @@ #ifndef __ASM_TXX9_SPI_H #define __ASM_TXX9_SPI_H -extern int spi_eeprom_register(int chipid); -extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len); +#include + +#ifdef CONFIG_SPI +int spi_eeprom_register(int busid, int chipid, int size); +int spi_eeprom_read(int busid, int chipid, + int address, unsigned char *buf, int len); +#else +static inline int spi_eeprom_register(int busid, int chipid, int size) +{ + return -ENODEV; +} +static inline int spi_eeprom_read(int busid, int chipid, + int address, unsigned char *buf, int len) +{ + return -ENODEV; +} +#endif #endif /* __ASM_TXX9_SPI_H */ From 496a3b5c2c188e8af07261792b3d4e6cf1c1dab9 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:15 +0900 Subject: [PATCH 13/49] MIPS: TXx9: Default machine_restart using watchdog reset Add default machine_restart routine using watchdog reset of TX4927 and TX4938. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup.c | 15 ++++++++++++++ arch/mips/txx9/generic/setup_tx4927.c | 28 +++++++++++++++++++++++++++ arch/mips/txx9/generic/setup_tx4938.c | 28 +++++++++++++++++++++++++++ include/asm-mips/txx9/generic.h | 1 + 4 files changed, 72 insertions(+) diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index cfa3ccf493bb..118d716f7832 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -29,6 +29,7 @@ #include #include #include +#include #ifdef CONFIG_CPU_TX49XX #include #endif @@ -444,6 +445,20 @@ void __init txx9_wdt_init(unsigned long base) platform_device_register_simple("txx9wdt", -1, &res, 1); } +void txx9_wdt_now(unsigned long base) +{ + struct txx9_tmr_reg __iomem *tmrptr = + ioremap(base, sizeof(struct txx9_tmr_reg)); + /* disable watch dog timer */ + __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); + __raw_writel(0, &tmrptr->tcr); + /* kick watchdog */ + __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); + __raw_writel(1, &tmrptr->cpra); /* immediate */ + __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, + &tmrptr->tcr); +} + /* SPI support */ void __init txx9_spi_init(int busid, unsigned long base, int irq) { diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index 0840ef930e40..7189675f6a29 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -23,6 +24,10 @@ static void __init tx4927_wdr_init(void) { + /* report watchdog reset status */ + if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST) + pr_warning("Watchdog reset detected at 0x%lx\n", + read_c0_errorepc()); /* clear WatchDogReset (W1C) */ tx4927_ccfg_set(TX4927_CCFG_WDRST); /* do reset on watchdog */ @@ -34,6 +39,27 @@ void __init tx4927_wdt_init(void) txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL); } +static void tx4927_machine_restart(char *command) +{ + local_irq_disable(); + pr_emerg("Rebooting (with %s watchdog reset)...\n", + (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) ? + "external" : "internal"); + /* clear watchdog status */ + tx4927_ccfg_set(TX4927_CCFG_WDRST); /* W1C */ + txx9_wdt_now(TX4927_TMR_REG(2) & 0xfffffffffULL); + while (!(____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST)) + ; + mdelay(10); + if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) { + pr_emerg("Rebooting (with internal watchdog reset)...\n"); + /* External WDRST failed. Do internal watchdog reset */ + tx4927_ccfg_clear(TX4927_CCFG_WDREXEN); + } + /* fallback */ + (*_machine_halt)(); +} + static struct resource tx4927_sdram_resource[4]; void __init tx4927_setup(void) @@ -169,6 +195,8 @@ void __init tx4927_setup(void) txx9_gpio_init(TX4927_PIO_REG & 0xfffffffffULL, 0, TX4927_NUM_PIO); __raw_writel(0, &tx4927_pioptr->maskcpu); __raw_writel(0, &tx4927_pioptr->maskext); + + _machine_restart = tx4927_machine_restart; } void __init tx4927_time_init(unsigned int tmrnr) diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index 630a7aac61f6..4fbc85a8597f 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -23,6 +24,10 @@ static void __init tx4938_wdr_init(void) { + /* report watchdog reset status */ + if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST) + pr_warning("Watchdog reset detected at 0x%lx\n", + read_c0_errorepc()); /* clear WatchDogReset (W1C) */ tx4938_ccfg_set(TX4938_CCFG_WDRST); /* do reset on watchdog */ @@ -34,6 +39,27 @@ void __init tx4938_wdt_init(void) txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL); } +static void tx4938_machine_restart(char *command) +{ + local_irq_disable(); + pr_emerg("Rebooting (with %s watchdog reset)...\n", + (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) ? + "external" : "internal"); + /* clear watchdog status */ + tx4938_ccfg_set(TX4938_CCFG_WDRST); /* W1C */ + txx9_wdt_now(TX4938_TMR_REG(2) & 0xfffffffffULL); + while (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST)) + ; + mdelay(10); + if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) { + pr_emerg("Rebooting (with internal watchdog reset)...\n"); + /* External WDRST failed. Do internal watchdog reset */ + tx4938_ccfg_clear(TX4938_CCFG_WDREXEN); + } + /* fallback */ + (*_machine_halt)(); +} + static struct resource tx4938_sdram_resource[4]; static struct resource tx4938_sram_resource; @@ -229,6 +255,8 @@ void __init tx4938_setup(void) TX4938_CLKCTR_ETH1CKD); } } + + _machine_restart = tx4938_machine_restart; } void __init tx4938_time_init(unsigned int tmrnr) diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index 1982c4437b1d..1e1a9f2d2379 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -45,6 +45,7 @@ extern int (*txx9_irq_dispatch)(int pending); char *prom_getcmdline(void); const char *prom_getenv(const char *name); void txx9_wdt_init(unsigned long base); +void txx9_wdt_now(unsigned long base); void txx9_spi_init(int busid, unsigned long base, int irq); void txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr); void txx9_sio_init(unsigned long baseaddr, int irq, From ce8e74112b1b1215aa5bbe261ed751498ce65434 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:16 +0900 Subject: [PATCH 14/49] MIPS: TXx9: Add board_be_init for TX4927/TX4938 Setup default board_be_handler for TX4927/TX4938. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup_tx4927.c | 23 +++++++++++++++++++++++ arch/mips/txx9/generic/setup_tx4938.c | 23 +++++++++++++++++++++++ 2 files changed, 46 insertions(+) diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index 7189675f6a29..c4248cbbd84a 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -14,8 +14,10 @@ #include #include #include +#include #include #include +#include #include #include #include @@ -60,6 +62,26 @@ static void tx4927_machine_restart(char *command) (*_machine_halt)(); } +void show_registers(struct pt_regs *regs); +static int tx4927_be_handler(struct pt_regs *regs, int is_fixup) +{ + int data = regs->cp0_cause & 4; + console_verbose(); + pr_err("%cBE exception at %#lx\n", data ? 'D' : 'I', regs->cp0_epc); + pr_err("ccfg:%llx, toea:%llx\n", + (unsigned long long)____raw_readq(&tx4927_ccfgptr->ccfg), + (unsigned long long)____raw_readq(&tx4927_ccfgptr->toea)); +#ifdef CONFIG_PCI + tx4927_report_pcic_status(); +#endif + show_registers(regs); + panic("BusError!"); +} +static void __init tx4927_be_init(void) +{ + board_be_handler = tx4927_be_handler; +} + static struct resource tx4927_sdram_resource[4]; void __init tx4927_setup(void) @@ -197,6 +219,7 @@ void __init tx4927_setup(void) __raw_writel(0, &tx4927_pioptr->maskext); _machine_restart = tx4927_machine_restart; + board_be_init = tx4927_be_init; } void __init tx4927_time_init(unsigned int tmrnr) diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index 4fbc85a8597f..0d8517ad3ad0 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -14,8 +14,10 @@ #include #include #include +#include #include #include +#include #include #include #include @@ -60,6 +62,26 @@ static void tx4938_machine_restart(char *command) (*_machine_halt)(); } +void show_registers(struct pt_regs *regs); +static int tx4938_be_handler(struct pt_regs *regs, int is_fixup) +{ + int data = regs->cp0_cause & 4; + console_verbose(); + pr_err("%cBE exception at %#lx\n", data ? 'D' : 'I', regs->cp0_epc); + pr_err("ccfg:%llx, toea:%llx\n", + (unsigned long long)____raw_readq(&tx4938_ccfgptr->ccfg), + (unsigned long long)____raw_readq(&tx4938_ccfgptr->toea)); +#ifdef CONFIG_PCI + tx4927_report_pcic_status(); +#endif + show_registers(regs); + panic("BusError!"); +} +static void __init tx4938_be_init(void) +{ + board_be_handler = tx4938_be_handler; +} + static struct resource tx4938_sdram_resource[4]; static struct resource tx4938_sram_resource; @@ -257,6 +279,7 @@ void __init tx4938_setup(void) } _machine_restart = tx4938_machine_restart; + board_be_init = tx4938_be_init; } void __init tx4938_time_init(unsigned int tmrnr) From ee25d33f87348fd9e0ea148c4a25a3e7415fb5ba Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:17 +0900 Subject: [PATCH 15/49] MIPS: TXx9: Add __init tag for tx4938_pcic1_map_irq. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/pci/pci-tx4938.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/pci/pci-tx4938.c b/arch/mips/pci/pci-tx4938.c index 60e2c52c2c5e..1ea257bc3b8f 100644 --- a/arch/mips/pci/pci-tx4938.c +++ b/arch/mips/pci/pci-tx4938.c @@ -114,7 +114,7 @@ int __init tx4938_pciclk66_setup(void) return pciclk; } -int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot) +int __init tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot) { if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) { switch (slot) { From 021635280d4572b9d9bb5481b00afea8a66b295f Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 19 Aug 2008 22:55:18 +0900 Subject: [PATCH 16/49] MIPS: TXx9: Declare smsc_fdc37m81x_config_get() in smsc_fdc37m81x.h Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/smsc_fdc37m81x.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/asm-mips/txx9/smsc_fdc37m81x.h b/include/asm-mips/txx9/smsc_fdc37m81x.h index 02e161d0755d..d1d6332b4ca6 100644 --- a/include/asm-mips/txx9/smsc_fdc37m81x.h +++ b/include/asm-mips/txx9/smsc_fdc37m81x.h @@ -62,6 +62,7 @@ void smsc_fdc37m81x_config_beg(void); void smsc_fdc37m81x_config_end(void); +u8 smsc_fdc37m81x_config_get(u8 reg); void smsc_fdc37m81x_config_set(u8 reg, u8 val); #endif From 3cd4e067a3e548a56a8b5e202552dcd18a2783a9 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 22 Aug 2008 17:00:22 +0200 Subject: [PATCH 17/49] MIPS: RB532: Cleanup and group definitions to their right places This patch moves GPIO related definitions to gpio.h and IRQ related to irq.h Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/rb532/devices.c | 16 ++-------------- include/asm-mips/mach-rc32434/gpio.h | 9 +++++++++ include/asm-mips/mach-rc32434/irq.h | 5 +++++ 3 files changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c index 82ab395efa33..7090dc97606f 100644 --- a/arch/mips/rb532/devices.c +++ b/arch/mips/rb532/devices.c @@ -34,21 +34,11 @@ #include #include #include - -#define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0) -#define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1) -#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9) -#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10) +#include #define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET) #define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET) -/* NAND definitions */ -#define GPIO_RDY (1 << 0x08) -#define GPIO_WPX (1 << 0x09) -#define GPIO_ALE (1 << 0x0a) -#define GPIO_CLE (1 << 0x0b) - static struct resource korina_dev0_res[] = { { .name = "korina_regs", @@ -101,8 +91,6 @@ static struct platform_device korina_dev0 = { .num_resources = ARRAY_SIZE(korina_dev0_res), }; -#define CF_GPIO_NUM 13 - static struct resource cf_slot0_res[] = { { .name = "cf_membase", @@ -116,7 +104,7 @@ static struct resource cf_slot0_res[] = { }; static struct cf_device cf_slot0_data = { - .gpio_pin = 13 + .gpio_pin = CF_GPIO_NUM }; static struct platform_device cf_slot0 = { diff --git a/include/asm-mips/mach-rc32434/gpio.h b/include/asm-mips/mach-rc32434/gpio.h index f946f5f45bbb..4fe18dbacaf7 100644 --- a/include/asm-mips/mach-rc32434/gpio.h +++ b/include/asm-mips/mach-rc32434/gpio.h @@ -61,6 +61,15 @@ struct rb532_gpio_reg { /* PCI messaging unit */ #define RC32434_PCI_MSU_GPIO (1 << 13) +/* NAND GPIO signals */ +#define GPIO_RDY (1 << 0x08) +#define GPIO_WPX (1 << 0x09) +#define GPIO_ALE (1 << 0x0a) +#define GPIO_CLE (1 << 0x0b) + +/* Compact Flash GPIO pin */ +#define CF_GPIO_NUM 13 + extern void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val); extern unsigned get_434_reg(unsigned reg_offs); diff --git a/include/asm-mips/mach-rc32434/irq.h b/include/asm-mips/mach-rc32434/irq.h index cb9e4725f5dc..d68318b6b76d 100644 --- a/include/asm-mips/mach-rc32434/irq.h +++ b/include/asm-mips/mach-rc32434/irq.h @@ -5,4 +5,9 @@ #include +#define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0) +#define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1) +#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9) +#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10) + #endif /* __ASM_RC32434_IRQ_H */ From 3c8cf8caa5b217fbb17d0dce7f6bbec1d7da7249 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 22 Aug 2008 17:01:03 +0200 Subject: [PATCH 18/49] MIPS: RB532: Use physical addresses for gpio and device controller registers This patch fixes the misuse of virtual addresses for the GPIO and third device controller which would lead to problems while accessing ioremap'd registers. Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 8 ++++---- include/asm-mips/mach-rc32434/rb.h | 3 ++- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index 00a1c7877bf4..11d7127655e3 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -47,8 +47,8 @@ struct mpmc_device dev3; static struct resource rb532_gpio_reg0_res[] = { { .name = "gpio_reg0", - .start = (u32)(IDT434_REG_BASE + GPIOBASE), - .end = (u32)(IDT434_REG_BASE + GPIOBASE + sizeof(struct rb532_gpio_reg)), + .start = REGBASE + GPIOBASE, + .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1, .flags = IORESOURCE_MEM, } }; @@ -56,8 +56,8 @@ static struct resource rb532_gpio_reg0_res[] = { static struct resource rb532_dev3_ctl_res[] = { { .name = "dev3_ctl", - .start = (u32)(IDT434_REG_BASE + DEV3BASE), - .end = (u32)(IDT434_REG_BASE + DEV3BASE + sizeof(struct dev_reg)), + .start = REGBASE + DEV3BASE, + .end = REGBASE + DEV3BASE + sizeof(struct dev_reg) - 1, .flags = IORESOURCE_MEM, } }; diff --git a/include/asm-mips/mach-rc32434/rb.h b/include/asm-mips/mach-rc32434/rb.h index e0a76e3ffea8..62ac73c999c4 100644 --- a/include/asm-mips/mach-rc32434/rb.h +++ b/include/asm-mips/mach-rc32434/rb.h @@ -17,7 +17,8 @@ #include -#define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(0x18000000)) +#define REGBASE 0x18000000 +#define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE)) #define DEV0BASE 0x010000 #define DEV0MASK 0x010004 #define DEV0C 0x010008 From 49afa0a15180c22c8836ef36edd6aa48ab7b2915 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 22 Aug 2008 17:01:31 +0200 Subject: [PATCH 19/49] MIPS: RB532: Remove gpio bootup state We are no longer using gpio bootup state, so do not export it and do not parse the kernel command line tag for it. Instead we provide gpio-keys for the button the gpio bootup state was checking. Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/rb532/prom.c | 10 ---------- include/asm-mips/mach-rc32434/prom.h | 4 ---- 2 files changed, 14 deletions(-) diff --git a/arch/mips/rb532/prom.c b/arch/mips/rb532/prom.c index 1bc0af8febf4..c5d8868e1b15 100644 --- a/arch/mips/rb532/prom.c +++ b/arch/mips/rb532/prom.c @@ -41,8 +41,6 @@ extern void __init setup_serial_port(void); unsigned int idt_cpu_freq = 132000000; EXPORT_SYMBOL(idt_cpu_freq); -unsigned int gpio_bootup_state; -EXPORT_SYMBOL(gpio_bootup_state); static struct resource ddr_reg[] = { { @@ -108,9 +106,6 @@ void __init prom_setup_cmdline(void) mips_machtype = MACH_MIKROTIK_RB532; } - if (match_tag(prom_argv[i], GPIO_TAG)) - gpio_bootup_state = tag2ul(prom_argv[i], GPIO_TAG); - strcpy(cp, prom_argv[i]); cp += strlen(prom_argv[i]); } @@ -122,11 +117,6 @@ void __init prom_setup_cmdline(void) strcpy(cp, arcs_cmdline); cp += strlen(arcs_cmdline); } - if (gpio_bootup_state & 0x02) - strcpy(cp, GPIO_INIT_NOBUTTON); - else - strcpy(cp, GPIO_INIT_BUTTON); - cmd_line[CL_SIZE-1] = '\0'; strcpy(arcs_cmdline, cmd_line); diff --git a/include/asm-mips/mach-rc32434/prom.h b/include/asm-mips/mach-rc32434/prom.h index 1d66ddcda89a..660707f1bcce 100644 --- a/include/asm-mips/mach-rc32434/prom.h +++ b/include/asm-mips/mach-rc32434/prom.h @@ -28,14 +28,10 @@ #define PROM_ENTRY(x) (0xbfc00000 + ((x) * 8)) -#define GPIO_INIT_NOBUTTON "" -#define GPIO_INIT_BUTTON " 2" - #define SR_NMI 0x00180000 #define SERIAL_SPEED_ENTRY 0x00000001 #define FREQ_TAG "HZ=" -#define GPIO_TAG "gpio=" #define KMAC_TAG "kmac=" #define MEM_TAG "mem=" #define BOARD_TAG "board=" From c76befc3429354909d3242d11b8d3bcb3bea4b03 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 22 Aug 2008 17:02:03 +0200 Subject: [PATCH 20/49] MIPS: RB532: replace raw volatile read with a readl This patch replaces a raw read using volatiles with a readl. Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index 11d7127655e3..b028779fedda 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -70,7 +70,7 @@ void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val) spin_lock_irqsave(&dev3.lock, flags); - data = *(volatile unsigned *) (IDT434_REG_BASE + reg_offs); + data = readl(IDT434_REG_BASE + reg_offs); for (i = 0; i != len; ++i) { if (val & (1 << i)) data |= (1 << (i + bit)); From b6e2f58a503b56e154f90dc516647c93c5fe873d Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 22 Aug 2008 17:03:03 +0200 Subject: [PATCH 21/49] MIPS: RB532: Fix id usage in platform devices When there is only platform device of the same type, id = -1 should be used, fix this. Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/rb532/devices.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c index 7090dc97606f..31619c601b11 100644 --- a/arch/mips/rb532/devices.c +++ b/arch/mips/rb532/devices.c @@ -84,7 +84,7 @@ static struct korina_device korina_dev0_data = { }; static struct platform_device korina_dev0 = { - .id = 0, + .id = -1, .name = "korina", .dev.platform_data = &korina_dev0_data, .resource = korina_dev0_res, @@ -108,7 +108,7 @@ static struct cf_device cf_slot0_data = { }; static struct platform_device cf_slot0 = { - .id = 0, + .id = -1, .name = "pata-rb532-cf", .dev.platform_data = &cf_slot0_data, .resource = cf_slot0_res, @@ -173,7 +173,7 @@ static struct mtd_partition rb532_partition_info[] = { static struct platform_device rb532_led = { .name = "rb532-led", - .id = 0, + .id = -1, }; static struct gpio_keys_button rb532_gpio_btn[] = { From deeb45ac4a32c8271b022ecba73913bc1112e8e6 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Sat, 23 Aug 2008 18:53:24 +0200 Subject: [PATCH 22/49] MIPS: RB532: Remove obsolute reference to setup_serial_port We are no longer using setup_serial_port. So just remove it from the prom code. Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/rb532/prom.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/mips/rb532/prom.c b/arch/mips/rb532/prom.c index c5d8868e1b15..46ca24dbcc2d 100644 --- a/arch/mips/rb532/prom.c +++ b/arch/mips/rb532/prom.c @@ -37,8 +37,6 @@ #include #include -extern void __init setup_serial_port(void); - unsigned int idt_cpu_freq = 132000000; EXPORT_SYMBOL(idt_cpu_freq); From 606a083b1e1a357cb66454e4581b80f1a67d8368 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Sat, 23 Aug 2008 18:53:50 +0200 Subject: [PATCH 23/49] MIPS: RB532: Cleanup the headers again This patch cleans up headers and regroups informations to where they should reside. While moving, try to have a consistant naming for defines. Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/rb532/irq.c | 2 +- arch/mips/rb532/serial.c | 6 ++--- arch/mips/rb532/setup.c | 4 ++-- include/asm-mips/mach-rc32434/irq.h | 20 +++++++++++++++++ include/asm-mips/mach-rc32434/rb.h | 2 ++ include/asm-mips/mach-rc32434/rc32434.h | 30 ------------------------- 6 files changed, 28 insertions(+), 36 deletions(-) diff --git a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c index c0d0f950caf2..549b46d2fcee 100644 --- a/arch/mips/rb532/irq.c +++ b/arch/mips/rb532/irq.c @@ -45,7 +45,7 @@ #include #include -#include +#include struct intr_group { u32 mask; /* mask of valid bits in pending/mask registers */ diff --git a/arch/mips/rb532/serial.c b/arch/mips/rb532/serial.c index 1a05b5ddee09..3e0d7ec3a579 100644 --- a/arch/mips/rb532/serial.c +++ b/arch/mips/rb532/serial.c @@ -31,16 +31,16 @@ #include #include -#include +#include extern unsigned int idt_cpu_freq; static struct uart_port rb532_uart = { .type = PORT_16550A, .line = 0, - .irq = RC32434_UART0_IRQ, + .irq = UART0_IRQ, .iotype = UPIO_MEM, - .membase = (char *)KSEG1ADDR(RC32434_UART0_BASE), + .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE), .regshift = 2 }; diff --git a/arch/mips/rb532/setup.c b/arch/mips/rb532/setup.c index 7aafa95ac20b..50f530f5b602 100644 --- a/arch/mips/rb532/setup.c +++ b/arch/mips/rb532/setup.c @@ -9,7 +9,7 @@ #include #include -#include +#include #include struct pci_reg __iomem *pci_reg; @@ -27,7 +27,7 @@ static struct resource pci0_res[] = { static void rb_machine_restart(char *command) { /* just jump to the reset vector */ - writel(0x80000001, (void *)KSEG1ADDR(RC32434_REG_BASE + RC32434_RST)); + writel(0x80000001, IDT434_REG_BASE + RST); ((void (*)(void)) KSEG1ADDR(0x1FC00000u))(); } diff --git a/include/asm-mips/mach-rc32434/irq.h b/include/asm-mips/mach-rc32434/irq.h index d68318b6b76d..56738d8ec4e2 100644 --- a/include/asm-mips/mach-rc32434/irq.h +++ b/include/asm-mips/mach-rc32434/irq.h @@ -4,6 +4,26 @@ #define NR_IRQS 256 #include +#include + +/* Interrupt Controller */ +#define IC_GROUP0_PEND (REGBASE + 0x38000) +#define IC_GROUP0_MASK (REGBASE + 0x38008) +#define IC_GROUP_OFFSET 0x0C + +#define NUM_INTR_GROUPS 5 + +/* 16550 UARTs */ +#define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */ + /* GRP3 IRQ numbers start here */ +#define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) + /* GRP4 IRQ numbers start here */ +#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) + /* GRP5 IRQ numbers start here */ +#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) +#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32) + +#define UART0_IRQ (GROUP3_IRQ_BASE + 0) #define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0) #define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1) diff --git a/include/asm-mips/mach-rc32434/rb.h b/include/asm-mips/mach-rc32434/rb.h index 62ac73c999c4..79e8ef67d0d3 100644 --- a/include/asm-mips/mach-rc32434/rb.h +++ b/include/asm-mips/mach-rc32434/rb.h @@ -19,6 +19,8 @@ #define REGBASE 0x18000000 #define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE)) +#define UART0BASE 0x58000 +#define RST (1 << 15) #define DEV0BASE 0x010000 #define DEV0MASK 0x010004 #define DEV0C 0x010008 diff --git a/include/asm-mips/mach-rc32434/rc32434.h b/include/asm-mips/mach-rc32434/rc32434.h index c4a02145104e..9df04b72744a 100644 --- a/include/asm-mips/mach-rc32434/rc32434.h +++ b/include/asm-mips/mach-rc32434/rc32434.h @@ -8,37 +8,7 @@ #include #include -#define RC32434_REG_BASE 0x18000000 -#define RC32434_RST (1 << 15) - #define IDT_CLOCK_MULT 2 -#define MIPS_CPU_TIMER_IRQ 7 - -/* Interrupt Controller */ -#define IC_GROUP0_PEND (RC32434_REG_BASE + 0x38000) -#define IC_GROUP0_MASK (RC32434_REG_BASE + 0x38008) -#define IC_GROUP_OFFSET 0x0C - -#define NUM_INTR_GROUPS 5 - -/* 16550 UARTs */ -#define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */ - /* GRP3 IRQ numbers start here */ -#define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) - /* GRP4 IRQ numbers start here */ -#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) - /* GRP5 IRQ numbers start here */ -#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32) -#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32) - - -#ifdef __MIPSEB__ -#define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58003) -#else -#define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58000) -#endif - -#define RC32434_UART0_IRQ (GROUP3_IRQ_BASE + 0) /* cpu pipeline flush */ static inline void rc32434_sync(void) From 09b7dcf220a37245b16fd4a716923d75bf6edf8b Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Sat, 23 Aug 2008 18:54:04 +0200 Subject: [PATCH 24/49] MIPS: RB532: Remove unused rc32434_sync_delay and rc32434_sync_udelay This patch removes these two unused functions : rc32434_sync_delay and rc32434_sync_udelay Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- include/asm-mips/mach-rc32434/rc32434.h | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/include/asm-mips/mach-rc32434/rc32434.h b/include/asm-mips/mach-rc32434/rc32434.h index 9df04b72744a..fce25d4231fc 100644 --- a/include/asm-mips/mach-rc32434/rc32434.h +++ b/include/asm-mips/mach-rc32434/rc32434.h @@ -16,16 +16,4 @@ static inline void rc32434_sync(void) __asm__ volatile ("sync"); } -static inline void rc32434_sync_udelay(int us) -{ - __asm__ volatile ("sync"); - udelay(us); -} - -static inline void rc32434_sync_delay(int ms) -{ - __asm__ volatile ("sync"); - mdelay(ms); -} - #endif /* _ASM_RC32434_RC32434_H_ */ From d888e25b8dd1b501ac75b0c6587c043a394319c3 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Sat, 23 Aug 2008 18:54:34 +0200 Subject: [PATCH 25/49] MIPS: RB532: Convert to GPIO lib This patch converts the rb532 code to use gpio library and register its gpio chip. Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 2 +- arch/mips/rb532/gpio.c | 226 +++++++++++++++++++-------- include/asm-mips/mach-rc32434/gpio.h | 75 ++------- 3 files changed, 175 insertions(+), 128 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 1e06d233fa83..00a23a118492 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -568,7 +568,7 @@ config MIKROTIK_RB532 select SYS_SUPPORTS_LITTLE_ENDIAN select SWAP_IO_SPACE select BOOT_RAW - select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB help Support the Mikrotik(tm) RouterBoard 532 series, based on the IDT RC32434 SoC. diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index b028779fedda..76a7fd96d564 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -27,20 +27,23 @@ */ #include -#include #include #include -#include #include -#include #include - -#include +#include #include +#include -struct rb532_gpio_reg __iomem *rb532_gpio_reg0; -EXPORT_SYMBOL(rb532_gpio_reg0); +struct rb532_gpio_chip { + struct gpio_chip chip; + void __iomem *regbase; + void (*set_int_level)(struct gpio_chip *chip, unsigned offset, int value); + int (*get_int_level)(struct gpio_chip *chip, unsigned offset); + void (*set_int_status)(struct gpio_chip *chip, unsigned offset, int value); + int (*get_int_status)(struct gpio_chip *chip, unsigned offset); +}; struct mpmc_device dev3; @@ -108,108 +111,199 @@ unsigned char get_latch_u5(void) } EXPORT_SYMBOL(get_latch_u5); -int rb532_gpio_get_value(unsigned gpio) +/* + * Return GPIO level */ +static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset) { - return readl(&rb532_gpio_reg0->gpiod) & (1 << gpio); + u32 mask = 1 << offset; + struct rb532_gpio_chip *gpch; + + gpch = container_of(chip, struct rb532_gpio_chip, chip); + return readl(gpch->regbase + GPIOD) & mask; } -EXPORT_SYMBOL(rb532_gpio_get_value); -void rb532_gpio_set_value(unsigned gpio, int value) +/* + * Set output GPIO level + */ +static void rb532_gpio_set(struct gpio_chip *chip, + unsigned offset, int value) { - unsigned tmp; + unsigned long flags; + u32 mask = 1 << offset; + u32 tmp; + struct rb532_gpio_chip *gpch; + void __iomem *gpvr; - tmp = readl(&rb532_gpio_reg0->gpiod) & ~(1 << gpio); + gpch = container_of(chip, struct rb532_gpio_chip, chip); + gpvr = gpch->regbase + GPIOD; + + local_irq_save(flags); + tmp = readl(gpvr); if (value) - tmp |= 1 << gpio; - - writel(tmp, (void *)&rb532_gpio_reg0->gpiod); + tmp |= mask; + else + tmp &= ~mask; + writel(tmp, gpvr); + local_irq_restore(flags); } -EXPORT_SYMBOL(rb532_gpio_set_value); -int rb532_gpio_direction_input(unsigned gpio) +/* + * Set GPIO direction to input + */ +static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset) { - writel(readl(&rb532_gpio_reg0->gpiocfg) & ~(1 << gpio), - (void *)&rb532_gpio_reg0->gpiocfg); + unsigned long flags; + u32 mask = 1 << offset; + u32 value; + struct rb532_gpio_chip *gpch; + void __iomem *gpdr; + + gpch = container_of(chip, struct rb532_gpio_chip, chip); + gpdr = gpch->regbase + GPIOCFG; + + local_irq_save(flags); + value = readl(gpdr); + value &= ~mask; + writel(value, gpdr); + local_irq_restore(flags); return 0; } -EXPORT_SYMBOL(rb532_gpio_direction_input); -int rb532_gpio_direction_output(unsigned gpio, int value) +/* + * Set GPIO direction to output + */ +static int rb532_gpio_direction_output(struct gpio_chip *chip, + unsigned offset, int value) { - gpio_set_value(gpio, value); - writel(readl(&rb532_gpio_reg0->gpiocfg) | (1 << gpio), - (void *)&rb532_gpio_reg0->gpiocfg); + unsigned long flags; + u32 mask = 1 << offset; + u32 tmp; + struct rb532_gpio_chip *gpch; + void __iomem *gpdr; + + gpch = container_of(chip, struct rb532_gpio_chip, chip); + writel(mask, gpch->regbase + GPIOD); + gpdr = gpch->regbase + GPIOCFG; + + local_irq_save(flags); + tmp = readl(gpdr); + tmp |= mask; + writel(tmp, gpdr); + local_irq_restore(flags); return 0; } -EXPORT_SYMBOL(rb532_gpio_direction_output); -void rb532_gpio_set_int_level(unsigned gpio, int value) +/* + * Set the GPIO interrupt level + */ +static void rb532_gpio_set_int_level(struct gpio_chip *chip, + unsigned offset, int value) { - unsigned tmp; + unsigned long flags; + u32 mask = 1 << offset; + u32 tmp; + struct rb532_gpio_chip *gpch; + void __iomem *gpil; - tmp = readl(&rb532_gpio_reg0->gpioilevel) & ~(1 << gpio); + gpch = container_of(chip, struct rb532_gpio_chip, chip); + gpil = gpch->regbase + GPIOILEVEL; + + local_irq_save(flags); + tmp = readl(gpil); if (value) - tmp |= 1 << gpio; - writel(tmp, (void *)&rb532_gpio_reg0->gpioilevel); + tmp |= mask; + else + tmp &= ~mask; + writel(tmp, gpil); + local_irq_restore(flags); } -EXPORT_SYMBOL(rb532_gpio_set_int_level); -int rb532_gpio_get_int_level(unsigned gpio) +/* + * Get the GPIO interrupt level + */ +static int rb532_gpio_get_int_level(struct gpio_chip *chip, unsigned offset) { - return readl(&rb532_gpio_reg0->gpioilevel) & (1 << gpio); + u32 mask = 1 << offset; + struct rb532_gpio_chip *gpch; + + gpch = container_of(chip, struct rb532_gpio_chip, chip); + return readl(gpch->regbase + GPIOILEVEL) & mask; } -EXPORT_SYMBOL(rb532_gpio_get_int_level); -void rb532_gpio_set_int_status(unsigned gpio, int value) +/* + * Set the GPIO interrupt status + */ +static void rb532_gpio_set_int_status(struct gpio_chip *chip, + unsigned offset, int value) { - unsigned tmp; + unsigned long flags; + u32 mask = 1 << offset; + u32 tmp; + struct rb532_gpio_chip *gpch; + void __iomem *gpis; - tmp = readl(&rb532_gpio_reg0->gpioistat); + gpch = container_of(chip, struct rb532_gpio_chip, chip); + gpis = gpch->regbase + GPIOISTAT; + + local_irq_save(flags); + tmp = readl(gpis); if (value) - tmp |= 1 << gpio; - writel(tmp, (void *)&rb532_gpio_reg0->gpioistat); + tmp |= mask; + else + tmp &= ~mask; + writel(tmp, gpis); + local_irq_restore(flags); } -EXPORT_SYMBOL(rb532_gpio_set_int_status); -int rb532_gpio_get_int_status(unsigned gpio) +/* + * Get the GPIO interrupt status + */ +static int rb532_gpio_get_int_status(struct gpio_chip *chip, unsigned offset) { - return readl(&rb532_gpio_reg0->gpioistat) & (1 << gpio); -} -EXPORT_SYMBOL(rb532_gpio_get_int_status); + u32 mask = 1 << offset; + struct rb532_gpio_chip *gpch; -void rb532_gpio_set_func(unsigned gpio, int value) -{ - unsigned tmp; - - tmp = readl(&rb532_gpio_reg0->gpiofunc); - if (value) - tmp |= 1 << gpio; - writel(tmp, (void *)&rb532_gpio_reg0->gpiofunc); + gpch = container_of(chip, struct rb532_gpio_chip, chip); + return readl(gpch->regbase + GPIOISTAT) & mask; } -EXPORT_SYMBOL(rb532_gpio_set_func); -int rb532_gpio_get_func(unsigned gpio) -{ - return readl(&rb532_gpio_reg0->gpiofunc) & (1 << gpio); -} -EXPORT_SYMBOL(rb532_gpio_get_func); +static struct rb532_gpio_chip rb532_gpio_chip[] = { + [0] = { + .chip = { + .label = "gpio0", + .direction_input = rb532_gpio_direction_input, + .direction_output = rb532_gpio_direction_output, + .get = rb532_gpio_get, + .set = rb532_gpio_set, + .base = 0, + .ngpio = 32, + }, + .get_int_level = rb532_gpio_get_int_level, + .set_int_level = rb532_gpio_set_int_level, + .get_int_status = rb532_gpio_get_int_status, + .set_int_status = rb532_gpio_set_int_status, + }, +}; int __init rb532_gpio_init(void) { - rb532_gpio_reg0 = ioremap_nocache(rb532_gpio_reg0_res[0].start, - rb532_gpio_reg0_res[0].end - - rb532_gpio_reg0_res[0].start); + struct resource *r; - if (!rb532_gpio_reg0) { + r = rb532_gpio_reg0_res; + rb532_gpio_chip->regbase = ioremap_nocache(r->start, r->end - r->start); + + if (!rb532_gpio_chip->regbase) { printk(KERN_ERR "rb532: cannot remap GPIO register 0\n"); return -ENXIO; } - dev3.base = ioremap_nocache(rb532_dev3_ctl_res[0].start, - rb532_dev3_ctl_res[0].end - - rb532_dev3_ctl_res[0].start); + /* Register our GPIO chip */ + gpiochip_add(&rb532_gpio_chip->chip); + + r = rb532_dev3_ctl_res; + dev3.base = ioremap_nocache(r->start, r->end - r->start); if (!dev3.base) { printk(KERN_ERR "rb532: cannot remap device controller 3\n"); diff --git a/include/asm-mips/mach-rc32434/gpio.h b/include/asm-mips/mach-rc32434/gpio.h index 4fe18dbacaf7..3a70b41cd7a5 100644 --- a/include/asm-mips/mach-rc32434/gpio.h +++ b/include/asm-mips/mach-rc32434/gpio.h @@ -15,6 +15,16 @@ #include +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value + +#define gpio_cansleep __gpio_cansleep + +#define gpio_to_irq(gpio) IRQ_GPIO(gpio) +#define irq_to_gpio(irq) IRQ_TO_GPIO(irq) + +#include + struct rb532_gpio_reg { u32 gpiofunc; /* GPIO Function Register * gpiofunc[x]==0 bit = gpio @@ -62,74 +72,17 @@ struct rb532_gpio_reg { #define RC32434_PCI_MSU_GPIO (1 << 13) /* NAND GPIO signals */ -#define GPIO_RDY (1 << 0x08) -#define GPIO_WPX (1 << 0x09) -#define GPIO_ALE (1 << 0x0a) -#define GPIO_CLE (1 << 0x0b) +#define GPIO_RDY 8 +#define GPIO_WPX 9 +#define GPIO_ALE 10 +#define GPIO_CLE 11 /* Compact Flash GPIO pin */ #define CF_GPIO_NUM 13 - extern void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val); extern unsigned get_434_reg(unsigned reg_offs); extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask); extern unsigned char get_latch_u5(void); -extern int rb532_gpio_get_value(unsigned gpio); -extern void rb532_gpio_set_value(unsigned gpio, int value); -extern int rb532_gpio_direction_input(unsigned gpio); -extern int rb532_gpio_direction_output(unsigned gpio, int value); -extern void rb532_gpio_set_int_level(unsigned gpio, int value); -extern int rb532_gpio_get_int_level(unsigned gpio); -extern void rb532_gpio_set_int_status(unsigned gpio, int value); -extern int rb532_gpio_get_int_status(unsigned gpio); - - -/* Wrappers for the arch-neutral GPIO API */ - -static inline int gpio_request(unsigned gpio, const char *label) -{ - /* Not yet implemented */ - return 0; -} - -static inline void gpio_free(unsigned gpio) -{ - /* Not yet implemented */ -} - -static inline int gpio_direction_input(unsigned gpio) -{ - return rb532_gpio_direction_input(gpio); -} - -static inline int gpio_direction_output(unsigned gpio, int value) -{ - return rb532_gpio_direction_output(gpio, value); -} - -static inline int gpio_get_value(unsigned gpio) -{ - return rb532_gpio_get_value(gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - rb532_gpio_set_value(gpio, value); -} - -static inline int gpio_to_irq(unsigned gpio) -{ - return gpio; -} - -static inline int irq_to_gpio(unsigned irq) -{ - return irq; -} - -/* For cansleep */ -#include - #endif /* _RC32434_GPIO_H_ */ From 9bed90c6a46f10c2d3052c0585057a5cb7392b92 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Sat, 23 Aug 2008 18:54:37 +0200 Subject: [PATCH 26/49] Documentation: Document the RB532 specific kmac tag The Routerboard 532 bootloader passes the korina ethernet MAC adapter address to the kernel on the command line. Document this in the kernel-parameters file. Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- Documentation/kernel-parameters.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 329dcabe4c5e..d0fff6302f68 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1014,6 +1014,10 @@ and is between 256 and 4096 characters. It is defined in the file (only serial suported for now) Format: [,baud] + kmac= [MIPS] korina ethernet MAC address. + Configure the RouterBoard 532 series on-chip + Ethernet adapter MAC address. + l2cr= [PPC] l3cr= [PPC] From f6d9831bb11eb465f95fb1736b866d405d9c7cbf Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Mon, 1 Sep 2008 22:22:36 +0900 Subject: [PATCH 27/49] MIPS: TXx9: stop_unused_modules TXx9 SoCs have pin multiplex. Stop some controller modules which can not be used due to pin configurations. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup_tx4927.c | 31 +++++++++++++++ arch/mips/txx9/generic/setup_tx4938.c | 56 +++++++++++++++++++++++++++ 2 files changed, 87 insertions(+) diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index c4248cbbd84a..914e93c62639 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -252,3 +252,34 @@ void __init tx4927_mtd_init(int ch) return; /* disabled */ txx9_physmap_flash_init(ch, start, size, &pdata); } + +static void __init tx4927_stop_unused_modules(void) +{ + __u64 pcfg, rst = 0, ckd = 0; + char buf[128]; + + buf[0] = '\0'; + local_irq_disable(); + pcfg = ____raw_readq(&tx4927_ccfgptr->pcfg); + if (!(pcfg & TX4927_PCFG_SEL2)) { + rst |= TX4927_CLKCTR_ACLRST; + ckd |= TX4927_CLKCTR_ACLCKD; + strcat(buf, " ACLC"); + } + if (rst | ckd) { + txx9_set64(&tx4927_ccfgptr->clkctr, rst); + txx9_set64(&tx4927_ccfgptr->clkctr, ckd); + } + local_irq_enable(); + if (buf[0]) + pr_info("%s: stop%s\n", txx9_pcode_str, buf); +} + +static int __init tx4927_late_init(void) +{ + if (txx9_pcode != 0x4927) + return -ENODEV; + tx4927_stop_unused_modules(); + return 0; +} +late_initcall(tx4927_late_init); diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index 0d8517ad3ad0..af724e53ef91 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -334,3 +334,59 @@ void __init tx4938_mtd_init(int ch) return; /* disabled */ txx9_physmap_flash_init(ch, start, size, &pdata); } + +static void __init tx4938_stop_unused_modules(void) +{ + __u64 pcfg, rst = 0, ckd = 0; + char buf[128]; + + buf[0] = '\0'; + local_irq_disable(); + pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); + switch (txx9_pcode) { + case 0x4937: + if (!(pcfg & TX4938_PCFG_SEL2)) { + rst |= TX4938_CLKCTR_ACLRST; + ckd |= TX4938_CLKCTR_ACLCKD; + strcat(buf, " ACLC"); + } + break; + case 0x4938: + if (!(pcfg & TX4938_PCFG_SEL2) || + (pcfg & TX4938_PCFG_ETH0_SEL)) { + rst |= TX4938_CLKCTR_ACLRST; + ckd |= TX4938_CLKCTR_ACLCKD; + strcat(buf, " ACLC"); + } + if ((pcfg & + (TX4938_PCFG_ATA_SEL | TX4938_PCFG_ISA_SEL | + TX4938_PCFG_NDF_SEL)) + != TX4938_PCFG_NDF_SEL) { + rst |= TX4938_CLKCTR_NDFRST; + ckd |= TX4938_CLKCTR_NDFCKD; + strcat(buf, " NDFMC"); + } + if (!(pcfg & TX4938_PCFG_SPI_SEL)) { + rst |= TX4938_CLKCTR_SPIRST; + ckd |= TX4938_CLKCTR_SPICKD; + strcat(buf, " SPI"); + } + break; + } + if (rst | ckd) { + txx9_set64(&tx4938_ccfgptr->clkctr, rst); + txx9_set64(&tx4938_ccfgptr->clkctr, ckd); + } + local_irq_enable(); + if (buf[0]) + pr_info("%s: stop%s\n", txx9_pcode_str, buf); +} + +static int __init tx4938_late_init(void) +{ + if (txx9_pcode != 0x4937 && txx9_pcode != 0x4938) + return -ENODEV; + tx4938_stop_unused_modules(); + return 0; +} +late_initcall(tx4938_late_init); From 21e77df215e58523a755b5dd006cb17610616f20 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Mon, 1 Sep 2008 22:22:37 +0900 Subject: [PATCH 28/49] MIPS: TXx9: Microoptimize interrupt handlers The IOC interrupt status register on RBTX49XX only have 8 bits. Use 8-bit version of __fls() to optimize interrupt handlers. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/rbtx4927/irq.c | 6 +++--- arch/mips/txx9/rbtx4938/irq.c | 8 ++++---- include/asm-mips/txx9/generic.h | 18 ++++++++++++++++++ 3 files changed, 25 insertions(+), 7 deletions(-) diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index 22076e3f03a8..9c14ebb26cb4 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c @@ -133,9 +133,9 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq) u8 level3; level3 = readb(rbtx4927_imstat_addr) & 0x1f; - if (level3) - sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; - return sw_irq; + if (unlikely(!level3)) + return -1; + return RBTX4927_IRQ_IOC + __fls8(level3); } static void __init toshiba_rbtx4927_irq_ioc_init(void) diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c index ca2f8306ce93..7d21befb8932 100644 --- a/arch/mips/txx9/rbtx4938/irq.c +++ b/arch/mips/txx9/rbtx4938/irq.c @@ -85,10 +85,10 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq) u8 level3; level3 = readb(rbtx4938_imstat_addr); - if (level3) - /* must use fls so onboard ATA has priority */ - sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1; - return sw_irq; + if (unlikely(!level3)) + return -1; + /* must use fls so onboard ATA has priority */ + return RBTX4938_IRQ_IOC + __fls8(level3); } static void __init diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index 1e1a9f2d2379..dc85515eac13 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -64,4 +64,22 @@ struct physmap_flash_data; void txx9_physmap_flash_init(int no, unsigned long addr, unsigned long size, const struct physmap_flash_data *pdata); +/* 8 bit version of __fls(): find first bit set (returns 0..7) */ +static inline unsigned int __fls8(unsigned char x) +{ + int r = 7; + + if (!(x & 0xf0)) { + r -= 4; + x <<= 4; + } + if (!(x & 0xc0)) { + r -= 2; + x <<= 2; + } + if (!(x & 0x80)) + r -= 1; + return r; +} + #endif /* __ASM_TXX9_GENERIC_H */ From ae027ead87b13cff99b4f48da7696aa4fe75393b Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Mon, 1 Sep 2008 22:22:38 +0900 Subject: [PATCH 29/49] MIPS: TXx9: IOC LED support Add leds-gpio platform device for controlling LEDs connected to IOC on RBTX49XX and JMR3927 board. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup.c | 111 +++++++++++++++++++++++++++++++ arch/mips/txx9/jmr3927/setup.c | 5 ++ arch/mips/txx9/rbtx4927/setup.c | 1 + arch/mips/txx9/rbtx4938/setup.c | 1 + include/asm-mips/txx9/generic.h | 4 ++ include/asm-mips/txx9/rbtx4927.h | 1 + 6 files changed, 123 insertions(+) diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 118d716f7832..1ea06553a1e1 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -649,3 +650,113 @@ void __init txx9_physmap_flash_init(int no, unsigned long addr, platform_device_put(pdev); #endif } + +#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) +static DEFINE_SPINLOCK(txx9_iocled_lock); + +#define TXX9_IOCLED_MAXLEDS 8 + +struct txx9_iocled_data { + struct gpio_chip chip; + u8 cur_val; + void __iomem *mmioaddr; + struct gpio_led_platform_data pdata; + struct gpio_led leds[TXX9_IOCLED_MAXLEDS]; + char names[TXX9_IOCLED_MAXLEDS][32]; +}; + +static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset) +{ + struct txx9_iocled_data *data = + container_of(chip, struct txx9_iocled_data, chip); + return data->cur_val & (1 << offset); +} + +static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct txx9_iocled_data *data = + container_of(chip, struct txx9_iocled_data, chip); + unsigned long flags; + spin_lock_irqsave(&txx9_iocled_lock, flags); + if (value) + data->cur_val |= 1 << offset; + else + data->cur_val &= ~(1 << offset); + writeb(data->cur_val, data->mmioaddr); + mmiowb(); + spin_unlock_irqrestore(&txx9_iocled_lock, flags); +} + +static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset) +{ + return 0; +} + +static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset, + int value) +{ + txx9_iocled_set(chip, offset, value); + return 0; +} + +void __init txx9_iocled_init(unsigned long baseaddr, + int basenum, unsigned int num, int lowactive, + const char *color, char **deftriggers) +{ + struct txx9_iocled_data *iocled; + struct platform_device *pdev; + int i; + static char *default_triggers[] __initdata = { + "heartbeat", + "ide-disk", + "nand-disk", + NULL, + }; + + if (!deftriggers) + deftriggers = default_triggers; + iocled = kzalloc(sizeof(*iocled), GFP_KERNEL); + if (!iocled) + return; + iocled->mmioaddr = ioremap(baseaddr, 1); + if (!iocled->mmioaddr) + return; + iocled->chip.get = txx9_iocled_get; + iocled->chip.set = txx9_iocled_set; + iocled->chip.direction_input = txx9_iocled_dir_in; + iocled->chip.direction_output = txx9_iocled_dir_out; + iocled->chip.label = "iocled"; + iocled->chip.base = basenum; + iocled->chip.ngpio = num; + if (gpiochip_add(&iocled->chip)) + return; + if (basenum < 0) + basenum = iocled->chip.base; + + pdev = platform_device_alloc("leds-gpio", basenum); + if (!pdev) + return; + iocled->pdata.num_leds = num; + iocled->pdata.leds = iocled->leds; + for (i = 0; i < num; i++) { + struct gpio_led *led = &iocled->leds[i]; + snprintf(iocled->names[i], sizeof(iocled->names[i]), + "iocled:%s:%u", color, i); + led->name = iocled->names[i]; + led->gpio = basenum + i; + led->active_low = lowactive; + if (deftriggers && *deftriggers) + led->default_trigger = *deftriggers++; + } + pdev->dev.platform_data = &iocled->pdata; + if (platform_device_add(pdev)) + platform_device_put(pdev); +} +#else /* CONFIG_LEDS_GPIO */ +void __init txx9_iocled_init(unsigned long baseaddr, + int basenum, unsigned int num, int lowactive, + const char *color, char **deftriggers) +{ +} +#endif /* CONFIG_LEDS_GPIO */ diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c index 0f3843c92cf7..25e50a7be387 100644 --- a/arch/mips/txx9/jmr3927/setup.c +++ b/arch/mips/txx9/jmr3927/setup.c @@ -200,10 +200,15 @@ static void __init jmr3927_mtd_init(void) static void __init jmr3927_device_init(void) { + unsigned long iocled_base = JMR3927_IOC_LED_ADDR - IO_BASE; +#ifdef __LITTLE_ENDIAN + iocled_base |= 1; +#endif __swizzle_addr_b = jmr3927_swizzle_addr_b; jmr3927_rtc_init(); tx3927_wdt_init(); jmr3927_mtd_init(); + txx9_iocled_init(iocled_base, -1, 8, 1, "green", NULL); } struct txx9_board_vec jmr3927_vec __initdata = { diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c index abe32c1a79dc..4a74423b2ba8 100644 --- a/arch/mips/txx9/rbtx4927/setup.c +++ b/arch/mips/txx9/rbtx4927/setup.c @@ -321,6 +321,7 @@ static void __init rbtx4927_device_init(void) rbtx4927_ne_init(); tx4927_wdt_init(); rbtx4927_mtd_init(); + txx9_iocled_init(RBTX4927_LED_ADDR - IO_BASE, -1, 3, 1, "green", NULL); } struct txx9_board_vec rbtx4927_vec __initdata = { diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index ec6e81258f73..e077cc4d3a59 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c @@ -352,6 +352,7 @@ static void __init rbtx4938_device_init(void) rbtx4938_ne_init(); tx4938_wdt_init(); rbtx4938_mtd_init(); + txx9_iocled_init(RBTX4938_LED_ADDR - IO_BASE, -1, 8, 1, "green", NULL); } struct txx9_board_vec rbtx4938_vec __initdata = { diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index dc85515eac13..4316a3e57678 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -82,4 +82,8 @@ static inline unsigned int __fls8(unsigned char x) return r; } +void txx9_iocled_init(unsigned long baseaddr, + int basenum, unsigned int num, int lowactive, + const char *color, char **deftriggers); + #endif /* __ASM_TXX9_GENERIC_H */ diff --git a/include/asm-mips/txx9/rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h index c6015463432e..b2adab3d1acc 100644 --- a/include/asm-mips/txx9/rbtx4927.h +++ b/include/asm-mips/txx9/rbtx4927.h @@ -34,6 +34,7 @@ #define RBTX4927_PCIIO 0x16000000 #define RBTX4927_PCIIO_SIZE 0x01000000 +#define RBTX4927_LED_ADDR (IO_BASE + TXX9_CE(2) + 0x00001000) #define RBTX4927_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000) #define RBTX4927_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006) #define RBTX4927_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000) From 0dcdbe6add26719e956299eb519542f7d2f7d0a8 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Mon, 1 Sep 2008 22:22:39 +0900 Subject: [PATCH 30/49] MIPS: TXx9: Add TX4939 SoC support Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle create mode 100644 arch/mips/pci/pci-tx4939.c create mode 100644 arch/mips/txx9/generic/irq_tx4939.c create mode 100644 arch/mips/txx9/generic/setup_tx4939.c create mode 100644 include/asm-mips/txx9/tx4939.h --- arch/mips/pci/Makefile | 1 + arch/mips/pci/pci-tx4939.c | 109 ++++++ arch/mips/txx9/Kconfig | 7 + arch/mips/txx9/generic/Makefile | 1 + arch/mips/txx9/generic/irq_tx4939.c | 215 ++++++++++ arch/mips/txx9/generic/setup_tx4939.c | 460 ++++++++++++++++++++++ include/asm-mips/txx9/tx4939.h | 544 ++++++++++++++++++++++++++ 7 files changed, 1337 insertions(+) create mode 100644 arch/mips/pci/pci-tx4939.c create mode 100644 arch/mips/txx9/generic/irq_tx4939.c create mode 100644 arch/mips/txx9/generic/setup_tx4939.c create mode 100644 include/asm-mips/txx9/tx4939.h diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index c8c32f417b6c..b1886244cedf 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -45,6 +45,7 @@ obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o +obj-$(CONFIG_SOC_TX4939) += pci-tx4939.o obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o diff --git a/arch/mips/pci/pci-tx4939.c b/arch/mips/pci/pci-tx4939.c new file mode 100644 index 000000000000..5fecf1cdc325 --- /dev/null +++ b/arch/mips/pci/pci-tx4939.c @@ -0,0 +1,109 @@ +/* + * linux/arch/mips/pci/pci-tx4939.c + * + * Based on linux/arch/mips/txx9/rbtx4939/setup.c, + * and RBTX49xx patch from CELF patch archive. + * + * Copyright 2001, 2003-2005 MontaVista Software Inc. + * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) + * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include + +int __init tx4939_report_pciclk(void) +{ + int pciclk = 0; + + pr_info("PCIC --%s PCICLK:", + (__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66) ? + " PCI66" : ""); + if (__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_PCICLKEN_ALL) { + pciclk = txx9_master_clock * 20 / 6; + if (!(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66)) + pciclk /= 2; + printk(KERN_CONT "Internal(%u.%uMHz)", + (pciclk + 50000) / 1000000, + ((pciclk + 50000) / 100000) % 10); + } else { + printk(KERN_CONT "External"); + pciclk = -1; + } + printk(KERN_CONT "\n"); + return pciclk; +} + +void __init tx4939_report_pci1clk(void) +{ + unsigned int pciclk = txx9_master_clock * 20 / 6; + + pr_info("PCIC1 -- PCICLK:%u.%uMHz\n", + (pciclk + 50000) / 1000000, + ((pciclk + 50000) / 100000) % 10); +} + +int __init tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot) +{ + if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4939_pcic1ptr) { + switch (slot) { + case TX4927_PCIC_IDSEL_AD_TO_SLOT(31): + if (__raw_readq(&tx4939_ccfgptr->pcfg) & + TX4939_PCFG_ET0MODE) + return TXX9_IRQ_BASE + TX4939_IR_ETH(0); + break; + case TX4927_PCIC_IDSEL_AD_TO_SLOT(30): + if (__raw_readq(&tx4939_ccfgptr->pcfg) & + TX4939_PCFG_ET1MODE) + return TXX9_IRQ_BASE + TX4939_IR_ETH(1); + break; + } + return 0; + } + return -1; +} + +int __init tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) +{ + int irq = tx4939_pcic1_map_irq(dev, slot); + + if (irq >= 0) + return irq; + irq = pin; + /* IRQ rotation */ + irq--; /* 0-3 */ + irq = (irq + 33 - slot) % 4; + irq++; /* 1-4 */ + + switch (irq) { + case 1: + irq = TXX9_IRQ_BASE + TX4939_IR_INTA; + break; + case 2: + irq = TXX9_IRQ_BASE + TX4939_IR_INTB; + break; + case 3: + irq = TXX9_IRQ_BASE + TX4939_IR_INTC; + break; + case 4: + irq = TXX9_IRQ_BASE + TX4939_IR_INTD; + break; + } + return irq; +} + +void __init tx4939_setup_pcierr_irq(void) +{ + if (request_irq(TXX9_IRQ_BASE + TX4939_IR_PCIERR, + tx4927_pcierr_interrupt, + IRQF_DISABLED, "PCI error", + (void *)TX4939_PCIC_REG)) + pr_warning("Failed to request irq for PCIERR\n"); +} diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index aade3348af29..58691a1fe779 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig @@ -71,6 +71,13 @@ config SOC_TX4938 select PCI_TX4927 select GPIO_TXX9 +config SOC_TX4939 + bool + select CEVT_TXX9 + select HAS_TXX9_SERIAL + select HW_HAS_PCI + select PCI_TX4927 + config TOSHIBA_FPCIB0 bool "FPCIB0 Backplane Support" depends on PCI && MACH_TXX9 diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile index 986852cc774c..0030d23bef5b 100644 --- a/arch/mips/txx9/generic/Makefile +++ b/arch/mips/txx9/generic/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_SOC_TX3927) += setup_tx3927.o irq_tx3927.o obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o setup_tx4927.o irq_tx4927.o obj-$(CONFIG_SOC_TX4938) += mem_tx4927.o setup_tx4938.o irq_tx4938.o +obj-$(CONFIG_SOC_TX4939) += setup_tx4939.o irq_tx4939.o obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o obj-$(CONFIG_SPI) += spi_eeprom.o diff --git a/arch/mips/txx9/generic/irq_tx4939.c b/arch/mips/txx9/generic/irq_tx4939.c new file mode 100644 index 000000000000..013213a8706b --- /dev/null +++ b/arch/mips/txx9/generic/irq_tx4939.c @@ -0,0 +1,215 @@ +/* + * TX4939 irq routines + * Based on linux/arch/mips/kernel/irq_txx9.c, + * and RBTX49xx patch from CELF patch archive. + * + * Copyright 2001, 2003-2005 MontaVista Software Inc. + * Author: MontaVista Software, Inc. + * ahennessy@mvista.com + * source@mvista.com + * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +/* + * TX4939 defines 64 IRQs. + * Similer to irq_txx9.c but different register layouts. + */ +#include +#include +#include +#include +#include +#include + +/* IRCER : Int. Control Enable */ +#define TXx9_IRCER_ICE 0x00000001 + +/* IRCR : Int. Control */ +#define TXx9_IRCR_LOW 0x00000000 +#define TXx9_IRCR_HIGH 0x00000001 +#define TXx9_IRCR_DOWN 0x00000002 +#define TXx9_IRCR_UP 0x00000003 +#define TXx9_IRCR_EDGE(cr) ((cr) & 0x00000002) + +/* IRSCR : Int. Status Control */ +#define TXx9_IRSCR_EIClrE 0x00000100 +#define TXx9_IRSCR_EIClr_MASK 0x0000000f + +/* IRCSR : Int. Current Status */ +#define TXx9_IRCSR_IF 0x00010000 + +#define irc_dlevel 0 +#define irc_elevel 1 + +static struct { + unsigned char level; + unsigned char mode; +} tx4939irq[TX4939_NUM_IR] __read_mostly; + +static void tx4939_irq_unmask(unsigned int irq) +{ + unsigned int irq_nr = irq - TXX9_IRQ_BASE; + u32 __iomem *lvlp; + int ofs; + if (irq_nr < 32) { + irq_nr--; + lvlp = &tx4939_ircptr->lvl[(irq_nr % 16) / 2].r; + } else { + irq_nr -= 32; + lvlp = &tx4939_ircptr->lvl[8 + (irq_nr % 16) / 2].r; + } + ofs = (irq_nr & 16) + (irq_nr & 1) * 8; + __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs)) + | (tx4939irq[irq_nr].level << ofs), + lvlp); +} + +static inline void tx4939_irq_mask(unsigned int irq) +{ + unsigned int irq_nr = irq - TXX9_IRQ_BASE; + u32 __iomem *lvlp; + int ofs; + if (irq_nr < 32) { + irq_nr--; + lvlp = &tx4939_ircptr->lvl[(irq_nr % 16) / 2].r; + } else { + irq_nr -= 32; + lvlp = &tx4939_ircptr->lvl[8 + (irq_nr % 16) / 2].r; + } + ofs = (irq_nr & 16) + (irq_nr & 1) * 8; + __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs)) + | (irc_dlevel << ofs), + lvlp); + mmiowb(); +} + +static void tx4939_irq_mask_ack(unsigned int irq) +{ + unsigned int irq_nr = irq - TXX9_IRQ_BASE; + + tx4939_irq_mask(irq); + if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) { + irq_nr--; + /* clear edge detection */ + __raw_writel((TXx9_IRSCR_EIClrE | (irq_nr & 0xf)) + << (irq_nr & 0x10), + &tx4939_ircptr->edc.r); + } +} + +static int tx4939_irq_set_type(unsigned int irq, unsigned int flow_type) +{ + unsigned int irq_nr = irq - TXX9_IRQ_BASE; + u32 cr; + u32 __iomem *crp; + int ofs; + int mode; + + if (flow_type & IRQF_TRIGGER_PROBE) + return 0; + switch (flow_type & IRQF_TRIGGER_MASK) { + case IRQF_TRIGGER_RISING: + mode = TXx9_IRCR_UP; + break; + case IRQF_TRIGGER_FALLING: + mode = TXx9_IRCR_DOWN; + break; + case IRQF_TRIGGER_HIGH: + mode = TXx9_IRCR_HIGH; + break; + case IRQF_TRIGGER_LOW: + mode = TXx9_IRCR_LOW; + break; + default: + return -EINVAL; + } + if (irq_nr < 32) { + irq_nr--; + crp = &tx4939_ircptr->dm[(irq_nr & 8) >> 3].r; + } else { + irq_nr -= 32; + crp = &tx4939_ircptr->dm2[((irq_nr & 8) >> 3)].r; + } + ofs = (((irq_nr & 16) >> 1) | (irq_nr & (8 - 1))) * 2; + cr = __raw_readl(crp); + cr &= ~(0x3 << ofs); + cr |= (mode & 0x3) << ofs; + __raw_writel(cr, crp); + tx4939irq[irq_nr].mode = mode; + return 0; +} + +static struct irq_chip tx4939_irq_chip = { + .name = "TX4939", + .ack = tx4939_irq_mask_ack, + .mask = tx4939_irq_mask, + .mask_ack = tx4939_irq_mask_ack, + .unmask = tx4939_irq_unmask, + .set_type = tx4939_irq_set_type, +}; + +static int tx4939_irq_set_pri(int irc_irq, int new_pri) +{ + int old_pri; + + if ((unsigned int)irc_irq >= TX4939_NUM_IR) + return 0; + old_pri = tx4939irq[irc_irq].level; + tx4939irq[irc_irq].level = new_pri; + return old_pri; +} + +void __init tx4939_irq_init(void) +{ + int i; + + mips_cpu_irq_init(); + /* disable interrupt control */ + __raw_writel(0, &tx4939_ircptr->den.r); + __raw_writel(0, &tx4939_ircptr->maskint.r); + __raw_writel(0, &tx4939_ircptr->maskext.r); + /* irq_base + 0 is not used */ + for (i = 1; i < TX4939_NUM_IR; i++) { + tx4939irq[i].level = 4; /* middle level */ + tx4939irq[i].mode = TXx9_IRCR_LOW; + set_irq_chip_and_handler(TXX9_IRQ_BASE + i, + &tx4939_irq_chip, handle_level_irq); + } + + /* mask all IRC interrupts */ + __raw_writel(0, &tx4939_ircptr->msk.r); + for (i = 0; i < 16; i++) + __raw_writel(0, &tx4939_ircptr->lvl[i].r); + /* setup IRC interrupt mode (Low Active) */ + for (i = 0; i < 2; i++) + __raw_writel(0, &tx4939_ircptr->dm[i].r); + for (i = 0; i < 2; i++) + __raw_writel(0, &tx4939_ircptr->dm2[i].r); + /* enable interrupt control */ + __raw_writel(TXx9_IRCER_ICE, &tx4939_ircptr->den.r); + __raw_writel(irc_elevel, &tx4939_ircptr->msk.r); + + set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4939_IRC_INT, + handle_simple_irq); + + /* raise priority for errors, timers, sio */ + tx4939_irq_set_pri(TX4939_IR_WTOERR, 7); + tx4939_irq_set_pri(TX4939_IR_PCIERR, 7); + tx4939_irq_set_pri(TX4939_IR_PCIPME, 7); + for (i = 0; i < TX4939_NUM_IR_TMR; i++) + tx4939_irq_set_pri(TX4939_IR_TMR(i), 6); + for (i = 0; i < TX4939_NUM_IR_SIO; i++) + tx4939_irq_set_pri(TX4939_IR_SIO(i), 5); +} + +int tx4939_irq(void) +{ + u32 csr = __raw_readl(&tx4939_ircptr->cs.r); + + if (likely(!(csr & TXx9_IRCSR_IF))) + return TXX9_IRQ_BASE + (csr & (TX4939_NUM_IR - 1)); + return -1; +} diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c new file mode 100644 index 000000000000..f14a497077da --- /dev/null +++ b/arch/mips/txx9/generic/setup_tx4939.c @@ -0,0 +1,460 @@ +/* + * TX4939 setup routines + * Based on linux/arch/mips/txx9/generic/setup_tx4938.c, + * and RBTX49xx patch from CELF patch archive. + * + * 2003-2005 (c) MontaVista Software, Inc. + * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void __init tx4939_wdr_init(void) +{ + /* report watchdog reset status */ + if (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDRST) + pr_warning("Watchdog reset detected at 0x%lx\n", + read_c0_errorepc()); + /* clear WatchDogReset (W1C) */ + tx4939_ccfg_set(TX4939_CCFG_WDRST); + /* do reset on watchdog */ + tx4939_ccfg_set(TX4939_CCFG_WR); +} + +void __init tx4939_wdt_init(void) +{ + txx9_wdt_init(TX4939_TMR_REG(2) & 0xfffffffffULL); +} + +static void tx4939_machine_restart(char *command) +{ + local_irq_disable(); + pr_emerg("Rebooting (with %s watchdog reset)...\n", + (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDREXEN) ? + "external" : "internal"); + /* clear watchdog status */ + tx4939_ccfg_set(TX4939_CCFG_WDRST); /* W1C */ + txx9_wdt_now(TX4939_TMR_REG(2) & 0xfffffffffULL); + while (!(____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDRST)) + ; + mdelay(10); + if (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDREXEN) { + pr_emerg("Rebooting (with internal watchdog reset)...\n"); + /* External WDRST failed. Do internal watchdog reset */ + tx4939_ccfg_clear(TX4939_CCFG_WDREXEN); + } + /* fallback */ + (*_machine_halt)(); +} + +void show_registers(struct pt_regs *regs); +static int tx4939_be_handler(struct pt_regs *regs, int is_fixup) +{ + int data = regs->cp0_cause & 4; + console_verbose(); + pr_err("%cBE exception at %#lx\n", + data ? 'D' : 'I', regs->cp0_epc); + pr_err("ccfg:%llx, toea:%llx\n", + (unsigned long long)____raw_readq(&tx4939_ccfgptr->ccfg), + (unsigned long long)____raw_readq(&tx4939_ccfgptr->toea)); +#ifdef CONFIG_PCI + tx4927_report_pcic_status(); +#endif + show_registers(regs); + panic("BusError!"); +} +static void __init tx4939_be_init(void) +{ + board_be_handler = tx4939_be_handler; +} + +static struct resource tx4939_sdram_resource[4]; +static struct resource tx4939_sram_resource; +#define TX4939_SRAM_SIZE 0x800 + +void __init tx4939_add_memory_regions(void) +{ + int i; + unsigned long start, size; + u64 win; + + for (i = 0; i < 4; i++) { + if (!((__u32)____raw_readq(&tx4939_ddrcptr->winen) & (1 << i))) + continue; + win = ____raw_readq(&tx4939_ddrcptr->win[i]); + start = (unsigned long)(win >> 48); + size = (((unsigned long)(win >> 32) & 0xffff) + 1) - start; + add_memory_region(start << 20, size << 20, BOOT_MEM_RAM); + } +} + +void __init tx4939_setup(void) +{ + int i; + __u32 divmode; + __u64 pcfg; + int cpuclk = 0; + + txx9_reg_res_init(TX4939_REV_PCODE(), TX4939_REG_BASE, + TX4939_REG_SIZE); + set_c0_config(TX49_CONF_CWFON); + + /* SDRAMC,EBUSC are configured by PROM */ + for (i = 0; i < 4; i++) { + if (!(TX4939_EBUSC_CR(i) & 0x8)) + continue; /* disabled */ + txx9_ce_res[i].start = (unsigned long)TX4939_EBUSC_BA(i); + txx9_ce_res[i].end = + txx9_ce_res[i].start + TX4939_EBUSC_SIZE(i) - 1; + request_resource(&iomem_resource, &txx9_ce_res[i]); + } + + /* clocks */ + if (txx9_master_clock) { + /* calculate cpu_clock from master_clock */ + divmode = (__u32)____raw_readq(&tx4939_ccfgptr->ccfg) & + TX4939_CCFG_MULCLK_MASK; + cpuclk = txx9_master_clock * 20 / 2; + switch (divmode) { + case TX4939_CCFG_MULCLK_8: + cpuclk = cpuclk / 3 * 4 /* / 6 * 8 */; break; + case TX4939_CCFG_MULCLK_9: + cpuclk = cpuclk / 2 * 3 /* / 6 * 9 */; break; + case TX4939_CCFG_MULCLK_10: + cpuclk = cpuclk / 3 * 5 /* / 6 * 10 */; break; + case TX4939_CCFG_MULCLK_11: + cpuclk = cpuclk / 6 * 11; break; + case TX4939_CCFG_MULCLK_12: + cpuclk = cpuclk * 2 /* / 6 * 12 */; break; + case TX4939_CCFG_MULCLK_13: + cpuclk = cpuclk / 6 * 13; break; + case TX4939_CCFG_MULCLK_14: + cpuclk = cpuclk / 3 * 7 /* / 6 * 14 */; break; + case TX4939_CCFG_MULCLK_15: + cpuclk = cpuclk / 2 * 5 /* / 6 * 15 */; break; + } + txx9_cpu_clock = cpuclk; + } else { + if (txx9_cpu_clock == 0) + txx9_cpu_clock = 400000000; /* 400MHz */ + /* calculate master_clock from cpu_clock */ + cpuclk = txx9_cpu_clock; + divmode = (__u32)____raw_readq(&tx4939_ccfgptr->ccfg) & + TX4939_CCFG_MULCLK_MASK; + switch (divmode) { + case TX4939_CCFG_MULCLK_8: + txx9_master_clock = cpuclk * 6 / 8; break; + case TX4939_CCFG_MULCLK_9: + txx9_master_clock = cpuclk * 6 / 9; break; + case TX4939_CCFG_MULCLK_10: + txx9_master_clock = cpuclk * 6 / 10; break; + case TX4939_CCFG_MULCLK_11: + txx9_master_clock = cpuclk * 6 / 11; break; + case TX4939_CCFG_MULCLK_12: + txx9_master_clock = cpuclk * 6 / 12; break; + case TX4939_CCFG_MULCLK_13: + txx9_master_clock = cpuclk * 6 / 13; break; + case TX4939_CCFG_MULCLK_14: + txx9_master_clock = cpuclk * 6 / 14; break; + case TX4939_CCFG_MULCLK_15: + txx9_master_clock = cpuclk * 6 / 15; break; + } + txx9_master_clock /= 10; /* * 2 / 20 */ + } + /* calculate gbus_clock from cpu_clock */ + divmode = (__u32)____raw_readq(&tx4939_ccfgptr->ccfg) & + TX4939_CCFG_YDIVMODE_MASK; + txx9_gbus_clock = txx9_cpu_clock; + switch (divmode) { + case TX4939_CCFG_YDIVMODE_2: + txx9_gbus_clock /= 2; break; + case TX4939_CCFG_YDIVMODE_3: + txx9_gbus_clock /= 3; break; + case TX4939_CCFG_YDIVMODE_5: + txx9_gbus_clock /= 5; break; + case TX4939_CCFG_YDIVMODE_6: + txx9_gbus_clock /= 6; break; + } + /* change default value to udelay/mdelay take reasonable time */ + loops_per_jiffy = txx9_cpu_clock / HZ / 2; + + /* CCFG */ + tx4939_wdr_init(); + /* clear BusErrorOnWrite flag (W1C) */ + tx4939_ccfg_set(TX4939_CCFG_WDRST | TX4939_CCFG_BEOW); + /* enable Timeout BusError */ + if (txx9_ccfg_toeon) + tx4939_ccfg_set(TX4939_CCFG_TOE); + + /* DMA selection */ + txx9_clear64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_DMASEL_ALL); + + /* Use external clock for external arbiter */ + if (!(____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB)) + txx9_clear64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_PCICLKEN_ALL); + + pr_info("%s -- %dMHz(M%dMHz,G%dMHz) CRIR:%08x CCFG:%llx PCFG:%llx\n", + txx9_pcode_str, + (cpuclk + 500000) / 1000000, + (txx9_master_clock + 500000) / 1000000, + (txx9_gbus_clock + 500000) / 1000000, + (__u32)____raw_readq(&tx4939_ccfgptr->crir), + (unsigned long long)____raw_readq(&tx4939_ccfgptr->ccfg), + (unsigned long long)____raw_readq(&tx4939_ccfgptr->pcfg)); + + pr_info("%s DDRC -- EN:%08x", txx9_pcode_str, + (__u32)____raw_readq(&tx4939_ddrcptr->winen)); + for (i = 0; i < 4; i++) { + __u64 win = ____raw_readq(&tx4939_ddrcptr->win[i]); + if (!((__u32)____raw_readq(&tx4939_ddrcptr->winen) & (1 << i))) + continue; /* disabled */ + printk(KERN_CONT " #%d:%016llx", i, (unsigned long long)win); + tx4939_sdram_resource[i].name = "DDR SDRAM"; + tx4939_sdram_resource[i].start = + (unsigned long)(win >> 48) << 20; + tx4939_sdram_resource[i].end = + ((((unsigned long)(win >> 32) & 0xffff) + 1) << + 20) - 1; + tx4939_sdram_resource[i].flags = IORESOURCE_MEM; + request_resource(&iomem_resource, &tx4939_sdram_resource[i]); + } + printk(KERN_CONT "\n"); + + /* SRAM */ + if (____raw_readq(&tx4939_sramcptr->cr) & 1) { + unsigned int size = TX4939_SRAM_SIZE; + tx4939_sram_resource.name = "SRAM"; + tx4939_sram_resource.start = + (____raw_readq(&tx4939_sramcptr->cr) >> (39-11)) + & ~(size - 1); + tx4939_sram_resource.end = + tx4939_sram_resource.start + TX4939_SRAM_SIZE - 1; + tx4939_sram_resource.flags = IORESOURCE_MEM; + request_resource(&iomem_resource, &tx4939_sram_resource); + } + + /* TMR */ + /* disable all timers */ + for (i = 0; i < TX4939_NR_TMR; i++) + txx9_tmr_init(TX4939_TMR_REG(i) & 0xfffffffffULL); + + /* DMA */ + for (i = 0; i < 2; i++) + ____raw_writeq(TX4938_DMA_MCR_MSTEN, + (void __iomem *)(TX4939_DMA_REG(i) + 0x50)); + + /* set PCIC1 reset (required to prevent hangup on BIST) */ + txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_PCI1RST); + pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg); + if (pcfg & (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE)) { + mdelay(1); /* at least 128 cpu clock */ + /* clear PCIC1 reset */ + txx9_clear64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_PCI1RST); + } else { + pr_info("%s: stop PCIC1\n", txx9_pcode_str); + /* stop PCIC1 */ + txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_PCI1CKD); + } + if (!(pcfg & TX4939_PCFG_ET0MODE)) { + pr_info("%s: stop ETH0\n", txx9_pcode_str); + txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH0RST); + txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH0CKD); + } + if (!(pcfg & TX4939_PCFG_ET1MODE)) { + pr_info("%s: stop ETH1\n", txx9_pcode_str); + txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH1RST); + txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH1CKD); + } + + _machine_restart = tx4939_machine_restart; + board_be_init = tx4939_be_init; +} + +void __init tx4939_time_init(unsigned int tmrnr) +{ + if (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_TINTDIS) + txx9_clockevent_init(TX4939_TMR_REG(tmrnr) & 0xfffffffffULL, + TXX9_IRQ_BASE + TX4939_IR_TMR(tmrnr), + TXX9_IMCLK); +} + +void __init tx4939_sio_init(unsigned int sclk, unsigned int cts_mask) +{ + int i; + unsigned int ch_mask = 0; + __u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg); + + cts_mask |= ~1; /* only SIO0 have RTS/CTS */ + if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO0) + cts_mask |= 1 << 0; /* disable SIO0 RTS/CTS by PCFG setting */ + if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO2) + ch_mask |= 1 << 2; /* disable SIO2 by PCFG setting */ + if (pcfg & TX4939_PCFG_SIO3MODE) + ch_mask |= 1 << 3; /* disable SIO3 by PCFG setting */ + for (i = 0; i < 4; i++) { + if ((1 << i) & ch_mask) + continue; + txx9_sio_init(TX4939_SIO_REG(i) & 0xfffffffffULL, + TXX9_IRQ_BASE + TX4939_IR_SIO(i), + i, sclk, (1 << i) & cts_mask); + } +} + +#if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE) +static int tx4939_get_eth_speed(struct net_device *dev) +{ + struct ethtool_cmd cmd = { ETHTOOL_GSET }; + int speed = 100; /* default 100Mbps */ + int err; + if (!dev->ethtool_ops || !dev->ethtool_ops->get_settings) + return speed; + err = dev->ethtool_ops->get_settings(dev, &cmd); + if (err < 0) + return speed; + speed = cmd.speed == SPEED_100 ? 100 : 10; + return speed; +} +static int tx4939_netdev_event(struct notifier_block *this, + unsigned long event, + void *ptr) +{ + struct net_device *dev = ptr; + if (event == NETDEV_CHANGE && netif_carrier_ok(dev)) { + __u64 bit = 0; + if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(0)) + bit = TX4939_PCFG_SPEED0; + else if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(1)) + bit = TX4939_PCFG_SPEED1; + if (bit) { + int speed = tx4939_get_eth_speed(dev); + if (speed == 100) + txx9_set64(&tx4939_ccfgptr->pcfg, bit); + else + txx9_clear64(&tx4939_ccfgptr->pcfg, bit); + } + } + return NOTIFY_DONE; +} + +static struct notifier_block tx4939_netdev_notifier = { + .notifier_call = tx4939_netdev_event, + .priority = 1, +}; + +void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1) +{ + u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg); + + if (addr0 && (pcfg & TX4939_PCFG_ET0MODE)) + txx9_ethaddr_init(TXX9_IRQ_BASE + TX4939_IR_ETH(0), addr0); + if (addr1 && (pcfg & TX4939_PCFG_ET1MODE)) + txx9_ethaddr_init(TXX9_IRQ_BASE + TX4939_IR_ETH(1), addr1); + register_netdevice_notifier(&tx4939_netdev_notifier); +} +#else +void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1) +{ +} +#endif + +void __init tx4939_mtd_init(int ch) +{ + struct physmap_flash_data pdata = { + .width = TX4939_EBUSC_WIDTH(ch) / 8, + }; + unsigned long start = txx9_ce_res[ch].start; + unsigned long size = txx9_ce_res[ch].end - start + 1; + + if (!(TX4939_EBUSC_CR(ch) & 0x8)) + return; /* disabled */ + txx9_physmap_flash_init(ch, start, size, &pdata); +} + +static void __init tx4939_stop_unused_modules(void) +{ + __u64 pcfg, rst = 0, ckd = 0; + char buf[128]; + + buf[0] = '\0'; + local_irq_disable(); + pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg); + if ((pcfg & TX4939_PCFG_I2SMODE_MASK) != + TX4939_PCFG_I2SMODE_ACLC) { + rst |= TX4939_CLKCTR_ACLRST; + ckd |= TX4939_CLKCTR_ACLCKD; + strcat(buf, " ACLC"); + } + if ((pcfg & TX4939_PCFG_I2SMODE_MASK) != + TX4939_PCFG_I2SMODE_I2S && + (pcfg & TX4939_PCFG_I2SMODE_MASK) != + TX4939_PCFG_I2SMODE_I2S_ALT) { + rst |= TX4939_CLKCTR_I2SRST; + ckd |= TX4939_CLKCTR_I2SCKD; + strcat(buf, " I2S"); + } + if (!(pcfg & TX4939_PCFG_ATA0MODE)) { + rst |= TX4939_CLKCTR_ATA0RST; + ckd |= TX4939_CLKCTR_ATA0CKD; + strcat(buf, " ATA0"); + } + if (!(pcfg & TX4939_PCFG_ATA1MODE)) { + rst |= TX4939_CLKCTR_ATA1RST; + ckd |= TX4939_CLKCTR_ATA1CKD; + strcat(buf, " ATA1"); + } + if (pcfg & TX4939_PCFG_SPIMODE) { + rst |= TX4939_CLKCTR_SPIRST; + ckd |= TX4939_CLKCTR_SPICKD; + strcat(buf, " SPI"); + } + if (!(pcfg & (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE))) { + rst |= TX4939_CLKCTR_VPCRST; + ckd |= TX4939_CLKCTR_VPCCKD; + strcat(buf, " VPC"); + } + if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO2) { + rst |= TX4939_CLKCTR_SIO2RST; + ckd |= TX4939_CLKCTR_SIO2CKD; + strcat(buf, " SIO2"); + } + if (pcfg & TX4939_PCFG_SIO3MODE) { + rst |= TX4939_CLKCTR_SIO3RST; + ckd |= TX4939_CLKCTR_SIO3CKD; + strcat(buf, " SIO3"); + } + if (rst | ckd) { + txx9_set64(&tx4939_ccfgptr->clkctr, rst); + txx9_set64(&tx4939_ccfgptr->clkctr, ckd); + } + local_irq_enable(); + if (buf[0]) + pr_info("%s: stop%s\n", txx9_pcode_str, buf); +} + +static int __init tx4939_late_init(void) +{ + if (txx9_pcode != 0x4939) + return -ENODEV; + tx4939_stop_unused_modules(); + return 0; +} +late_initcall(tx4939_late_init); diff --git a/include/asm-mips/txx9/tx4939.h b/include/asm-mips/txx9/tx4939.h new file mode 100644 index 000000000000..7ce2dff3b7cc --- /dev/null +++ b/include/asm-mips/txx9/tx4939.h @@ -0,0 +1,544 @@ +/* + * Definitions for TX4939 + * + * Copyright (C) 2000-2001,2005-2006 Toshiba Corporation + * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __ASM_TXX9_TX4939_H +#define __ASM_TXX9_TX4939_H + +/* some controllers are compatible with 4927/4938 */ +#include + +#ifdef CONFIG_64BIT +#define TX4939_REG_BASE 0xffffffffff1f0000UL /* == TX4938_REG_BASE */ +#else +#define TX4939_REG_BASE 0xff1f0000UL /* == TX4938_REG_BASE */ +#endif +#define TX4939_REG_SIZE 0x00010000 /* == TX4938_REG_SIZE */ + +#define TX4939_ATA_REG(ch) (TX4939_REG_BASE + 0x3000 + (ch) * 0x1000) +#define TX4939_NDFMC_REG (TX4939_REG_BASE + 0x5000) +#define TX4939_SRAMC_REG (TX4939_REG_BASE + 0x6000) +#define TX4939_CRYPTO_REG (TX4939_REG_BASE + 0x6800) +#define TX4939_PCIC1_REG (TX4939_REG_BASE + 0x7000) +#define TX4939_DDRC_REG (TX4939_REG_BASE + 0x8000) +#define TX4939_EBUSC_REG (TX4939_REG_BASE + 0x9000) +#define TX4939_VPC_REG (TX4939_REG_BASE + 0xa000) +#define TX4939_DMA_REG(ch) (TX4939_REG_BASE + 0xb000 + (ch) * 0x800) +#define TX4939_PCIC_REG (TX4939_REG_BASE + 0xd000) +#define TX4939_CCFG_REG (TX4939_REG_BASE + 0xe000) +#define TX4939_IRC_REG (TX4939_REG_BASE + 0xe800) +#define TX4939_NR_TMR 6 /* 0xf000,0xf100,0xf200,0xfd00,0xfe00,0xff00 */ +#define TX4939_TMR_REG(ch) \ + (TX4939_REG_BASE + 0xf000 + ((ch) + ((ch) >= 3) * 10) * 0x100) +#define TX4939_NR_SIO 4 /* 0xf300, 0xf400, 0xf380, 0xf480 */ +#define TX4939_SIO_REG(ch) \ + (TX4939_REG_BASE + 0xf300 + (((ch) & 1) << 8) + (((ch) & 2) << 6)) +#define TX4939_ACLC_REG (TX4939_REG_BASE + 0xf700) +#define TX4939_SPI_REG (TX4939_REG_BASE + 0xf800) +#define TX4939_I2C_REG (TX4939_REG_BASE + 0xf900) +#define TX4939_I2S_REG (TX4939_REG_BASE + 0xfa00) +#define TX4939_RTC_REG (TX4939_REG_BASE + 0xfb00) +#define TX4939_CIR_REG (TX4939_REG_BASE + 0xfc00) + +struct tx4939_le_reg { + __u32 r; + __u32 unused; +}; + +struct tx4939_ddrc_reg { + struct tx4939_le_reg ctl[47]; + __u64 unused0[17]; + __u64 winen; + __u64 win[4]; +}; + +struct tx4939_ccfg_reg { + __u64 ccfg; + __u64 crir; + __u64 pcfg; + __u64 toea; + __u64 clkctr; + __u64 unused0; + __u64 garbc; + __u64 unused1[2]; + __u64 ramp; + __u64 unused2[2]; + __u64 dskwctrl; + __u64 mclkosc; + __u64 mclkctl; + __u64 unused3[17]; + struct { + __u64 mr; + __u64 dr; + } gpio[2]; +}; + +struct tx4939_irc_reg { + struct tx4939_le_reg den; + struct tx4939_le_reg scipb; + struct tx4939_le_reg dm[2]; + struct tx4939_le_reg lvl[16]; + struct tx4939_le_reg msk; + struct tx4939_le_reg edc; + struct tx4939_le_reg pnd0; + struct tx4939_le_reg cs; + struct tx4939_le_reg pnd1; + struct tx4939_le_reg dm2[2]; + struct tx4939_le_reg dbr[2]; + struct tx4939_le_reg dben; + struct tx4939_le_reg unused0[2]; + struct tx4939_le_reg flag[2]; + struct tx4939_le_reg pol; + struct tx4939_le_reg cnt; + struct tx4939_le_reg maskint; + struct tx4939_le_reg maskext; +}; + +struct tx4939_rtc_reg { + __u32 ctl; + __u32 adr; + __u32 dat; + __u32 tbc; +}; + +struct tx4939_crypto_reg { + struct tx4939_le_reg csr; + struct tx4939_le_reg idesptr; + struct tx4939_le_reg cdesptr; + struct tx4939_le_reg buserr; + struct tx4939_le_reg cip_tout; + struct tx4939_le_reg cir; + union { + struct { + struct tx4939_le_reg data[8]; + struct tx4939_le_reg ctrl; + } gen; + struct { + struct { + struct tx4939_le_reg l; + struct tx4939_le_reg u; + } key[3], ini; + struct tx4939_le_reg ctrl; + } des; + struct { + struct tx4939_le_reg key[4]; + struct tx4939_le_reg ini[4]; + struct tx4939_le_reg ctrl; + } aes; + struct { + struct { + struct tx4939_le_reg l; + struct tx4939_le_reg u; + } cnt; + struct tx4939_le_reg ini[5]; + struct tx4939_le_reg unused; + struct tx4939_le_reg ctrl; + } hash; + } cdr; + struct tx4939_le_reg unused0[7]; + struct tx4939_le_reg rcsr; + struct tx4939_le_reg rpr; + __u64 rdr; + __u64 ror[3]; + struct tx4939_le_reg unused1[2]; + struct tx4939_le_reg xorslr; + struct tx4939_le_reg xorsur; +}; + +struct tx4939_crypto_desc { + __u32 src; + __u32 dst; + __u32 next; + __u32 ctrl; + __u32 index; + __u32 xor; +}; + +struct tx4939_vpc_reg { + struct tx4939_le_reg csr; + struct { + struct tx4939_le_reg ctrlA; + struct tx4939_le_reg ctrlB; + struct tx4939_le_reg idesptr; + struct tx4939_le_reg cdesptr; + } port[3]; + struct tx4939_le_reg buserr; +}; + +struct tx4939_vpc_desc { + __u32 src; + __u32 next; + __u32 ctrl1; + __u32 ctrl2; +}; + +/* + * IRC + */ +#define TX4939_IR_NONE 0 +#define TX4939_IR_DDR 1 +#define TX4939_IR_WTOERR 2 +#define TX4939_NUM_IR_INT 3 +#define TX4939_IR_INT(n) (3 + (n)) +#define TX4939_NUM_IR_ETH 2 +#define TX4939_IR_ETH(n) ((n) ? 43 : 6) +#define TX4939_IR_VIDEO 7 +#define TX4939_IR_CIR 8 +#define TX4939_NUM_IR_SIO 4 +#define TX4939_IR_SIO(n) ((n) ? 43 + (n) : 9) /* 9,44-46 */ +#define TX4939_NUM_IR_DMA 4 +#define TX4939_IR_DMA(ch, n) (((ch) ? 22 : 10) + (n)) /* 10-13,22-25 */ +#define TX4939_IR_IRC 14 +#define TX4939_IR_PDMAC 15 +#define TX4939_NUM_IR_TMR 6 +#define TX4939_IR_TMR(n) (((n) >= 3 ? 45 : 16) + (n)) /* 16-18,48-50 */ +#define TX4939_NUM_IR_ATA 2 +#define TX4939_IR_ATA(n) (19 + (n)) +#define TX4939_IR_ACLC 21 +#define TX4939_IR_CIPHER 26 +#define TX4939_IR_INTA 27 +#define TX4939_IR_INTB 28 +#define TX4939_IR_INTC 29 +#define TX4939_IR_INTD 30 +#define TX4939_IR_I2C 33 +#define TX4939_IR_SPI 34 +#define TX4939_IR_PCIC 35 +#define TX4939_IR_PCIC1 36 +#define TX4939_IR_PCIERR 37 +#define TX4939_IR_PCIPME 38 +#define TX4939_IR_NDFMC 39 +#define TX4939_IR_ACLCPME 40 +#define TX4939_IR_RTC 41 +#define TX4939_IR_RND 42 +#define TX4939_IR_I2S 47 +#define TX4939_NUM_IR 64 + +#define TX4939_IRC_INT 2 /* IP[2] in Status register */ + +/* + * CCFG + */ +/* CCFG : Chip Configuration */ +#define TX4939_CCFG_PCIBOOT 0x0000040000000000ULL +#define TX4939_CCFG_WDRST 0x0000020000000000ULL +#define TX4939_CCFG_WDREXEN 0x0000010000000000ULL +#define TX4939_CCFG_BCFG_MASK 0x000000ff00000000ULL +#define TX4939_CCFG_GTOT_MASK 0x06000000 +#define TX4939_CCFG_GTOT_4096 0x06000000 +#define TX4939_CCFG_GTOT_2048 0x04000000 +#define TX4939_CCFG_GTOT_1024 0x02000000 +#define TX4939_CCFG_GTOT_512 0x00000000 +#define TX4939_CCFG_TINTDIS 0x01000000 +#define TX4939_CCFG_PCI66 0x00800000 +#define TX4939_CCFG_PCIMODE 0x00400000 +#define TX4939_CCFG_SSCG 0x00100000 +#define TX4939_CCFG_MULCLK_MASK 0x000e0000 +#define TX4939_CCFG_MULCLK_8 (0x7 << 17) +#define TX4939_CCFG_MULCLK_9 (0x0 << 17) +#define TX4939_CCFG_MULCLK_10 (0x1 << 17) +#define TX4939_CCFG_MULCLK_11 (0x2 << 17) +#define TX4939_CCFG_MULCLK_12 (0x3 << 17) +#define TX4939_CCFG_MULCLK_13 (0x4 << 17) +#define TX4939_CCFG_MULCLK_14 (0x5 << 17) +#define TX4939_CCFG_MULCLK_15 (0x6 << 17) +#define TX4939_CCFG_BEOW 0x00010000 +#define TX4939_CCFG_WR 0x00008000 +#define TX4939_CCFG_TOE 0x00004000 +#define TX4939_CCFG_PCIARB 0x00002000 +#define TX4939_CCFG_YDIVMODE_MASK 0x00001c00 +#define TX4939_CCFG_YDIVMODE_2 (0x0 << 10) +#define TX4939_CCFG_YDIVMODE_3 (0x1 << 10) +#define TX4939_CCFG_YDIVMODE_5 (0x6 << 10) +#define TX4939_CCFG_YDIVMODE_6 (0x7 << 10) +#define TX4939_CCFG_PTSEL 0x00000200 +#define TX4939_CCFG_BESEL 0x00000100 +#define TX4939_CCFG_SYSSP_MASK 0x000000c0 +#define TX4939_CCFG_ACKSEL 0x00000020 +#define TX4939_CCFG_ROMW 0x00000010 +#define TX4939_CCFG_ENDIAN 0x00000004 +#define TX4939_CCFG_ARMODE 0x00000002 +#define TX4939_CCFG_ACEHOLD 0x00000001 + +/* PCFG : Pin Configuration */ +#define TX4939_PCFG_SIO2MODE_MASK 0xc000000000000000ULL +#define TX4939_PCFG_SIO2MODE_GPIO 0x8000000000000000ULL +#define TX4939_PCFG_SIO2MODE_SIO2 0x4000000000000000ULL +#define TX4939_PCFG_SIO2MODE_SIO0 0x0000000000000000ULL +#define TX4939_PCFG_SPIMODE 0x2000000000000000ULL +#define TX4939_PCFG_I2CMODE 0x1000000000000000ULL +#define TX4939_PCFG_I2SMODE_MASK 0x0c00000000000000ULL +#define TX4939_PCFG_I2SMODE_GPIO 0x0c00000000000000ULL +#define TX4939_PCFG_I2SMODE_I2S 0x0800000000000000ULL +#define TX4939_PCFG_I2SMODE_I2S_ALT 0x0400000000000000ULL +#define TX4939_PCFG_I2SMODE_ACLC 0x0000000000000000ULL +#define TX4939_PCFG_SIO3MODE 0x0200000000000000ULL +#define TX4939_PCFG_DMASEL3 0x0004000000000000ULL +#define TX4939_PCFG_DMASEL3_SIO0 0x0004000000000000ULL +#define TX4939_PCFG_DMASEL3_NDFC 0x0000000000000000ULL +#define TX4939_PCFG_VSSMODE 0x0000200000000000ULL +#define TX4939_PCFG_VPSMODE 0x0000100000000000ULL +#define TX4939_PCFG_ET1MODE 0x0000080000000000ULL +#define TX4939_PCFG_ET0MODE 0x0000040000000000ULL +#define TX4939_PCFG_ATA1MODE 0x0000020000000000ULL +#define TX4939_PCFG_ATA0MODE 0x0000010000000000ULL +#define TX4939_PCFG_BP_PLL 0x0000000100000000ULL + +#define TX4939_PCFG_SYSCLKEN 0x08000000 +#define TX4939_PCFG_PCICLKEN_ALL 0x000f0000 +#define TX4939_PCFG_PCICLKEN(ch) (0x00010000<<(ch)) +#define TX4939_PCFG_SPEED1 0x00002000 +#define TX4939_PCFG_SPEED0 0x00001000 +#define TX4939_PCFG_ITMODE 0x00000300 +#define TX4939_PCFG_DMASEL_ALL (0x00000007 | TX4939_PCFG_DMASEL3) +#define TX4939_PCFG_DMASEL2 0x00000004 +#define TX4939_PCFG_DMASEL2_DRQ2 0x00000000 +#define TX4939_PCFG_DMASEL2_SIO0 0x00000004 +#define TX4939_PCFG_DMASEL1 0x00000002 +#define TX4939_PCFG_DMASEL1_DRQ1 0x00000000 +#define TX4939_PCFG_DMASEL0 0x00000001 +#define TX4939_PCFG_DMASEL0_DRQ0 0x00000000 + +/* CLKCTR : Clock Control */ +#define TX4939_CLKCTR_IOSCKD 0x8000000000000000ULL +#define TX4939_CLKCTR_SYSCKD 0x4000000000000000ULL +#define TX4939_CLKCTR_TM5CKD 0x2000000000000000ULL +#define TX4939_CLKCTR_TM4CKD 0x1000000000000000ULL +#define TX4939_CLKCTR_TM3CKD 0x0800000000000000ULL +#define TX4939_CLKCTR_CIRCKD 0x0400000000000000ULL +#define TX4939_CLKCTR_SIO3CKD 0x0200000000000000ULL +#define TX4939_CLKCTR_SIO2CKD 0x0100000000000000ULL +#define TX4939_CLKCTR_SIO1CKD 0x0080000000000000ULL +#define TX4939_CLKCTR_VPCCKD 0x0040000000000000ULL +#define TX4939_CLKCTR_EPCICKD 0x0020000000000000ULL +#define TX4939_CLKCTR_ETH1CKD 0x0008000000000000ULL +#define TX4939_CLKCTR_ATA1CKD 0x0004000000000000ULL +#define TX4939_CLKCTR_BROMCKD 0x0002000000000000ULL +#define TX4939_CLKCTR_NDCCKD 0x0001000000000000ULL +#define TX4939_CLKCTR_I2CCKD 0x0000800000000000ULL +#define TX4939_CLKCTR_ETH0CKD 0x0000400000000000ULL +#define TX4939_CLKCTR_SPICKD 0x0000200000000000ULL +#define TX4939_CLKCTR_SRAMCKD 0x0000100000000000ULL +#define TX4939_CLKCTR_PCI1CKD 0x0000080000000000ULL +#define TX4939_CLKCTR_DMA1CKD 0x0000040000000000ULL +#define TX4939_CLKCTR_ACLCKD 0x0000020000000000ULL +#define TX4939_CLKCTR_ATA0CKD 0x0000010000000000ULL +#define TX4939_CLKCTR_DMA0CKD 0x0000008000000000ULL +#define TX4939_CLKCTR_PCICCKD 0x0000004000000000ULL +#define TX4939_CLKCTR_I2SCKD 0x0000002000000000ULL +#define TX4939_CLKCTR_TM0CKD 0x0000001000000000ULL +#define TX4939_CLKCTR_TM1CKD 0x0000000800000000ULL +#define TX4939_CLKCTR_TM2CKD 0x0000000400000000ULL +#define TX4939_CLKCTR_SIO0CKD 0x0000000200000000ULL +#define TX4939_CLKCTR_CYPCKD 0x0000000100000000ULL +#define TX4939_CLKCTR_IOSRST 0x80000000 +#define TX4939_CLKCTR_SYSRST 0x40000000 +#define TX4939_CLKCTR_TM5RST 0x20000000 +#define TX4939_CLKCTR_TM4RST 0x10000000 +#define TX4939_CLKCTR_TM3RST 0x08000000 +#define TX4939_CLKCTR_CIRRST 0x04000000 +#define TX4939_CLKCTR_SIO3RST 0x02000000 +#define TX4939_CLKCTR_SIO2RST 0x01000000 +#define TX4939_CLKCTR_SIO1RST 0x00800000 +#define TX4939_CLKCTR_VPCRST 0x00400000 +#define TX4939_CLKCTR_EPCIRST 0x00200000 +#define TX4939_CLKCTR_ETH1RST 0x00080000 +#define TX4939_CLKCTR_ATA1RST 0x00040000 +#define TX4939_CLKCTR_BROMRST 0x00020000 +#define TX4939_CLKCTR_NDCRST 0x00010000 +#define TX4939_CLKCTR_I2CRST 0x00008000 +#define TX4939_CLKCTR_ETH0RST 0x00004000 +#define TX4939_CLKCTR_SPIRST 0x00002000 +#define TX4939_CLKCTR_SRAMRST 0x00001000 +#define TX4939_CLKCTR_PCI1RST 0x00000800 +#define TX4939_CLKCTR_DMA1RST 0x00000400 +#define TX4939_CLKCTR_ACLRST 0x00000200 +#define TX4939_CLKCTR_ATA0RST 0x00000100 +#define TX4939_CLKCTR_DMA0RST 0x00000080 +#define TX4939_CLKCTR_PCICRST 0x00000040 +#define TX4939_CLKCTR_I2SRST 0x00000020 +#define TX4939_CLKCTR_TM0RST 0x00000010 +#define TX4939_CLKCTR_TM1RST 0x00000008 +#define TX4939_CLKCTR_TM2RST 0x00000004 +#define TX4939_CLKCTR_SIO0RST 0x00000002 +#define TX4939_CLKCTR_CYPRST 0x00000001 + +/* + * RTC + */ +#define TX4939_RTCCTL_ALME 0x00000080 +#define TX4939_RTCCTL_ALMD 0x00000040 +#define TX4939_RTCCTL_BUSY 0x00000020 + +#define TX4939_RTCCTL_COMMAND 0x00000007 +#define TX4939_RTCCTL_COMMAND_NOP 0x00000000 +#define TX4939_RTCCTL_COMMAND_GETTIME 0x00000001 +#define TX4939_RTCCTL_COMMAND_SETTIME 0x00000002 +#define TX4939_RTCCTL_COMMAND_GETALARM 0x00000003 +#define TX4939_RTCCTL_COMMAND_SETALARM 0x00000004 + +#define TX4939_RTCTBC_PM 0x00000080 +#define TX4939_RTCTBC_COMP 0x0000007f + +#define TX4939_RTC_REG_RAMSIZE 0x00000100 +#define TX4939_RTC_REG_RWBSIZE 0x00000006 + +/* + * CRYPTO + */ +#define TX4939_CRYPTO_CSR_SAESO 0x08000000 +#define TX4939_CRYPTO_CSR_SAESI 0x04000000 +#define TX4939_CRYPTO_CSR_SDESO 0x02000000 +#define TX4939_CRYPTO_CSR_SDESI 0x01000000 +#define TX4939_CRYPTO_CSR_INDXBST_MASK 0x00700000 +#define TX4939_CRYPTO_CSR_INDXBST(n) ((n) << 20) +#define TX4939_CRYPTO_CSR_TOINT 0x00080000 +#define TX4939_CRYPTO_CSR_DCINT 0x00040000 +#define TX4939_CRYPTO_CSR_GBINT 0x00010000 +#define TX4939_CRYPTO_CSR_INDXAST_MASK 0x0000e000 +#define TX4939_CRYPTO_CSR_INDXAST(n) ((n) << 13) +#define TX4939_CRYPTO_CSR_CSWAP_MASK 0x00001800 +#define TX4939_CRYPTO_CSR_CSWAP_NONE 0x00000000 +#define TX4939_CRYPTO_CSR_CSWAP_IN 0x00000800 +#define TX4939_CRYPTO_CSR_CSWAP_OUT 0x00001000 +#define TX4939_CRYPTO_CSR_CSWAP_BOTH 0x00001800 +#define TX4939_CRYPTO_CSR_CDIV_MASK 0x00000600 +#define TX4939_CRYPTO_CSR_CDIV_DIV2 0x00000000 +#define TX4939_CRYPTO_CSR_CDIV_DIV1 0x00000200 +#define TX4939_CRYPTO_CSR_CDIV_DIV2ALT 0x00000400 +#define TX4939_CRYPTO_CSR_CDIV_DIV1ALT 0x00000600 +#define TX4939_CRYPTO_CSR_PDINT_MASK 0x000000c0 +#define TX4939_CRYPTO_CSR_PDINT_ALL 0x00000000 +#define TX4939_CRYPTO_CSR_PDINT_END 0x00000040 +#define TX4939_CRYPTO_CSR_PDINT_NEXT 0x00000080 +#define TX4939_CRYPTO_CSR_PDINT_NONE 0x000000c0 +#define TX4939_CRYPTO_CSR_GINTE 0x00000008 +#define TX4939_CRYPTO_CSR_RSTD 0x00000004 +#define TX4939_CRYPTO_CSR_RSTC 0x00000002 +#define TX4939_CRYPTO_CSR_ENCR 0x00000001 + +/* bits for tx4939_crypto_reg.cdr.gen.ctrl */ +#define TX4939_CRYPTO_CTX_ENGINE_MASK 0x00000003 +#define TX4939_CRYPTO_CTX_ENGINE_DES 0x00000000 +#define TX4939_CRYPTO_CTX_ENGINE_AES 0x00000001 +#define TX4939_CRYPTO_CTX_ENGINE_MD5 0x00000002 +#define TX4939_CRYPTO_CTX_ENGINE_SHA1 0x00000003 +#define TX4939_CRYPTO_CTX_TDMS 0x00000010 +#define TX4939_CRYPTO_CTX_CMS 0x00000020 +#define TX4939_CRYPTO_CTX_DMS 0x00000040 +#define TX4939_CRYPTO_CTX_UPDATE 0x00000080 + +/* bits for tx4939_crypto_desc.ctrl */ +#define TX4939_CRYPTO_DESC_OB_CNT_MASK 0xffe00000 +#define TX4939_CRYPTO_DESC_OB_CNT(cnt) ((cnt) << 21) +#define TX4939_CRYPTO_DESC_IB_CNT_MASK 0x001ffc00 +#define TX4939_CRYPTO_DESC_IB_CNT(cnt) ((cnt) << 10) +#define TX4939_CRYPTO_DESC_START 0x00000200 +#define TX4939_CRYPTO_DESC_END 0x00000100 +#define TX4939_CRYPTO_DESC_XOR 0x00000010 +#define TX4939_CRYPTO_DESC_LAST 0x00000008 +#define TX4939_CRYPTO_DESC_ERR_MASK 0x00000006 +#define TX4939_CRYPTO_DESC_ERR_NONE 0x00000000 +#define TX4939_CRYPTO_DESC_ERR_TOUT 0x00000002 +#define TX4939_CRYPTO_DESC_ERR_DIGEST 0x00000004 +#define TX4939_CRYPTO_DESC_OWN 0x00000001 + +/* bits for tx4939_crypto_desc.index */ +#define TX4939_CRYPTO_DESC_HASH_IDX_MASK 0x00000070 +#define TX4939_CRYPTO_DESC_HASH_IDX(idx) ((idx) << 4) +#define TX4939_CRYPTO_DESC_ENCRYPT_IDX_MASK 0x00000007 +#define TX4939_CRYPTO_DESC_ENCRYPT_IDX(idx) ((idx) << 0) + +#define TX4939_CRYPTO_NR_SET 6 + +#define TX4939_CRYPTO_RCSR_INTE 0x00000008 +#define TX4939_CRYPTO_RCSR_RST 0x00000004 +#define TX4939_CRYPTO_RCSR_FIN 0x00000002 +#define TX4939_CRYPTO_RCSR_ST 0x00000001 + +/* + * VPC + */ +#define TX4939_VPC_CSR_GBINT 0x00010000 +#define TX4939_VPC_CSR_SWAPO 0x00000020 +#define TX4939_VPC_CSR_SWAPI 0x00000010 +#define TX4939_VPC_CSR_GINTE 0x00000008 +#define TX4939_VPC_CSR_RSTD 0x00000004 +#define TX4939_VPC_CSR_RSTVPC 0x00000002 + +#define TX4939_VPC_CTRLA_VDPSN 0x00000200 +#define TX4939_VPC_CTRLA_PBUSY 0x00000100 +#define TX4939_VPC_CTRLA_DCINT 0x00000080 +#define TX4939_VPC_CTRLA_UOINT 0x00000040 +#define TX4939_VPC_CTRLA_PDINT_MASK 0x00000030 +#define TX4939_VPC_CTRLA_PDINT_ALL 0x00000000 +#define TX4939_VPC_CTRLA_PDINT_NEXT 0x00000010 +#define TX4939_VPC_CTRLA_PDINT_NONE 0x00000030 +#define TX4939_VPC_CTRLA_VDVLDP 0x00000008 +#define TX4939_VPC_CTRLA_VDMODE 0x00000004 +#define TX4939_VPC_CTRLA_VDFOR 0x00000002 +#define TX4939_VPC_CTRLA_ENVPC 0x00000001 + +/* bits for tx4939_vpc_desc.ctrl1 */ +#define TX4939_VPC_DESC_CTRL1_ERR_MASK 0x00000006 +#define TX4939_VPC_DESC_CTRL1_OWN 0x00000001 + +#define tx4939_ddrcptr ((struct tx4939_ddrc_reg __iomem *)TX4939_DDRC_REG) +#define tx4939_ebuscptr tx4938_ebuscptr +#define tx4939_ircptr \ + ((struct tx4939_irc_reg __iomem *)TX4939_IRC_REG) +#define tx4939_pcicptr tx4938_pcicptr +#define tx4939_pcic1ptr tx4938_pcic1ptr +#define tx4939_ccfgptr \ + ((struct tx4939_ccfg_reg __iomem *)TX4939_CCFG_REG) +#define tx4939_sramcptr tx4938_sramcptr +#define tx4939_rtcptr \ + ((struct tx4939_rtc_reg __iomem *)TX4939_RTC_REG) +#define tx4939_cryptoptr \ + ((struct tx4939_crypto_reg __iomem *)TX4939_CRYPTO_REG) +#define tx4939_vpcptr ((struct tx4939_vpc_reg __iomem *)TX4939_VPC_REG) + +#define TX4939_REV_MAJ_MIN() \ + ((__u32)__raw_readq(&tx4939_ccfgptr->crir) & 0x00ff) +#define TX4939_REV_PCODE() \ + ((__u32)__raw_readq(&tx4939_ccfgptr->crir) >> 16) +#define TX4939_CCFG_BCFG() \ + ((__u32)((__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_BCFG_MASK) \ + >> 32)) + +#define tx4939_ccfg_clear(bits) tx4938_ccfg_clear(bits) +#define tx4939_ccfg_set(bits) tx4938_ccfg_set(bits) +#define tx4939_ccfg_change(change, new) tx4938_ccfg_change(change, new) + +#define TX4939_EBUSC_CR(ch) TX4927_EBUSC_CR(ch) +#define TX4939_EBUSC_BA(ch) TX4927_EBUSC_BA(ch) +#define TX4939_EBUSC_SIZE(ch) TX4927_EBUSC_SIZE(ch) +#define TX4939_EBUSC_WIDTH(ch) \ + (16 >> ((__u32)(TX4939_EBUSC_CR(ch) >> 20) & 0x1)) + +/* SCLK0 = MSTCLK * 429/19 * 16/245 / 2 (14.745MHz for MST 20MHz) */ +#define TX4939_SCLK0(mst) \ + ((((mst) + 245/2) / 245UL * 429 * 16 + 19) / 19 / 2) + +void tx4939_wdt_init(void); +void tx4939_add_memory_regions(void); +void tx4939_setup(void); +void tx4939_time_init(unsigned int tmrnr); +void tx4939_sio_init(unsigned int sclk, unsigned int cts_mask); +void tx4939_spi_init(int busid); +void tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1); +int tx4939_report_pciclk(void); +void tx4939_report_pci1clk(void); +struct pci_dev; +int tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot); +int tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); +void tx4939_setup_pcierr_irq(void); +void tx4939_irq_init(void); +int tx4939_irq(void); +void tx4939_mtd_init(int ch); + +#endif /* __ASM_TXX9_TX4939_H */ From b27311e1cace4e296ace786c886d22f7a8ec78d6 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Mon, 1 Sep 2008 22:22:40 +0900 Subject: [PATCH 31/49] MIPS: TXx9: Add RBTX4939 board support Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle create mode 100644 arch/mips/txx9/rbtx4939/Makefile create mode 100644 arch/mips/txx9/rbtx4939/irq.c create mode 100644 arch/mips/txx9/rbtx4939/prom.c create mode 100644 arch/mips/txx9/rbtx4939/setup.c create mode 100644 include/asm-mips/txx9/rbtx4939.h --- arch/mips/Makefile | 8 +- arch/mips/txx9/Kconfig | 8 + arch/mips/txx9/generic/setup.c | 5 + arch/mips/txx9/rbtx4939/Makefile | 3 + arch/mips/txx9/rbtx4939/irq.c | 96 ++++++++++ arch/mips/txx9/rbtx4939/prom.c | 17 ++ arch/mips/txx9/rbtx4939/setup.c | 306 +++++++++++++++++++++++++++++++ include/asm-mips/txx9/boards.h | 3 + include/asm-mips/txx9/rbtx4939.h | 133 ++++++++++++++ 9 files changed, 573 insertions(+), 6 deletions(-) create mode 100644 arch/mips/txx9/rbtx4939/Makefile create mode 100644 arch/mips/txx9/rbtx4939/irq.c create mode 100644 arch/mips/txx9/rbtx4939/prom.c create mode 100644 arch/mips/txx9/rbtx4939/setup.c create mode 100644 include/asm-mips/txx9/rbtx4939.h diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 9aab51caf16a..87f67228e309 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -567,15 +567,11 @@ cflags-$(CONFIG_MIKROTIK_RB532) += -Iinclude/asm-mips/mach-rc32434 load-$(CONFIG_MIKROTIK_RB532) += 0xffffffff80101000 # -# Toshiba RBTX4927 board or -# Toshiba RBTX4937 board +# Toshiba RBTX49XX boards # core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/ - -# -# Toshiba RBTX4938 board -# core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/ +core-$(CONFIG_TOSHIBA_RBTX4939) += arch/mips/txx9/rbtx4939/ cflags-y += -Iinclude/asm-mips/mach-generic drivers-$(CONFIG_PCI) += arch/mips/pci/ diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig index 58691a1fe779..17052db4161d 100644 --- a/arch/mips/txx9/Kconfig +++ b/arch/mips/txx9/Kconfig @@ -45,6 +45,14 @@ config TOSHIBA_RBTX4938 This Toshiba board is based on the TX4938 processor. Say Y here to support this machine type +config TOSHIBA_RBTX4939 + bool "Toshiba RBTX4939 bobard" + depends on MACH_TX49XX + select SOC_TX4939 + help + This Toshiba board is based on the TX4939 processor. Say Y here to + support this machine type + config SOC_TX3927 bool select CEVT_TXX9 diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 1ea06553a1e1..7a05c34c1dec 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -371,6 +371,11 @@ static void __init select_board(void) case 0x4938: txx9_board_vec = &rbtx4938_vec; break; +#endif +#ifdef CONFIG_TOSHIBA_RBTX4939 + case 0x4939: + txx9_board_vec = &rbtx4939_vec; + break; #endif } #endif diff --git a/arch/mips/txx9/rbtx4939/Makefile b/arch/mips/txx9/rbtx4939/Makefile new file mode 100644 index 000000000000..3232cd03a7d6 --- /dev/null +++ b/arch/mips/txx9/rbtx4939/Makefile @@ -0,0 +1,3 @@ +obj-y += irq.o setup.o prom.o + +EXTRA_CFLAGS += -Werror diff --git a/arch/mips/txx9/rbtx4939/irq.c b/arch/mips/txx9/rbtx4939/irq.c new file mode 100644 index 000000000000..500cc0a908e6 --- /dev/null +++ b/arch/mips/txx9/rbtx4939/irq.c @@ -0,0 +1,96 @@ +/* + * Toshiba RBTX4939 interrupt routines + * Based on linux/arch/mips/txx9/rbtx4938/irq.c, + * and RBTX49xx patch from CELF patch archive. + * + * Copyright (C) 2000-2001,2005-2006 Toshiba Corporation + * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#include +#include +#include +#include + +/* + * RBTX4939 IOC controller definition + */ + +static void rbtx4939_ioc_irq_unmask(unsigned int irq) +{ + int ioc_nr = irq - RBTX4939_IRQ_IOC; + + writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr); +} + +static void rbtx4939_ioc_irq_mask(unsigned int irq) +{ + int ioc_nr = irq - RBTX4939_IRQ_IOC; + + writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr); + mmiowb(); +} + +static struct irq_chip rbtx4939_ioc_irq_chip = { + .name = "IOC", + .ack = rbtx4939_ioc_irq_mask, + .mask = rbtx4939_ioc_irq_mask, + .mask_ack = rbtx4939_ioc_irq_mask, + .unmask = rbtx4939_ioc_irq_unmask, +}; + + +static inline int rbtx4939_ioc_irqroute(void) +{ + unsigned char istat = readb(rbtx4939_ifac2_addr); + + if (unlikely(istat == 0)) + return -1; + return RBTX4939_IRQ_IOC + __fls8(istat); +} + +static int rbtx4939_irq_dispatch(int pending) +{ + int irq; + + if (pending & CAUSEF_IP7) + return MIPS_CPU_IRQ_BASE + 7; + irq = tx4939_irq(); + if (likely(irq >= 0)) { + /* redirect IOC interrupts */ + switch (irq) { + case RBTX4939_IRQ_IOCINT: + irq = rbtx4939_ioc_irqroute(); + break; + } + } else if (pending & CAUSEF_IP0) + irq = MIPS_CPU_IRQ_BASE + 0; + else if (pending & CAUSEF_IP1) + irq = MIPS_CPU_IRQ_BASE + 1; + else + irq = -1; + return irq; +} + +void __init rbtx4939_irq_setup(void) +{ + int i; + + /* mask all IOC interrupts */ + writeb(0, rbtx4939_ien_addr); + + /* clear SoftInt interrupts */ + writeb(0, rbtx4939_softint_addr); + + txx9_irq_dispatch = rbtx4939_irq_dispatch; + + tx4939_irq_init(); + for (i = RBTX4939_IRQ_IOC; + i < RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC; i++) + set_irq_chip_and_handler(i, &rbtx4939_ioc_irq_chip, + handle_level_irq); + + set_irq_chained_handler(RBTX4939_IRQ_IOCINT, handle_simple_irq); +} diff --git a/arch/mips/txx9/rbtx4939/prom.c b/arch/mips/txx9/rbtx4939/prom.c new file mode 100644 index 000000000000..bd277ecb4ad6 --- /dev/null +++ b/arch/mips/txx9/rbtx4939/prom.c @@ -0,0 +1,17 @@ +/* + * rbtx4939 specific prom routines + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include + +void __init rbtx4939_prom_init(void) +{ + tx4939_add_memory_regions(); + txx9_sio_putchar_init(TX4939_SIO_REG(0) & 0xfffffffffULL); +} diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c new file mode 100644 index 000000000000..277864d5e779 --- /dev/null +++ b/arch/mips/txx9/rbtx4939/setup.c @@ -0,0 +1,306 @@ +/* + * Toshiba RBTX4939 setup routines. + * Based on linux/arch/mips/txx9/rbtx4938/setup.c, + * and RBTX49xx patch from CELF patch archive. + * + * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation + * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void rbtx4939_machine_restart(char *command) +{ + local_irq_disable(); + writeb(1, rbtx4939_reseten_addr); + writeb(1, rbtx4939_softreset_addr); + while (1) + ; +} + +static void __init rbtx4939_time_init(void) +{ + tx4939_time_init(0); +} + +static void __init rbtx4939_pci_setup(void) +{ +#ifdef CONFIG_PCI + int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB); + struct pci_controller *c = &txx9_primary_pcic; + + register_pci_controller(c); + + tx4939_report_pciclk(); + tx4927_pcic_setup(tx4939_pcicptr, c, extarb); + if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) && + (__raw_readq(&tx4939_ccfgptr->pcfg) & + (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) { + tx4939_report_pci1clk(); + + /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */ + c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000); + register_pci_controller(c); + tx4927_pcic_setup(tx4939_pcic1ptr, c, 0); + } + + tx4939_setup_pcierr_irq(); +#endif /* CONFIG_PCI */ +} + +static unsigned long long default_ebccr[] __initdata = { + 0x01c0000000007608ULL, /* 64M ROM */ + 0x017f000000007049ULL, /* 1M IOC */ + 0x0180000000408608ULL, /* ISA */ + 0, +}; + +static void __init rbtx4939_ebusc_setup(void) +{ + int i; + unsigned int sp; + + /* use user-configured speed */ + sp = TX4939_EBUSC_CR(0) & 0x30; + default_ebccr[0] |= sp; + default_ebccr[1] |= sp; + default_ebccr[2] |= sp; + /* initialise by myself */ + for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) { + if (default_ebccr[i]) + ____raw_writeq(default_ebccr[i], + &tx4939_ebuscptr->cr[i]); + else + ____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i]) + & ~8, + &tx4939_ebuscptr->cr[i]); + } +} + +static void __init rbtx4939_update_ioc_pen(void) +{ + __u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg); + __u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg); + __u8 pe1 = readb(rbtx4939_pe1_addr); + __u8 pe2 = readb(rbtx4939_pe2_addr); + __u8 pe3 = readb(rbtx4939_pe3_addr); + if (pcfg & TX4939_PCFG_ATA0MODE) + pe1 |= RBTX4939_PE1_ATA(0); + else + pe1 &= ~RBTX4939_PE1_ATA(0); + if (pcfg & TX4939_PCFG_ATA1MODE) { + pe1 |= RBTX4939_PE1_ATA(1); + pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1)); + } else { + pe1 &= ~RBTX4939_PE1_ATA(1); + if (pcfg & TX4939_PCFG_ET0MODE) + pe1 |= RBTX4939_PE1_RMII(0); + else + pe1 &= ~RBTX4939_PE1_RMII(0); + if (pcfg & TX4939_PCFG_ET1MODE) + pe1 |= RBTX4939_PE1_RMII(1); + else + pe1 &= ~RBTX4939_PE1_RMII(1); + } + if (ccfg & TX4939_CCFG_PTSEL) + pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P | + RBTX4939_PE3_VP_S); + else { + __u64 vmode = pcfg & + (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE); + if (vmode == 0) + pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P | + RBTX4939_PE3_VP_S); + else if (vmode == TX4939_PCFG_VPSMODE) { + pe3 |= RBTX4939_PE3_VP_P; + pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S); + } else if (vmode == TX4939_PCFG_VSSMODE) { + pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S; + pe3 &= ~RBTX4939_PE3_VP_P; + } else { + pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P; + pe3 &= ~RBTX4939_PE3_VP_S; + } + } + if (pcfg & TX4939_PCFG_SPIMODE) { + if (pcfg & TX4939_PCFG_SIO2MODE_GPIO) + pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0); + else { + if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) { + pe2 |= RBTX4939_PE2_SIO2; + pe2 &= ~RBTX4939_PE2_SIO0; + } else { + pe2 |= RBTX4939_PE2_SIO0; + pe2 &= ~RBTX4939_PE2_SIO2; + } + } + if (pcfg & TX4939_PCFG_SIO3MODE) + pe2 |= RBTX4939_PE2_SIO3; + else + pe2 &= ~RBTX4939_PE2_SIO3; + pe2 &= ~RBTX4939_PE2_SPI; + } else { + pe2 |= RBTX4939_PE2_SPI; + pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 | + RBTX4939_PE2_SIO0); + } + if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO) + pe2 |= RBTX4939_PE2_GPIO; + else + pe2 &= ~RBTX4939_PE2_GPIO; + writeb(pe1, rbtx4939_pe1_addr); + writeb(pe2, rbtx4939_pe2_addr); + writeb(pe3, rbtx4939_pe3_addr); +} + +#define RBTX4939_MAX_7SEGLEDS 8 + +#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) +static u8 led_val[RBTX4939_MAX_7SEGLEDS]; +struct rbtx4939_led_data { + struct led_classdev cdev; + char name[32]; + unsigned int num; +}; + +/* Use "dot" in 7seg LEDs */ +static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev, + enum led_brightness value) +{ + struct rbtx4939_led_data *led_dat = + container_of(led_cdev, struct rbtx4939_led_data, cdev); + unsigned int num = led_dat->num; + unsigned long flags; + + local_irq_save(flags); + led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0); + writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4)); + local_irq_restore(flags); +} + +static int __init rbtx4939_led_probe(struct platform_device *pdev) +{ + struct rbtx4939_led_data *leds_data; + int i; + static char *default_triggers[] __initdata = { + "heartbeat", + "ide-disk", + "nand-disk", + }; + + leds_data = kzalloc(sizeof(*leds_data) * RBTX4939_MAX_7SEGLEDS, + GFP_KERNEL); + if (!leds_data) + return -ENOMEM; + for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) { + int rc; + struct rbtx4939_led_data *led_dat = &leds_data[i]; + + led_dat->num = i; + led_dat->cdev.brightness_set = rbtx4939_led_brightness_set; + sprintf(led_dat->name, "rbtx4939:amber:%u", i); + led_dat->cdev.name = led_dat->name; + if (i < ARRAY_SIZE(default_triggers)) + led_dat->cdev.default_trigger = default_triggers[i]; + rc = led_classdev_register(&pdev->dev, &led_dat->cdev); + if (rc < 0) + return rc; + led_dat->cdev.brightness_set(&led_dat->cdev, 0); + } + return 0; + +} + +static struct platform_driver rbtx4939_led_driver = { + .driver = { + .name = "rbtx4939-led", + .owner = THIS_MODULE, + }, +}; + +static void __init rbtx4939_led_setup(void) +{ + platform_device_register_simple("rbtx4939-led", -1, NULL, 0); + platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe); +} +#else +static inline void rbtx4939_led_setup(void) +{ +} +#endif + +static void __init rbtx4939_arch_init(void) +{ + rbtx4939_pci_setup(); +} + +static void __init rbtx4939_device_init(void) +{ +#if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE) + int i, j; + unsigned char ethaddr[2][6]; + for (i = 0; i < 2; i++) { + unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10); + if (readb(rbtx4939_bdipsw_addr) & 8) { + u16 buf[3]; + area -= 0x03000000; + for (j = 0; j < 3; j++) + buf[j] = le16_to_cpup((u16 *)(area + j * 2)); + memcpy(ethaddr[i], buf, 6); + } else + memcpy(ethaddr[i], (void *)area, 6); + } + tx4939_ethaddr_init(ethaddr[0], ethaddr[1]); +#endif + rbtx4939_led_setup(); + tx4939_wdt_init(); +} + +static void __init rbtx4939_setup(void) +{ + rbtx4939_ebusc_setup(); + /* always enable ATA0 */ + txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE); + rbtx4939_update_ioc_pen(); + if (txx9_master_clock == 0) + txx9_master_clock = 20000000; + tx4939_setup(); + + _machine_restart = rbtx4939_machine_restart; + + pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n", + readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr), + readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr)); + +#ifdef CONFIG_PCI + txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0); + txx9_board_pcibios_setup = tx4927_pcibios_setup; +#else + set_io_port_base(RBTX4939_ETHER_BASE); +#endif + + tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0); +} + +struct txx9_board_vec rbtx4939_vec __initdata = { + .system = "Tothiba RBTX4939", + .prom_init = rbtx4939_prom_init, + .mem_setup = rbtx4939_setup, + .irq_setup = rbtx4939_irq_setup, + .time_init = rbtx4939_time_init, + .device_init = rbtx4939_device_init, + .arch_init = rbtx4939_arch_init, +#ifdef CONFIG_PCI + .pci_map_irq = tx4939_pci_map_irq, +#endif +}; diff --git a/include/asm-mips/txx9/boards.h b/include/asm-mips/txx9/boards.h index 4abc8142fbb7..cbe9476d963e 100644 --- a/include/asm-mips/txx9/boards.h +++ b/include/asm-mips/txx9/boards.h @@ -8,3 +8,6 @@ BOARD_VEC(rbtx4937_vec) #ifdef CONFIG_TOSHIBA_RBTX4938 BOARD_VEC(rbtx4938_vec) #endif +#ifdef CONFIG_TOSHIBA_RBTX4939 +BOARD_VEC(rbtx4939_vec) +#endif diff --git a/include/asm-mips/txx9/rbtx4939.h b/include/asm-mips/txx9/rbtx4939.h new file mode 100644 index 000000000000..1acf428c0b4f --- /dev/null +++ b/include/asm-mips/txx9/rbtx4939.h @@ -0,0 +1,133 @@ +/* + * Definitions for RBTX4939 + * + * (C) Copyright TOSHIBA CORPORATION 2005-2006 + * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __ASM_TXX9_RBTX4939_H +#define __ASM_TXX9_RBTX4939_H + +#include +#include +#include +#include + +/* Address map */ +#define RBTX4939_IOC_REG_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000) +#define RBTX4939_BOARD_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000) +#define RBTX4939_IOC_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000002) +#define RBTX4939_CONFIG1_ADDR (IO_BASE + TXX9_CE(1) + 0x00000004) +#define RBTX4939_CONFIG2_ADDR (IO_BASE + TXX9_CE(1) + 0x00000006) +#define RBTX4939_CONFIG3_ADDR (IO_BASE + TXX9_CE(1) + 0x00000008) +#define RBTX4939_CONFIG4_ADDR (IO_BASE + TXX9_CE(1) + 0x0000000a) +#define RBTX4939_USTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00001000) +#define RBTX4939_UDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001002) +#define RBTX4939_BDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001004) +#define RBTX4939_IEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00002000) +#define RBTX4939_IPOL_ADDR (IO_BASE + TXX9_CE(1) + 0x00002002) +#define RBTX4939_IFAC1_ADDR (IO_BASE + TXX9_CE(1) + 0x00002004) +#define RBTX4939_IFAC2_ADDR (IO_BASE + TXX9_CE(1) + 0x00002006) +#define RBTX4939_SOFTINT_ADDR (IO_BASE + TXX9_CE(1) + 0x00003000) +#define RBTX4939_ISASTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004000) +#define RBTX4939_PCISTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004002) +#define RBTX4939_ROME_ADDR (IO_BASE + TXX9_CE(1) + 0x00004004) +#define RBTX4939_SPICS_ADDR (IO_BASE + TXX9_CE(1) + 0x00004006) +#define RBTX4939_AUDI_ADDR (IO_BASE + TXX9_CE(1) + 0x00004008) +#define RBTX4939_ISAGPIO_ADDR (IO_BASE + TXX9_CE(1) + 0x0000400a) +#define RBTX4939_PE1_ADDR (IO_BASE + TXX9_CE(1) + 0x00005000) +#define RBTX4939_PE2_ADDR (IO_BASE + TXX9_CE(1) + 0x00005002) +#define RBTX4939_PE3_ADDR (IO_BASE + TXX9_CE(1) + 0x00005004) +#define RBTX4939_VP_ADDR (IO_BASE + TXX9_CE(1) + 0x00005006) +#define RBTX4939_VPRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00005008) +#define RBTX4939_VPSOUT_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500a) +#define RBTX4939_VPSIN_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500c) +#define RBTX4939_7SEG_ADDR(s, ch) \ + (IO_BASE + TXX9_CE(1) + 0x00006000 + (s) * 16 + ((ch) & 3) * 2) +#define RBTX4939_SOFTRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00007000) +#define RBTX4939_RESETEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00007002) +#define RBTX4939_RESETSTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00007004) +#define RBTX4939_ETHER_BASE (IO_BASE + TXX9_CE(1) + 0x00020000) + +/* Ethernet port address */ +#define RBTX4939_ETHER_ADDR (RBTX4939_ETHER_BASE + 0x300) + +/* bits for IEN/IPOL/IFAC */ +#define RBTX4938_INTB_ISA0 0 +#define RBTX4938_INTB_ISA11 1 +#define RBTX4938_INTB_ISA12 2 +#define RBTX4938_INTB_ISA15 3 +#define RBTX4938_INTB_I2S 4 +#define RBTX4938_INTB_SW 5 +#define RBTX4938_INTF_ISA0 (1 << RBTX4938_INTB_ISA0) +#define RBTX4938_INTF_ISA11 (1 << RBTX4938_INTB_ISA11) +#define RBTX4938_INTF_ISA12 (1 << RBTX4938_INTB_ISA12) +#define RBTX4938_INTF_ISA15 (1 << RBTX4938_INTB_ISA15) +#define RBTX4938_INTF_I2S (1 << RBTX4938_INTB_I2S) +#define RBTX4938_INTF_SW (1 << RBTX4938_INTB_SW) + +/* bits for PE1,PE2,PE3 */ +#define RBTX4939_PE1_ATA(ch) (0x01 << (ch)) +#define RBTX4939_PE1_RMII(ch) (0x04 << (ch)) +#define RBTX4939_PE2_SIO0 0x01 +#define RBTX4939_PE2_SIO2 0x02 +#define RBTX4939_PE2_SIO3 0x04 +#define RBTX4939_PE2_CIR 0x08 +#define RBTX4939_PE2_SPI 0x10 +#define RBTX4939_PE2_GPIO 0x20 +#define RBTX4939_PE3_VP 0x01 +#define RBTX4939_PE3_VP_P 0x02 +#define RBTX4939_PE3_VP_S 0x04 + +#define rbtx4939_board_rev_addr ((u8 __iomem *)RBTX4939_BOARD_REV_ADDR) +#define rbtx4939_ioc_rev_addr ((u8 __iomem *)RBTX4939_IOC_REV_ADDR) +#define rbtx4939_config1_addr ((u8 __iomem *)RBTX4939_CONFIG1_ADDR) +#define rbtx4939_config2_addr ((u8 __iomem *)RBTX4939_CONFIG2_ADDR) +#define rbtx4939_config3_addr ((u8 __iomem *)RBTX4939_CONFIG3_ADDR) +#define rbtx4939_config4_addr ((u8 __iomem *)RBTX4939_CONFIG4_ADDR) +#define rbtx4939_ustat_addr ((u8 __iomem *)RBTX4939_USTAT_ADDR) +#define rbtx4939_udipsw_addr ((u8 __iomem *)RBTX4939_UDIPSW_ADDR) +#define rbtx4939_bdipsw_addr ((u8 __iomem *)RBTX4939_BDIPSW_ADDR) +#define rbtx4939_ien_addr ((u8 __iomem *)RBTX4939_IEN_ADDR) +#define rbtx4939_ipol_addr ((u8 __iomem *)RBTX4939_IPOL_ADDR) +#define rbtx4939_ifac1_addr ((u8 __iomem *)RBTX4939_IFAC1_ADDR) +#define rbtx4939_ifac2_addr ((u8 __iomem *)RBTX4939_IFAC2_ADDR) +#define rbtx4939_softint_addr ((u8 __iomem *)RBTX4939_SOFTINT_ADDR) +#define rbtx4939_isastat_addr ((u8 __iomem *)RBTX4939_ISASTAT_ADDR) +#define rbtx4939_pcistat_addr ((u8 __iomem *)RBTX4939_PCISTAT_ADDR) +#define rbtx4939_rome_addr ((u8 __iomem *)RBTX4939_ROME_ADDR) +#define rbtx4939_spics_addr ((u8 __iomem *)RBTX4939_SPICS_ADDR) +#define rbtx4939_audi_addr ((u8 __iomem *)RBTX4939_AUDI_ADDR) +#define rbtx4939_isagpio_addr ((u8 __iomem *)RBTX4939_ISAGPIO_ADDR) +#define rbtx4939_pe1_addr ((u8 __iomem *)RBTX4939_PE1_ADDR) +#define rbtx4939_pe2_addr ((u8 __iomem *)RBTX4939_PE2_ADDR) +#define rbtx4939_pe3_addr ((u8 __iomem *)RBTX4939_PE3_ADDR) +#define rbtx4939_vp_addr ((u8 __iomem *)RBTX4939_VP_ADDR) +#define rbtx4939_vpreset_addr ((u8 __iomem *)RBTX4939_VPRESET_ADDR) +#define rbtx4939_vpsout_addr ((u8 __iomem *)RBTX4939_VPSOUT_ADDR) +#define rbtx4939_vpsin_addr ((u8 __iomem *)RBTX4939_VPSIN_ADDR) +#define rbtx4939_7seg_addr(s, ch) \ + ((u8 __iomem *)RBTX4939_7SEG_ADDR(s, ch)) +#define rbtx4939_softreset_addr ((u8 __iomem *)RBTX4939_SOFTRESET_ADDR) +#define rbtx4939_reseten_addr ((u8 __iomem *)RBTX4939_RESETEN_ADDR) +#define rbtx4939_resetstat_addr ((u8 __iomem *)RBTX4939_RESETSTAT_ADDR) + +/* + * IRQ mappings + */ +#define RBTX4939_NR_IRQ_IOC 8 + +#define RBTX4939_IRQ_IOC (TXX9_IRQ_BASE + TX4939_NUM_IR) +#define RBTX4939_IRQ_END (RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC) + +/* IOC (ISA, etc) */ +#define RBTX4939_IRQ_IOCINT (TXX9_IRQ_BASE + TX4939_IR_INT(0)) +/* Onboard 10M Ether */ +#define RBTX4939_IRQ_ETHER (TXX9_IRQ_BASE + TX4939_IR_INT(1)) + +void rbtx4939_prom_init(void); +void rbtx4939_irq_setup(void); + +#endif /* __ASM_TXX9_RBTX4939_H */ From b6263ff2d6e58cc2fe615219ab2a06778b5e6cef Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Mon, 1 Sep 2008 22:22:41 +0900 Subject: [PATCH 32/49] MIPS: TXx9: Implement prom_free_prom_memory Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 7a05c34c1dec..5526375010f8 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -394,6 +395,11 @@ void __init prom_init(void) void __init prom_free_prom_memory(void) { + unsigned long saddr = PAGE_SIZE; + unsigned long eaddr = __pa_symbol(&_text); + + if (saddr < eaddr) + free_init_pages("prom memory", saddr, eaddr); } const char *get_system_type(void) From 8d2d91e86b4153cc2305ec86fe908048f459ff7f Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 11 Oct 2008 16:18:50 +0100 Subject: [PATCH 33/49] MIPS: Optimize get_user and put_user for 64-bit A long for the error value leads to unnecessary sign extensions. This patch shrinks an ip27_defconfig kernel build with gcc 4.3.0 by 2256 bytes. Signed-off-by: Ralf Baechle --- include/asm-mips/uaccess.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h index 66523d610950..b895144d577a 100644 --- a/include/asm-mips/uaccess.h +++ b/include/asm-mips/uaccess.h @@ -224,7 +224,7 @@ do { \ #define __get_user_nocheck(x, ptr, size) \ ({ \ - long __gu_err; \ + int __gu_err; \ \ __get_user_common((x), size, ptr); \ __gu_err; \ @@ -232,7 +232,7 @@ do { \ #define __get_user_check(x, ptr, size) \ ({ \ - long __gu_err = -EFAULT; \ + int __gu_err = -EFAULT; \ const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \ \ if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \ @@ -304,7 +304,7 @@ do { \ #define __put_user_nocheck(x, ptr, size) \ ({ \ __typeof__(*(ptr)) __pu_val; \ - long __pu_err = 0; \ + int __pu_err = 0; \ \ __pu_val = (x); \ switch (size) { \ @@ -321,7 +321,7 @@ do { \ ({ \ __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ __typeof__(*(ptr)) __pu_val = (x); \ - long __pu_err = -EFAULT; \ + int __pu_err = -EFAULT; \ \ if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \ switch (size) { \ From e8c7c482347574ecdd45c43e32c332d5fc2ece61 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 16 Sep 2008 19:12:16 +0200 Subject: [PATCH 34/49] MIPS: Alchemy: rename directory It's more than the au1000 these days. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 2 +- arch/mips/Makefile | 30 +++++++++---------- arch/mips/{au1000 => alchemy}/Kconfig | 0 arch/mips/{au1000 => alchemy}/common/Makefile | 0 .../common/au1xxx_irqmap.c | 0 arch/mips/{au1000 => alchemy}/common/clocks.c | 0 .../{au1000 => alchemy}/common/cputable.c | 0 arch/mips/{au1000 => alchemy}/common/dbdma.c | 0 arch/mips/{au1000 => alchemy}/common/dma.c | 0 arch/mips/{au1000 => alchemy}/common/gpio.c | 0 arch/mips/{au1000 => alchemy}/common/irq.c | 0 arch/mips/{au1000 => alchemy}/common/pci.c | 0 .../{au1000 => alchemy}/common/platform.c | 0 arch/mips/{au1000 => alchemy}/common/power.c | 0 arch/mips/{au1000 => alchemy}/common/prom.c | 0 arch/mips/{au1000 => alchemy}/common/puts.c | 0 arch/mips/{au1000 => alchemy}/common/reset.c | 0 arch/mips/{au1000 => alchemy}/common/setup.c | 0 .../mips/{au1000 => alchemy}/common/sleeper.S | 10 +++---- arch/mips/{au1000 => alchemy}/common/time.c | 0 arch/mips/{au1000 => alchemy}/db1x00/Makefile | 0 .../{au1000 => alchemy}/db1x00/board_setup.c | 0 arch/mips/{au1000 => alchemy}/db1x00/init.c | 0 arch/mips/{au1000 => alchemy}/db1x00/irqmap.c | 0 arch/mips/{au1000 => alchemy}/mtx-1/Makefile | 0 .../{au1000 => alchemy}/mtx-1/board_setup.c | 0 arch/mips/{au1000 => alchemy}/mtx-1/init.c | 0 arch/mips/{au1000 => alchemy}/mtx-1/irqmap.c | 0 .../mips/{au1000 => alchemy}/mtx-1/platform.c | 0 arch/mips/{au1000 => alchemy}/pb1000/Makefile | 0 .../{au1000 => alchemy}/pb1000/board_setup.c | 0 arch/mips/{au1000 => alchemy}/pb1000/init.c | 0 arch/mips/{au1000 => alchemy}/pb1000/irqmap.c | 0 arch/mips/{au1000 => alchemy}/pb1100/Makefile | 0 .../{au1000 => alchemy}/pb1100/board_setup.c | 0 arch/mips/{au1000 => alchemy}/pb1100/init.c | 0 arch/mips/{au1000 => alchemy}/pb1100/irqmap.c | 0 arch/mips/{au1000 => alchemy}/pb1200/Makefile | 0 .../{au1000 => alchemy}/pb1200/board_setup.c | 0 arch/mips/{au1000 => alchemy}/pb1200/init.c | 0 arch/mips/{au1000 => alchemy}/pb1200/irqmap.c | 0 .../{au1000 => alchemy}/pb1200/platform.c | 0 arch/mips/{au1000 => alchemy}/pb1500/Makefile | 0 .../{au1000 => alchemy}/pb1500/board_setup.c | 0 arch/mips/{au1000 => alchemy}/pb1500/init.c | 0 arch/mips/{au1000 => alchemy}/pb1500/irqmap.c | 0 arch/mips/{au1000 => alchemy}/pb1550/Makefile | 0 .../{au1000 => alchemy}/pb1550/board_setup.c | 0 arch/mips/{au1000 => alchemy}/pb1550/init.c | 0 arch/mips/{au1000 => alchemy}/pb1550/irqmap.c | 0 .../mips/{au1000 => alchemy}/xxs1500/Makefile | 0 .../{au1000 => alchemy}/xxs1500/board_setup.c | 0 arch/mips/{au1000 => alchemy}/xxs1500/init.c | 0 .../mips/{au1000 => alchemy}/xxs1500/irqmap.c | 0 54 files changed, 21 insertions(+), 21 deletions(-) rename arch/mips/{au1000 => alchemy}/Kconfig (100%) rename arch/mips/{au1000 => alchemy}/common/Makefile (100%) rename arch/mips/{au1000 => alchemy}/common/au1xxx_irqmap.c (100%) rename arch/mips/{au1000 => alchemy}/common/clocks.c (100%) rename arch/mips/{au1000 => alchemy}/common/cputable.c (100%) rename arch/mips/{au1000 => alchemy}/common/dbdma.c (100%) rename arch/mips/{au1000 => alchemy}/common/dma.c (100%) rename arch/mips/{au1000 => alchemy}/common/gpio.c (100%) rename arch/mips/{au1000 => alchemy}/common/irq.c (100%) rename arch/mips/{au1000 => alchemy}/common/pci.c (100%) rename arch/mips/{au1000 => alchemy}/common/platform.c (100%) rename arch/mips/{au1000 => alchemy}/common/power.c (100%) rename arch/mips/{au1000 => alchemy}/common/prom.c (100%) rename arch/mips/{au1000 => alchemy}/common/puts.c (100%) rename arch/mips/{au1000 => alchemy}/common/reset.c (100%) rename arch/mips/{au1000 => alchemy}/common/setup.c (100%) rename arch/mips/{au1000 => alchemy}/common/sleeper.S (96%) rename arch/mips/{au1000 => alchemy}/common/time.c (100%) rename arch/mips/{au1000 => alchemy}/db1x00/Makefile (100%) rename arch/mips/{au1000 => alchemy}/db1x00/board_setup.c (100%) rename arch/mips/{au1000 => alchemy}/db1x00/init.c (100%) rename arch/mips/{au1000 => alchemy}/db1x00/irqmap.c (100%) rename arch/mips/{au1000 => alchemy}/mtx-1/Makefile (100%) rename arch/mips/{au1000 => alchemy}/mtx-1/board_setup.c (100%) rename arch/mips/{au1000 => alchemy}/mtx-1/init.c (100%) rename arch/mips/{au1000 => alchemy}/mtx-1/irqmap.c (100%) rename arch/mips/{au1000 => alchemy}/mtx-1/platform.c (100%) rename arch/mips/{au1000 => alchemy}/pb1000/Makefile (100%) rename arch/mips/{au1000 => alchemy}/pb1000/board_setup.c (100%) rename arch/mips/{au1000 => alchemy}/pb1000/init.c (100%) rename arch/mips/{au1000 => alchemy}/pb1000/irqmap.c (100%) rename arch/mips/{au1000 => alchemy}/pb1100/Makefile (100%) rename arch/mips/{au1000 => alchemy}/pb1100/board_setup.c (100%) rename arch/mips/{au1000 => alchemy}/pb1100/init.c (100%) rename arch/mips/{au1000 => alchemy}/pb1100/irqmap.c (100%) rename arch/mips/{au1000 => alchemy}/pb1200/Makefile (100%) rename arch/mips/{au1000 => alchemy}/pb1200/board_setup.c (100%) rename arch/mips/{au1000 => alchemy}/pb1200/init.c (100%) rename arch/mips/{au1000 => alchemy}/pb1200/irqmap.c (100%) rename arch/mips/{au1000 => alchemy}/pb1200/platform.c (100%) rename arch/mips/{au1000 => alchemy}/pb1500/Makefile (100%) rename arch/mips/{au1000 => alchemy}/pb1500/board_setup.c (100%) rename arch/mips/{au1000 => alchemy}/pb1500/init.c (100%) rename arch/mips/{au1000 => alchemy}/pb1500/irqmap.c (100%) rename arch/mips/{au1000 => alchemy}/pb1550/Makefile (100%) rename arch/mips/{au1000 => alchemy}/pb1550/board_setup.c (100%) rename arch/mips/{au1000 => alchemy}/pb1550/init.c (100%) rename arch/mips/{au1000 => alchemy}/pb1550/irqmap.c (100%) rename arch/mips/{au1000 => alchemy}/xxs1500/Makefile (100%) rename arch/mips/{au1000 => alchemy}/xxs1500/board_setup.c (100%) rename arch/mips/{au1000 => alchemy}/xxs1500/init.c (100%) rename arch/mips/{au1000 => alchemy}/xxs1500/irqmap.c (100%) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 00a23a118492..c15416c2e89d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -598,7 +598,7 @@ config WR_PPMC endchoice -source "arch/mips/au1000/Kconfig" +source "arch/mips/alchemy/Kconfig" source "arch/mips/basler/excite/Kconfig" source "arch/mips/jazz/Kconfig" source "arch/mips/lasat/Kconfig" diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 87f67228e309..4401a0c1278c 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -176,103 +176,103 @@ load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000 # # Common Alchemy Au1x00 stuff # -core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/ +core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/ cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00 # # AMD Alchemy Pb1000 eval board # -libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/ +libs-$(CONFIG_MIPS_PB1000) += arch/mips/alchemy/pb1000/ cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00 load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000 # # AMD Alchemy Pb1100 eval board # -libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/ +libs-$(CONFIG_MIPS_PB1100) += arch/mips/alchemy/pb1100/ cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00 load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000 # # AMD Alchemy Pb1500 eval board # -libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/ +libs-$(CONFIG_MIPS_PB1500) += arch/mips/alchemy/pb1500/ cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00 load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000 # # AMD Alchemy Pb1550 eval board # -libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/ +libs-$(CONFIG_MIPS_PB1550) += arch/mips/alchemy/pb1550/ cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00 load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000 # # AMD Alchemy Pb1200 eval board # -libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/ +libs-$(CONFIG_MIPS_PB1200) += arch/mips/alchemy/pb1200/ cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00 load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000 # # AMD Alchemy Db1000 eval board # -libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/ +libs-$(CONFIG_MIPS_DB1000) += arch/mips/alchemy/db1x00/ cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00 load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000 # # AMD Alchemy Db1100 eval board # -libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/ +libs-$(CONFIG_MIPS_DB1100) += arch/mips/alchemy/db1x00/ cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00 load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000 # # AMD Alchemy Db1500 eval board # -libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/ +libs-$(CONFIG_MIPS_DB1500) += arch/mips/alchemy/db1x00/ cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00 load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000 # # AMD Alchemy Db1550 eval board # -libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/ +libs-$(CONFIG_MIPS_DB1550) += arch/mips/alchemy/db1x00/ cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00 load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000 # # AMD Alchemy Db1200 eval board # -libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/ +libs-$(CONFIG_MIPS_DB1200) += arch/mips/alchemy/pb1200/ cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00 load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000 # # AMD Alchemy Bosporus eval board # -libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/ +libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/alchemy/db1x00/ cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00 load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000 # # AMD Alchemy Mirage eval board # -libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/ +libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/alchemy/db1x00/ cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00 load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000 # # 4G-Systems eval board # -libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/ +libs-$(CONFIG_MIPS_MTX1) += arch/mips/alchemy/mtx-1/ load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000 # # MyCable eval board # -libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/ +libs-$(CONFIG_MIPS_XXS1500) += arch/mips/alchemy/xxs1500/ load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000 # diff --git a/arch/mips/au1000/Kconfig b/arch/mips/alchemy/Kconfig similarity index 100% rename from arch/mips/au1000/Kconfig rename to arch/mips/alchemy/Kconfig diff --git a/arch/mips/au1000/common/Makefile b/arch/mips/alchemy/common/Makefile similarity index 100% rename from arch/mips/au1000/common/Makefile rename to arch/mips/alchemy/common/Makefile diff --git a/arch/mips/au1000/common/au1xxx_irqmap.c b/arch/mips/alchemy/common/au1xxx_irqmap.c similarity index 100% rename from arch/mips/au1000/common/au1xxx_irqmap.c rename to arch/mips/alchemy/common/au1xxx_irqmap.c diff --git a/arch/mips/au1000/common/clocks.c b/arch/mips/alchemy/common/clocks.c similarity index 100% rename from arch/mips/au1000/common/clocks.c rename to arch/mips/alchemy/common/clocks.c diff --git a/arch/mips/au1000/common/cputable.c b/arch/mips/alchemy/common/cputable.c similarity index 100% rename from arch/mips/au1000/common/cputable.c rename to arch/mips/alchemy/common/cputable.c diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c similarity index 100% rename from arch/mips/au1000/common/dbdma.c rename to arch/mips/alchemy/common/dbdma.c diff --git a/arch/mips/au1000/common/dma.c b/arch/mips/alchemy/common/dma.c similarity index 100% rename from arch/mips/au1000/common/dma.c rename to arch/mips/alchemy/common/dma.c diff --git a/arch/mips/au1000/common/gpio.c b/arch/mips/alchemy/common/gpio.c similarity index 100% rename from arch/mips/au1000/common/gpio.c rename to arch/mips/alchemy/common/gpio.c diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/alchemy/common/irq.c similarity index 100% rename from arch/mips/au1000/common/irq.c rename to arch/mips/alchemy/common/irq.c diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/alchemy/common/pci.c similarity index 100% rename from arch/mips/au1000/common/pci.c rename to arch/mips/alchemy/common/pci.c diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/alchemy/common/platform.c similarity index 100% rename from arch/mips/au1000/common/platform.c rename to arch/mips/alchemy/common/platform.c diff --git a/arch/mips/au1000/common/power.c b/arch/mips/alchemy/common/power.c similarity index 100% rename from arch/mips/au1000/common/power.c rename to arch/mips/alchemy/common/power.c diff --git a/arch/mips/au1000/common/prom.c b/arch/mips/alchemy/common/prom.c similarity index 100% rename from arch/mips/au1000/common/prom.c rename to arch/mips/alchemy/common/prom.c diff --git a/arch/mips/au1000/common/puts.c b/arch/mips/alchemy/common/puts.c similarity index 100% rename from arch/mips/au1000/common/puts.c rename to arch/mips/alchemy/common/puts.c diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/alchemy/common/reset.c similarity index 100% rename from arch/mips/au1000/common/reset.c rename to arch/mips/alchemy/common/reset.c diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/alchemy/common/setup.c similarity index 100% rename from arch/mips/au1000/common/setup.c rename to arch/mips/alchemy/common/setup.c diff --git a/arch/mips/au1000/common/sleeper.S b/arch/mips/alchemy/common/sleeper.S similarity index 96% rename from arch/mips/au1000/common/sleeper.S rename to arch/mips/alchemy/common/sleeper.S index 4b3cf021a454..3006e270c8bc 100644 --- a/arch/mips/au1000/common/sleeper.S +++ b/arch/mips/alchemy/common/sleeper.S @@ -79,12 +79,12 @@ LEAF(save_and_sleep) /* Put SDRAM into self refresh. Preload instructions into cache, * issue a precharge, then auto refresh, then sleep commands to it. */ - la t0, sdsleep + la t0, sdsleep .set mips3 - cache 0x14, 0(t0) - cache 0x14, 32(t0) - cache 0x14, 64(t0) - cache 0x14, 96(t0) + cache 0x14, 0(t0) + cache 0x14, 32(t0) + cache 0x14, 64(t0) + cache 0x14, 96(t0) .set mips0 sdsleep: diff --git a/arch/mips/au1000/common/time.c b/arch/mips/alchemy/common/time.c similarity index 100% rename from arch/mips/au1000/common/time.c rename to arch/mips/alchemy/common/time.c diff --git a/arch/mips/au1000/db1x00/Makefile b/arch/mips/alchemy/db1x00/Makefile similarity index 100% rename from arch/mips/au1000/db1x00/Makefile rename to arch/mips/alchemy/db1x00/Makefile diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/alchemy/db1x00/board_setup.c similarity index 100% rename from arch/mips/au1000/db1x00/board_setup.c rename to arch/mips/alchemy/db1x00/board_setup.c diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/alchemy/db1x00/init.c similarity index 100% rename from arch/mips/au1000/db1x00/init.c rename to arch/mips/alchemy/db1x00/init.c diff --git a/arch/mips/au1000/db1x00/irqmap.c b/arch/mips/alchemy/db1x00/irqmap.c similarity index 100% rename from arch/mips/au1000/db1x00/irqmap.c rename to arch/mips/alchemy/db1x00/irqmap.c diff --git a/arch/mips/au1000/mtx-1/Makefile b/arch/mips/alchemy/mtx-1/Makefile similarity index 100% rename from arch/mips/au1000/mtx-1/Makefile rename to arch/mips/alchemy/mtx-1/Makefile diff --git a/arch/mips/au1000/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c similarity index 100% rename from arch/mips/au1000/mtx-1/board_setup.c rename to arch/mips/alchemy/mtx-1/board_setup.c diff --git a/arch/mips/au1000/mtx-1/init.c b/arch/mips/alchemy/mtx-1/init.c similarity index 100% rename from arch/mips/au1000/mtx-1/init.c rename to arch/mips/alchemy/mtx-1/init.c diff --git a/arch/mips/au1000/mtx-1/irqmap.c b/arch/mips/alchemy/mtx-1/irqmap.c similarity index 100% rename from arch/mips/au1000/mtx-1/irqmap.c rename to arch/mips/alchemy/mtx-1/irqmap.c diff --git a/arch/mips/au1000/mtx-1/platform.c b/arch/mips/alchemy/mtx-1/platform.c similarity index 100% rename from arch/mips/au1000/mtx-1/platform.c rename to arch/mips/alchemy/mtx-1/platform.c diff --git a/arch/mips/au1000/pb1000/Makefile b/arch/mips/alchemy/pb1000/Makefile similarity index 100% rename from arch/mips/au1000/pb1000/Makefile rename to arch/mips/alchemy/pb1000/Makefile diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/alchemy/pb1000/board_setup.c similarity index 100% rename from arch/mips/au1000/pb1000/board_setup.c rename to arch/mips/alchemy/pb1000/board_setup.c diff --git a/arch/mips/au1000/pb1000/init.c b/arch/mips/alchemy/pb1000/init.c similarity index 100% rename from arch/mips/au1000/pb1000/init.c rename to arch/mips/alchemy/pb1000/init.c diff --git a/arch/mips/au1000/pb1000/irqmap.c b/arch/mips/alchemy/pb1000/irqmap.c similarity index 100% rename from arch/mips/au1000/pb1000/irqmap.c rename to arch/mips/alchemy/pb1000/irqmap.c diff --git a/arch/mips/au1000/pb1100/Makefile b/arch/mips/alchemy/pb1100/Makefile similarity index 100% rename from arch/mips/au1000/pb1100/Makefile rename to arch/mips/alchemy/pb1100/Makefile diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/alchemy/pb1100/board_setup.c similarity index 100% rename from arch/mips/au1000/pb1100/board_setup.c rename to arch/mips/alchemy/pb1100/board_setup.c diff --git a/arch/mips/au1000/pb1100/init.c b/arch/mips/alchemy/pb1100/init.c similarity index 100% rename from arch/mips/au1000/pb1100/init.c rename to arch/mips/alchemy/pb1100/init.c diff --git a/arch/mips/au1000/pb1100/irqmap.c b/arch/mips/alchemy/pb1100/irqmap.c similarity index 100% rename from arch/mips/au1000/pb1100/irqmap.c rename to arch/mips/alchemy/pb1100/irqmap.c diff --git a/arch/mips/au1000/pb1200/Makefile b/arch/mips/alchemy/pb1200/Makefile similarity index 100% rename from arch/mips/au1000/pb1200/Makefile rename to arch/mips/alchemy/pb1200/Makefile diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/alchemy/pb1200/board_setup.c similarity index 100% rename from arch/mips/au1000/pb1200/board_setup.c rename to arch/mips/alchemy/pb1200/board_setup.c diff --git a/arch/mips/au1000/pb1200/init.c b/arch/mips/alchemy/pb1200/init.c similarity index 100% rename from arch/mips/au1000/pb1200/init.c rename to arch/mips/alchemy/pb1200/init.c diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/alchemy/pb1200/irqmap.c similarity index 100% rename from arch/mips/au1000/pb1200/irqmap.c rename to arch/mips/alchemy/pb1200/irqmap.c diff --git a/arch/mips/au1000/pb1200/platform.c b/arch/mips/alchemy/pb1200/platform.c similarity index 100% rename from arch/mips/au1000/pb1200/platform.c rename to arch/mips/alchemy/pb1200/platform.c diff --git a/arch/mips/au1000/pb1500/Makefile b/arch/mips/alchemy/pb1500/Makefile similarity index 100% rename from arch/mips/au1000/pb1500/Makefile rename to arch/mips/alchemy/pb1500/Makefile diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/alchemy/pb1500/board_setup.c similarity index 100% rename from arch/mips/au1000/pb1500/board_setup.c rename to arch/mips/alchemy/pb1500/board_setup.c diff --git a/arch/mips/au1000/pb1500/init.c b/arch/mips/alchemy/pb1500/init.c similarity index 100% rename from arch/mips/au1000/pb1500/init.c rename to arch/mips/alchemy/pb1500/init.c diff --git a/arch/mips/au1000/pb1500/irqmap.c b/arch/mips/alchemy/pb1500/irqmap.c similarity index 100% rename from arch/mips/au1000/pb1500/irqmap.c rename to arch/mips/alchemy/pb1500/irqmap.c diff --git a/arch/mips/au1000/pb1550/Makefile b/arch/mips/alchemy/pb1550/Makefile similarity index 100% rename from arch/mips/au1000/pb1550/Makefile rename to arch/mips/alchemy/pb1550/Makefile diff --git a/arch/mips/au1000/pb1550/board_setup.c b/arch/mips/alchemy/pb1550/board_setup.c similarity index 100% rename from arch/mips/au1000/pb1550/board_setup.c rename to arch/mips/alchemy/pb1550/board_setup.c diff --git a/arch/mips/au1000/pb1550/init.c b/arch/mips/alchemy/pb1550/init.c similarity index 100% rename from arch/mips/au1000/pb1550/init.c rename to arch/mips/alchemy/pb1550/init.c diff --git a/arch/mips/au1000/pb1550/irqmap.c b/arch/mips/alchemy/pb1550/irqmap.c similarity index 100% rename from arch/mips/au1000/pb1550/irqmap.c rename to arch/mips/alchemy/pb1550/irqmap.c diff --git a/arch/mips/au1000/xxs1500/Makefile b/arch/mips/alchemy/xxs1500/Makefile similarity index 100% rename from arch/mips/au1000/xxs1500/Makefile rename to arch/mips/alchemy/xxs1500/Makefile diff --git a/arch/mips/au1000/xxs1500/board_setup.c b/arch/mips/alchemy/xxs1500/board_setup.c similarity index 100% rename from arch/mips/au1000/xxs1500/board_setup.c rename to arch/mips/alchemy/xxs1500/board_setup.c diff --git a/arch/mips/au1000/xxs1500/init.c b/arch/mips/alchemy/xxs1500/init.c similarity index 100% rename from arch/mips/au1000/xxs1500/init.c rename to arch/mips/alchemy/xxs1500/init.c diff --git a/arch/mips/au1000/xxs1500/irqmap.c b/arch/mips/alchemy/xxs1500/irqmap.c similarity index 100% rename from arch/mips/au1000/xxs1500/irqmap.c rename to arch/mips/alchemy/xxs1500/irqmap.c From 384740dc49ea651ba350704d13ff6be9976e37fe Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 16 Sep 2008 19:48:51 +0200 Subject: [PATCH 35/49] MIPS: Move headfiles to new location below arch/mips/include Signed-off-by: Ralf Baechle --- arch/mips/Makefile | 84 +++++++++---------- .../asm-mips => arch/mips/include/asm}/Kbuild | 0 .../mips/include/asm}/a.out.h | 0 .../asm-mips => arch/mips/include/asm}/abi.h | 0 .../mips/include/asm}/addrspace.h | 0 .../asm-mips => arch/mips/include/asm}/asm.h | 0 .../mips/include/asm}/asmmacro-32.h | 0 .../mips/include/asm}/asmmacro-64.h | 0 .../mips/include/asm}/asmmacro.h | 0 .../mips/include/asm}/atomic.h | 0 .../mips/include/asm}/auxvec.h | 0 .../mips/include/asm}/barrier.h | 0 .../mips/include/asm}/bcache.h | 0 .../mips/include/asm}/bitops.h | 0 .../mips/include/asm}/bootinfo.h | 0 .../mips/include/asm}/branch.h | 0 .../mips/include/asm}/break.h | 0 .../asm-mips => arch/mips/include/asm}/bug.h | 0 .../asm-mips => arch/mips/include/asm}/bugs.h | 0 .../mips/include/asm}/byteorder.h | 0 .../mips/include/asm}/cache.h | 0 .../mips/include/asm}/cachectl.h | 0 .../mips/include/asm}/cacheflush.h | 0 .../mips/include/asm}/cacheops.h | 0 .../mips/include/asm}/checksum.h | 0 .../asm-mips => arch/mips/include/asm}/cmp.h | 0 .../mips/include/asm}/cmpxchg.h | 0 .../mips/include/asm}/compat-signal.h | 0 .../mips/include/asm}/compat.h | 0 .../mips/include/asm}/compiler.h | 0 .../mips/include/asm}/cpu-features.h | 0 .../mips/include/asm}/cpu-info.h | 0 .../asm-mips => arch/mips/include/asm}/cpu.h | 0 .../mips/include/asm}/cputime.h | 0 .../mips/include/asm}/current.h | 0 .../mips/include/asm}/debug.h | 0 .../mips/include/asm}/dec/ecc.h | 0 .../mips/include/asm}/dec/interrupts.h | 0 .../mips/include/asm}/dec/ioasic.h | 0 .../mips/include/asm}/dec/ioasic_addrs.h | 0 .../mips/include/asm}/dec/ioasic_ints.h | 0 .../mips/include/asm}/dec/kn01.h | 0 .../mips/include/asm}/dec/kn02.h | 0 .../mips/include/asm}/dec/kn02ba.h | 0 .../mips/include/asm}/dec/kn02ca.h | 0 .../mips/include/asm}/dec/kn02xa.h | 0 .../mips/include/asm}/dec/kn03.h | 0 .../mips/include/asm}/dec/kn05.h | 0 .../mips/include/asm}/dec/kn230.h | 0 .../mips/include/asm}/dec/machtype.h | 0 .../mips/include/asm}/dec/prom.h | 0 .../mips/include/asm}/dec/system.h | 0 .../mips/include/asm}/delay.h | 0 .../mips/include/asm}/device.h | 0 .../mips/include/asm}/div64.h | 0 .../mips/include/asm}/dma-mapping.h | 0 .../asm-mips => arch/mips/include/asm}/dma.h | 0 .../mips/include/asm}/ds1286.h | 0 .../mips/include/asm}/ds1287.h | 0 .../asm-mips => arch/mips/include/asm}/dsp.h | 0 .../asm-mips => arch/mips/include/asm}/edac.h | 0 .../asm-mips => arch/mips/include/asm}/elf.h | 0 .../mips/include/asm}/emergency-restart.h | 0 .../mips/include/asm}/emma2rh/emma2rh.h | 0 .../mips/include/asm}/emma2rh/markeins.h | 0 .../mips/include/asm}/errno.h | 0 .../asm-mips => arch/mips/include/asm}/fb.h | 0 .../mips/include/asm}/fcntl.h | 0 .../mips/include/asm}/fixmap.h | 0 .../mips/include/asm}/floppy.h | 0 .../mips/include/asm}/fpregdef.h | 0 .../asm-mips => arch/mips/include/asm}/fpu.h | 0 .../mips/include/asm}/fpu_emulator.h | 0 .../mips/include/asm}/futex.h | 0 .../mips/include/asm}/fw/arc/hinv.h | 0 .../mips/include/asm}/fw/arc/types.h | 0 .../mips/include/asm}/fw/cfe/cfe_api.h | 0 .../mips/include/asm}/fw/cfe/cfe_error.h | 0 .../mips/include/asm}/gcmpregs.h | 0 .../asm-mips => arch/mips/include/asm}/gic.h | 0 .../asm-mips => arch/mips/include/asm}/gpio.h | 0 .../mips/include/asm}/gt64120.h | 0 .../mips/include/asm}/hardirq.h | 0 .../mips/include/asm}/hazards.h | 0 .../mips/include/asm}/highmem.h | 0 .../mips/include/asm}/hw_irq.h | 0 .../mips/include/asm}/i8253.h | 0 .../mips/include/asm}/i8259.h | 0 .../asm-mips => arch/mips/include/asm}/ide.h | 0 .../asm-mips => arch/mips/include/asm}/inst.h | 0 .../asm-mips => arch/mips/include/asm}/io.h | 0 .../mips/include/asm}/ioctl.h | 0 .../mips/include/asm}/ioctls.h | 0 .../mips/include/asm}/ip32/crime.h | 0 .../mips/include/asm}/ip32/ip32_ints.h | 0 .../mips/include/asm}/ip32/mace.h | 0 .../mips/include/asm}/ipcbuf.h | 0 .../asm-mips => arch/mips/include/asm}/irq.h | 0 .../mips/include/asm}/irq_cpu.h | 0 .../mips/include/asm}/irq_gt641xx.h | 0 .../mips/include/asm}/irq_regs.h | 0 .../mips/include/asm}/irqflags.h | 0 .../mips/include/asm}/isadep.h | 0 .../asm-mips => arch/mips/include/asm}/jazz.h | 0 .../mips/include/asm}/jazzdma.h | 0 .../mips/include/asm}/kdebug.h | 0 .../mips/include/asm}/kexec.h | 0 .../asm-mips => arch/mips/include/asm}/kgdb.h | 0 .../mips/include/asm}/kmap_types.h | 0 .../asm-mips => arch/mips/include/asm}/kspd.h | 0 .../mips/include/asm}/lasat/ds1603.h | 0 .../mips/include/asm}/lasat/eeprom.h | 0 .../mips/include/asm}/lasat/head.h | 0 .../mips/include/asm}/lasat/lasat.h | 0 .../mips/include/asm}/lasat/lasatint.h | 0 .../mips/include/asm}/lasat/picvue.h | 0 .../mips/include/asm}/lasat/serial.h | 0 .../mips/include/asm}/linkage.h | 0 .../mips/include/asm}/local.h | 0 .../mips/include/asm}/m48t35.h | 0 .../mips/include/asm}/m48t37.h | 0 .../mips/include/asm}/mach-au1x00/au1000.h | 0 .../include/asm}/mach-au1x00/au1000_dma.h | 0 .../include/asm}/mach-au1x00/au1000_gpio.h | 0 .../include/asm}/mach-au1x00/au1100_mmc.h | 0 .../include/asm}/mach-au1x00/au1550_spi.h | 0 .../mips/include/asm}/mach-au1x00/au1xxx.h | 0 .../include/asm}/mach-au1x00/au1xxx_dbdma.h | 0 .../include/asm}/mach-au1x00/au1xxx_ide.h | 0 .../include/asm}/mach-au1x00/au1xxx_psc.h | 0 .../mips/include/asm}/mach-au1x00/gpio.h | 0 .../mips/include/asm}/mach-au1x00/ioremap.h | 0 .../mips/include/asm}/mach-au1x00/prom.h | 0 .../mips/include/asm}/mach-au1x00/war.h | 0 .../mips/include/asm}/mach-bcm47xx/bcm47xx.h | 0 .../mips/include/asm}/mach-bcm47xx/gpio.h | 0 .../mips/include/asm}/mach-bcm47xx/war.h | 0 .../mips/include/asm}/mach-cobalt/cobalt.h | 0 .../asm}/mach-cobalt/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-cobalt/irq.h | 0 .../include/asm}/mach-cobalt/mach-gt64120.h | 0 .../mips/include/asm}/mach-cobalt/war.h | 0 .../mips/include/asm}/mach-db1x00/db1200.h | 0 .../mips/include/asm}/mach-db1x00/db1x00.h | 0 .../mips/include/asm}/mach-dec/mc146818rtc.h | 0 .../mips/include/asm}/mach-dec/war.h | 0 .../mips/include/asm}/mach-emma2rh/irq.h | 0 .../mips/include/asm}/mach-emma2rh/war.h | 0 .../asm}/mach-excite/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-excite/excite.h | 0 .../include/asm}/mach-excite/excite_fpga.h | 0 .../asm}/mach-excite/excite_nandflash.h | 0 .../mips/include/asm}/mach-excite/rm9k_eth.h | 0 .../mips/include/asm}/mach-excite/rm9k_wdt.h | 0 .../include/asm}/mach-excite/rm9k_xicap.h | 0 .../mips/include/asm}/mach-excite/war.h | 0 .../asm}/mach-generic/cpu-feature-overrides.h | 0 .../include/asm}/mach-generic/dma-coherence.h | 0 .../mips/include/asm}/mach-generic/floppy.h | 0 .../mips/include/asm}/mach-generic/gpio.h | 0 .../mips/include/asm}/mach-generic/ide.h | 0 .../mips/include/asm}/mach-generic/ioremap.h | 0 .../mips/include/asm}/mach-generic/irq.h | 0 .../asm}/mach-generic/kernel-entry-init.h | 0 .../mips/include/asm}/mach-generic/kmalloc.h | 0 .../include/asm}/mach-generic/mangle-port.h | 0 .../include/asm}/mach-generic/mc146818rtc.h | 0 .../mips/include/asm}/mach-generic/spaces.h | 0 .../mips/include/asm}/mach-generic/topology.h | 0 .../asm}/mach-ip22/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-ip22/ds1286.h | 0 .../mips/include/asm}/mach-ip22/spaces.h | 0 .../mips/include/asm}/mach-ip22/war.h | 0 .../asm}/mach-ip27/cpu-feature-overrides.h | 0 .../include/asm}/mach-ip27/dma-coherence.h | 0 .../mips/include/asm}/mach-ip27/irq.h | 0 .../asm}/mach-ip27/kernel-entry-init.h | 0 .../mips/include/asm}/mach-ip27/kmalloc.h | 0 .../mips/include/asm}/mach-ip27/mangle-port.h | 0 .../mips/include/asm}/mach-ip27/mmzone.h | 0 .../mips/include/asm}/mach-ip27/spaces.h | 0 .../mips/include/asm}/mach-ip27/topology.h | 0 .../mips/include/asm}/mach-ip27/war.h | 0 .../asm}/mach-ip28/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-ip28/ds1286.h | 0 .../mips/include/asm}/mach-ip28/spaces.h | 0 .../mips/include/asm}/mach-ip28/war.h | 0 .../asm}/mach-ip32/cpu-feature-overrides.h | 0 .../include/asm}/mach-ip32/dma-coherence.h | 0 .../mips/include/asm}/mach-ip32/kmalloc.h | 0 .../mips/include/asm}/mach-ip32/mangle-port.h | 0 .../mips/include/asm}/mach-ip32/mc146818rtc.h | 0 .../mips/include/asm}/mach-ip32/war.h | 0 .../include/asm}/mach-jazz/dma-coherence.h | 0 .../mips/include/asm}/mach-jazz/floppy.h | 0 .../mips/include/asm}/mach-jazz/mc146818rtc.h | 0 .../mips/include/asm}/mach-jazz/war.h | 0 .../mips/include/asm}/mach-lasat/irq.h | 0 .../include/asm}/mach-lasat/mach-gt64120.h | 0 .../mips/include/asm}/mach-lasat/war.h | 0 .../include/asm}/mach-lemote/dma-coherence.h | 0 .../include/asm}/mach-lemote/mc146818rtc.h | 0 .../mips/include/asm}/mach-lemote/war.h | 0 .../asm}/mach-malta/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-malta/irq.h | 0 .../asm}/mach-malta/kernel-entry-init.h | 0 .../include/asm}/mach-malta/mach-gt64120.h | 0 .../include/asm}/mach-malta/mc146818rtc.h | 0 .../mips/include/asm}/mach-malta/war.h | 0 .../asm}/mach-mipssim/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-mipssim/war.h | 0 .../include/asm}/mach-pb1x00/mc146818rtc.h | 0 .../mips/include/asm}/mach-pb1x00/pb1000.h | 0 .../mips/include/asm}/mach-pb1x00/pb1100.h | 0 .../mips/include/asm}/mach-pb1x00/pb1200.h | 0 .../mips/include/asm}/mach-pb1x00/pb1500.h | 0 .../mips/include/asm}/mach-pb1x00/pb1550.h | 0 .../mips/include/asm}/mach-pnx8550/cm.h | 0 .../mips/include/asm}/mach-pnx8550/glb.h | 0 .../mips/include/asm}/mach-pnx8550/int.h | 0 .../asm}/mach-pnx8550/kernel-entry-init.h | 0 .../mips/include/asm}/mach-pnx8550/nand.h | 0 .../mips/include/asm}/mach-pnx8550/pci.h | 0 .../mips/include/asm}/mach-pnx8550/uart.h | 0 .../mips/include/asm}/mach-pnx8550/usb.h | 0 .../mips/include/asm}/mach-pnx8550/war.h | 0 .../asm}/mach-rc32434/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-rc32434/ddr.h | 0 .../mips/include/asm}/mach-rc32434/dma.h | 0 .../mips/include/asm}/mach-rc32434/dma_v.h | 0 .../mips/include/asm}/mach-rc32434/eth.h | 0 .../mips/include/asm}/mach-rc32434/gpio.h | 0 .../mips/include/asm}/mach-rc32434/integ.h | 0 .../mips/include/asm}/mach-rc32434/irq.h | 0 .../mips/include/asm}/mach-rc32434/pci.h | 0 .../mips/include/asm}/mach-rc32434/prom.h | 0 .../mips/include/asm}/mach-rc32434/rb.h | 0 .../mips/include/asm}/mach-rc32434/rc32434.h | 0 .../mips/include/asm}/mach-rc32434/timer.h | 0 .../mips/include/asm}/mach-rc32434/war.h | 0 .../asm}/mach-rm/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-rm/mc146818rtc.h | 0 .../mips/include/asm}/mach-rm/war.h | 0 .../asm}/mach-sibyte/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-sibyte/war.h | 0 .../mips/include/asm}/mach-tx39xx/ioremap.h | 0 .../include/asm}/mach-tx39xx/mangle-port.h | 0 .../mips/include/asm}/mach-tx39xx/war.h | 0 .../asm}/mach-tx49xx/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-tx49xx/ioremap.h | 0 .../mips/include/asm}/mach-tx49xx/kmalloc.h | 0 .../mips/include/asm}/mach-tx49xx/war.h | 0 .../mips/include/asm}/mach-vr41xx/irq.h | 0 .../mips/include/asm}/mach-vr41xx/war.h | 0 .../include/asm}/mach-wrppmc/mach-gt64120.h | 0 .../mips/include/asm}/mach-wrppmc/war.h | 0 .../mach-yosemite/cpu-feature-overrides.h | 0 .../mips/include/asm}/mach-yosemite/war.h | 0 .../mips/include/asm}/mc146818-time.h | 0 .../mips/include/asm}/mc146818rtc.h | 0 .../mips/include/asm}/mips-boards/bonito64.h | 0 .../mips/include/asm}/mips-boards/generic.h | 0 .../mips/include/asm}/mips-boards/launch.h | 0 .../mips/include/asm}/mips-boards/malta.h | 0 .../mips/include/asm}/mips-boards/maltaint.h | 0 .../mips/include/asm}/mips-boards/msc01_pci.h | 0 .../mips/include/asm}/mips-boards/piix4.h | 0 .../mips/include/asm}/mips-boards/prom.h | 0 .../mips/include/asm}/mips-boards/sim.h | 0 .../mips/include/asm}/mips-boards/simint.h | 0 .../mips/include/asm}/mips_mt.h | 0 .../mips/include/asm}/mipsmtregs.h | 0 .../mips/include/asm}/mipsprom.h | 0 .../mips/include/asm}/mipsregs.h | 0 .../asm-mips => arch/mips/include/asm}/mman.h | 0 .../asm-mips => arch/mips/include/asm}/mmu.h | 0 .../mips/include/asm}/mmu_context.h | 8 +- .../mips/include/asm}/mmzone.h | 0 .../mips/include/asm}/module.h | 0 .../mips/include/asm}/msc01_ic.h | 0 .../mips/include/asm}/msgbuf.h | 0 .../mips/include/asm}/mutex.h | 0 .../mips/include/asm}/nile4.h | 0 .../mips/include/asm}/paccess.h | 0 .../asm-mips => arch/mips/include/asm}/page.h | 0 .../mips/include/asm}/param.h | 0 .../mips/include/asm}/parport.h | 0 .../asm-mips => arch/mips/include/asm}/pci.h | 0 .../mips/include/asm}/pci/bridge.h | 0 .../mips/include/asm}/percpu.h | 0 .../mips/include/asm}/pgalloc.h | 0 .../mips/include/asm}/pgtable-32.h | 0 .../mips/include/asm}/pgtable-64.h | 0 .../mips/include/asm}/pgtable-bits.h | 0 .../mips/include/asm}/pgtable.h | 0 .../include/asm}/pmc-sierra/msp71xx/gpio.h | 0 .../asm}/pmc-sierra/msp71xx/msp_cic_int.h | 0 .../include/asm}/pmc-sierra/msp71xx/msp_int.h | 0 .../include/asm}/pmc-sierra/msp71xx/msp_pci.h | 0 .../asm}/pmc-sierra/msp71xx/msp_prom.h | 0 .../asm}/pmc-sierra/msp71xx/msp_regops.h | 0 .../asm}/pmc-sierra/msp71xx/msp_regs.h | 0 .../asm}/pmc-sierra/msp71xx/msp_slp_int.h | 0 .../include/asm}/pmc-sierra/msp71xx/war.h | 0 .../asm-mips => arch/mips/include/asm}/pmon.h | 0 .../asm-mips => arch/mips/include/asm}/poll.h | 0 .../mips/include/asm}/posix_types.h | 0 .../mips/include/asm}/prefetch.h | 0 .../mips/include/asm}/processor.h | 0 .../mips/include/asm}/ptrace.h | 0 .../mips/include/asm}/r4k-timer.h | 0 .../mips/include/asm}/r4kcache.h | 0 .../mips/include/asm}/reboot.h | 0 .../asm-mips => arch/mips/include/asm}/reg.h | 0 .../mips/include/asm}/regdef.h | 0 .../mips/include/asm}/resource.h | 0 .../mips/include/asm}/rm9k-ocd.h | 0 .../asm-mips => arch/mips/include/asm}/rtlx.h | 0 .../mips/include/asm}/scatterlist.h | 0 .../mips/include/asm}/seccomp.h | 0 .../mips/include/asm}/sections.h | 0 .../mips/include/asm}/segment.h | 0 .../mips/include/asm}/sembuf.h | 0 .../mips/include/asm}/serial.h | 0 .../mips/include/asm}/setup.h | 0 .../mips/include/asm}/sgi/gio.h | 0 .../mips/include/asm}/sgi/hpc3.h | 0 .../mips/include/asm}/sgi/ioc.h | 0 .../mips/include/asm}/sgi/ip22.h | 0 .../mips/include/asm}/sgi/mc.h | 0 .../mips/include/asm}/sgi/pi1.h | 0 .../mips/include/asm}/sgi/seeq.h | 0 .../mips/include/asm}/sgi/sgi.h | 0 .../mips/include/asm}/sgi/wd.h | 0 .../mips/include/asm}/sgialib.h | 0 .../mips/include/asm}/sgiarcs.h | 0 .../mips/include/asm}/sgidefs.h | 0 .../mips/include/asm}/shmbuf.h | 0 .../mips/include/asm}/shmparam.h | 0 .../mips/include/asm}/sibyte/bcm1480_int.h | 0 .../mips/include/asm}/sibyte/bcm1480_l2c.h | 0 .../mips/include/asm}/sibyte/bcm1480_mc.h | 0 .../mips/include/asm}/sibyte/bcm1480_regs.h | 0 .../mips/include/asm}/sibyte/bcm1480_scd.h | 0 .../mips/include/asm}/sibyte/bigsur.h | 0 .../mips/include/asm}/sibyte/board.h | 0 .../mips/include/asm}/sibyte/carmel.h | 0 .../mips/include/asm}/sibyte/sb1250.h | 0 .../mips/include/asm}/sibyte/sb1250_defs.h | 0 .../mips/include/asm}/sibyte/sb1250_dma.h | 0 .../mips/include/asm}/sibyte/sb1250_genbus.h | 0 .../mips/include/asm}/sibyte/sb1250_int.h | 0 .../mips/include/asm}/sibyte/sb1250_l2c.h | 0 .../mips/include/asm}/sibyte/sb1250_ldt.h | 0 .../mips/include/asm}/sibyte/sb1250_mac.h | 0 .../mips/include/asm}/sibyte/sb1250_mc.h | 0 .../mips/include/asm}/sibyte/sb1250_regs.h | 0 .../mips/include/asm}/sibyte/sb1250_scd.h | 0 .../mips/include/asm}/sibyte/sb1250_smbus.h | 0 .../mips/include/asm}/sibyte/sb1250_syncser.h | 0 .../mips/include/asm}/sibyte/sb1250_uart.h | 0 .../mips/include/asm}/sibyte/sentosa.h | 0 .../mips/include/asm}/sibyte/swarm.h | 0 .../mips/include/asm}/sigcontext.h | 0 .../mips/include/asm}/siginfo.h | 0 .../mips/include/asm}/signal.h | 0 .../asm-mips => arch/mips/include/asm}/sim.h | 0 .../mips/include/asm}/smp-ops.h | 0 .../asm-mips => arch/mips/include/asm}/smp.h | 0 .../asm-mips => arch/mips/include/asm}/smtc.h | 0 .../mips/include/asm}/smtc_ipi.h | 0 .../mips/include/asm}/smtc_proc.h | 0 .../asm-mips => arch/mips/include/asm}/smvp.h | 0 .../mips/include/asm}/sn/addrs.h | 0 .../mips/include/asm}/sn/agent.h | 0 .../mips/include/asm}/sn/arch.h | 0 .../mips/include/asm}/sn/fru.h | 0 .../mips/include/asm}/sn/gda.h | 0 .../mips/include/asm}/sn/hub.h | 0 .../mips/include/asm}/sn/intr.h | 0 .../mips/include/asm}/sn/io.h | 0 .../mips/include/asm}/sn/ioc3.h | 0 .../mips/include/asm}/sn/klconfig.h | 36 ++++---- .../mips/include/asm}/sn/kldir.h | 0 .../mips/include/asm}/sn/klkernvars.h | 0 .../mips/include/asm}/sn/launch.h | 0 .../mips/include/asm}/sn/mapped_kernel.h | 0 .../mips/include/asm}/sn/nmi.h | 0 .../mips/include/asm}/sn/sn0/addrs.h | 0 .../mips/include/asm}/sn/sn0/arch.h | 0 .../mips/include/asm}/sn/sn0/hub.h | 0 .../mips/include/asm}/sn/sn0/hubio.h | 36 ++++---- .../mips/include/asm}/sn/sn0/hubmd.h | 0 .../mips/include/asm}/sn/sn0/hubni.h | 0 .../mips/include/asm}/sn/sn0/hubpi.h | 0 .../mips/include/asm}/sn/sn0/ip27.h | 0 .../mips/include/asm}/sn/sn_private.h | 0 .../mips/include/asm}/sn/types.h | 0 .../asm-mips => arch/mips/include/asm}/sni.h | 0 .../mips/include/asm}/socket.h | 0 .../mips/include/asm}/sockios.h | 0 .../mips/include/asm}/sparsemem.h | 0 .../mips/include/asm}/spinlock.h | 0 .../mips/include/asm}/spinlock_types.h | 0 .../mips/include/asm}/stackframe.h | 0 .../mips/include/asm}/stacktrace.h | 0 .../asm-mips => arch/mips/include/asm}/stat.h | 0 .../mips/include/asm}/statfs.h | 0 .../mips/include/asm}/string.h | 0 .../mips/include/asm}/suspend.h | 0 .../mips/include/asm}/sysmips.h | 0 .../mips/include/asm}/system.h | 0 .../mips/include/asm}/termbits.h | 0 .../mips/include/asm}/termios.h | 0 .../mips/include/asm}/thread_info.h | 0 .../asm-mips => arch/mips/include/asm}/time.h | 0 .../mips/include/asm}/timex.h | 0 .../mips/include/asm}/titan_dep.h | 0 .../asm-mips => arch/mips/include/asm}/tlb.h | 0 .../mips/include/asm}/tlbdebug.h | 0 .../mips/include/asm}/tlbflush.h | 0 .../mips/include/asm}/topology.h | 0 .../mips/include/asm}/traps.h | 0 .../mips/include/asm}/txx9/boards.h | 0 .../mips/include/asm}/txx9/generic.h | 0 .../mips/include/asm}/txx9/jmr3927.h | 0 .../mips/include/asm}/txx9/pci.h | 0 .../mips/include/asm}/txx9/rbtx4927.h | 0 .../mips/include/asm}/txx9/rbtx4938.h | 0 .../mips/include/asm}/txx9/rbtx4939.h | 0 .../mips/include/asm}/txx9/smsc_fdc37m81x.h | 0 .../mips/include/asm}/txx9/spi.h | 0 .../mips/include/asm}/txx9/tx3927.h | 0 .../mips/include/asm}/txx9/tx4927.h | 0 .../mips/include/asm}/txx9/tx4927pcic.h | 0 .../mips/include/asm}/txx9/tx4938.h | 0 .../mips/include/asm}/txx9/tx4939.h | 0 .../mips/include/asm}/txx9irq.h | 0 .../mips/include/asm}/txx9pio.h | 0 .../mips/include/asm}/txx9tmr.h | 0 .../mips/include/asm}/types.h | 0 .../mips/include/asm}/uaccess.h | 0 .../mips/include/asm}/ucontext.h | 0 .../mips/include/asm}/unaligned.h | 0 .../mips/include/asm}/unistd.h | 0 .../asm-mips => arch/mips/include/asm}/user.h | 0 .../asm-mips => arch/mips/include/asm}/vga.h | 0 .../asm-mips => arch/mips/include/asm}/vpe.h | 0 .../mips/include/asm}/vr41xx/capcella.h | 0 .../mips/include/asm}/vr41xx/giu.h | 0 .../mips/include/asm}/vr41xx/irq.h | 0 .../mips/include/asm}/vr41xx/mpc30x.h | 0 .../mips/include/asm}/vr41xx/pci.h | 0 .../mips/include/asm}/vr41xx/siu.h | 0 .../mips/include/asm}/vr41xx/tb0219.h | 0 .../mips/include/asm}/vr41xx/tb0226.h | 0 .../mips/include/asm}/vr41xx/tb0287.h | 0 .../mips/include/asm}/vr41xx/vr41xx.h | 0 .../asm-mips => arch/mips/include/asm}/war.h | 0 .../mips/include/asm}/wbflush.h | 0 .../asm-mips => arch/mips/include/asm}/xor.h | 0 .../mips/include/asm}/xtalk/xtalk.h | 0 .../mips/include/asm}/xtalk/xwidget.h | 0 463 files changed, 82 insertions(+), 82 deletions(-) rename {include/asm-mips => arch/mips/include/asm}/Kbuild (100%) rename {include/asm-mips => arch/mips/include/asm}/a.out.h (100%) rename {include/asm-mips => arch/mips/include/asm}/abi.h (100%) rename {include/asm-mips => arch/mips/include/asm}/addrspace.h (100%) rename {include/asm-mips => arch/mips/include/asm}/asm.h (100%) rename {include/asm-mips => arch/mips/include/asm}/asmmacro-32.h (100%) rename {include/asm-mips => arch/mips/include/asm}/asmmacro-64.h (100%) rename {include/asm-mips => arch/mips/include/asm}/asmmacro.h (100%) rename {include/asm-mips => arch/mips/include/asm}/atomic.h (100%) rename {include/asm-mips => arch/mips/include/asm}/auxvec.h (100%) rename {include/asm-mips => arch/mips/include/asm}/barrier.h (100%) rename {include/asm-mips => arch/mips/include/asm}/bcache.h (100%) rename {include/asm-mips => arch/mips/include/asm}/bitops.h (100%) rename {include/asm-mips => arch/mips/include/asm}/bootinfo.h (100%) rename {include/asm-mips => arch/mips/include/asm}/branch.h (100%) rename {include/asm-mips => arch/mips/include/asm}/break.h (100%) rename {include/asm-mips => arch/mips/include/asm}/bug.h (100%) rename {include/asm-mips => arch/mips/include/asm}/bugs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/byteorder.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cache.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cachectl.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cacheflush.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cacheops.h (100%) rename {include/asm-mips => arch/mips/include/asm}/checksum.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cmp.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cmpxchg.h (100%) rename {include/asm-mips => arch/mips/include/asm}/compat-signal.h (100%) rename {include/asm-mips => arch/mips/include/asm}/compat.h (100%) rename {include/asm-mips => arch/mips/include/asm}/compiler.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cpu-features.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cpu-info.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cpu.h (100%) rename {include/asm-mips => arch/mips/include/asm}/cputime.h (100%) rename {include/asm-mips => arch/mips/include/asm}/current.h (100%) rename {include/asm-mips => arch/mips/include/asm}/debug.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/ecc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/interrupts.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/ioasic.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/ioasic_addrs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/ioasic_ints.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/kn01.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/kn02.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/kn02ba.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/kn02ca.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/kn02xa.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/kn03.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/kn05.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/kn230.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/machtype.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/prom.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dec/system.h (100%) rename {include/asm-mips => arch/mips/include/asm}/delay.h (100%) rename {include/asm-mips => arch/mips/include/asm}/device.h (100%) rename {include/asm-mips => arch/mips/include/asm}/div64.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dma-mapping.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dma.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ds1286.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ds1287.h (100%) rename {include/asm-mips => arch/mips/include/asm}/dsp.h (100%) rename {include/asm-mips => arch/mips/include/asm}/edac.h (100%) rename {include/asm-mips => arch/mips/include/asm}/elf.h (100%) rename {include/asm-mips => arch/mips/include/asm}/emergency-restart.h (100%) rename {include/asm-mips => arch/mips/include/asm}/emma2rh/emma2rh.h (100%) rename {include/asm-mips => arch/mips/include/asm}/emma2rh/markeins.h (100%) rename {include/asm-mips => arch/mips/include/asm}/errno.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fb.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fcntl.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fixmap.h (100%) rename {include/asm-mips => arch/mips/include/asm}/floppy.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fpregdef.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fpu.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fpu_emulator.h (100%) rename {include/asm-mips => arch/mips/include/asm}/futex.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fw/arc/hinv.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fw/arc/types.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fw/cfe/cfe_api.h (100%) rename {include/asm-mips => arch/mips/include/asm}/fw/cfe/cfe_error.h (100%) rename {include/asm-mips => arch/mips/include/asm}/gcmpregs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/gic.h (100%) rename {include/asm-mips => arch/mips/include/asm}/gpio.h (100%) rename {include/asm-mips => arch/mips/include/asm}/gt64120.h (100%) rename {include/asm-mips => arch/mips/include/asm}/hardirq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/hazards.h (100%) rename {include/asm-mips => arch/mips/include/asm}/highmem.h (100%) rename {include/asm-mips => arch/mips/include/asm}/hw_irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/i8253.h (100%) rename {include/asm-mips => arch/mips/include/asm}/i8259.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ide.h (100%) rename {include/asm-mips => arch/mips/include/asm}/inst.h (100%) rename {include/asm-mips => arch/mips/include/asm}/io.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ioctl.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ioctls.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ip32/crime.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ip32/ip32_ints.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ip32/mace.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ipcbuf.h (100%) rename {include/asm-mips => arch/mips/include/asm}/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/irq_cpu.h (100%) rename {include/asm-mips => arch/mips/include/asm}/irq_gt641xx.h (100%) rename {include/asm-mips => arch/mips/include/asm}/irq_regs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/irqflags.h (100%) rename {include/asm-mips => arch/mips/include/asm}/isadep.h (100%) rename {include/asm-mips => arch/mips/include/asm}/jazz.h (100%) rename {include/asm-mips => arch/mips/include/asm}/jazzdma.h (100%) rename {include/asm-mips => arch/mips/include/asm}/kdebug.h (100%) rename {include/asm-mips => arch/mips/include/asm}/kexec.h (100%) rename {include/asm-mips => arch/mips/include/asm}/kgdb.h (100%) rename {include/asm-mips => arch/mips/include/asm}/kmap_types.h (100%) rename {include/asm-mips => arch/mips/include/asm}/kspd.h (100%) rename {include/asm-mips => arch/mips/include/asm}/lasat/ds1603.h (100%) rename {include/asm-mips => arch/mips/include/asm}/lasat/eeprom.h (100%) rename {include/asm-mips => arch/mips/include/asm}/lasat/head.h (100%) rename {include/asm-mips => arch/mips/include/asm}/lasat/lasat.h (100%) rename {include/asm-mips => arch/mips/include/asm}/lasat/lasatint.h (100%) rename {include/asm-mips => arch/mips/include/asm}/lasat/picvue.h (100%) rename {include/asm-mips => arch/mips/include/asm}/lasat/serial.h (100%) rename {include/asm-mips => arch/mips/include/asm}/linkage.h (100%) rename {include/asm-mips => arch/mips/include/asm}/local.h (100%) rename {include/asm-mips => arch/mips/include/asm}/m48t35.h (100%) rename {include/asm-mips => arch/mips/include/asm}/m48t37.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/au1000.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/au1000_dma.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/au1000_gpio.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/au1100_mmc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/au1550_spi.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/au1xxx.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/au1xxx_dbdma.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/au1xxx_ide.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/au1xxx_psc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/gpio.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/ioremap.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/prom.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-au1x00/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-bcm47xx/bcm47xx.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-bcm47xx/gpio.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-bcm47xx/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-cobalt/cobalt.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-cobalt/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-cobalt/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-cobalt/mach-gt64120.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-cobalt/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-db1x00/db1200.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-db1x00/db1x00.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-dec/mc146818rtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-dec/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-emma2rh/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-emma2rh/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-excite/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-excite/excite.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-excite/excite_fpga.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-excite/excite_nandflash.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-excite/rm9k_eth.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-excite/rm9k_wdt.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-excite/rm9k_xicap.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-excite/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/dma-coherence.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/floppy.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/gpio.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/ide.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/ioremap.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/kernel-entry-init.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/kmalloc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/mangle-port.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/mc146818rtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/spaces.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-generic/topology.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip22/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip22/ds1286.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip22/spaces.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip22/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/dma-coherence.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/kernel-entry-init.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/kmalloc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/mangle-port.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/mmzone.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/spaces.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/topology.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip27/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip28/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip28/ds1286.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip28/spaces.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip28/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip32/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip32/dma-coherence.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip32/kmalloc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip32/mangle-port.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip32/mc146818rtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-ip32/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-jazz/dma-coherence.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-jazz/floppy.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-jazz/mc146818rtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-jazz/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-lasat/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-lasat/mach-gt64120.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-lasat/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-lemote/dma-coherence.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-lemote/mc146818rtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-lemote/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-malta/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-malta/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-malta/kernel-entry-init.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-malta/mach-gt64120.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-malta/mc146818rtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-malta/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-mipssim/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-mipssim/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pb1x00/mc146818rtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pb1x00/pb1000.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pb1x00/pb1100.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pb1x00/pb1200.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pb1x00/pb1500.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pb1x00/pb1550.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pnx8550/cm.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pnx8550/glb.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pnx8550/int.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pnx8550/kernel-entry-init.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pnx8550/nand.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pnx8550/pci.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pnx8550/uart.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pnx8550/usb.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-pnx8550/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/ddr.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/dma.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/dma_v.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/eth.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/gpio.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/integ.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/pci.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/prom.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/rb.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/rc32434.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/timer.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rc32434/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rm/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rm/mc146818rtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-rm/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-sibyte/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-sibyte/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-tx39xx/ioremap.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-tx39xx/mangle-port.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-tx39xx/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-tx49xx/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-tx49xx/ioremap.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-tx49xx/kmalloc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-tx49xx/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-vr41xx/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-vr41xx/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-wrppmc/mach-gt64120.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-wrppmc/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-yosemite/cpu-feature-overrides.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mach-yosemite/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mc146818-time.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mc146818rtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/bonito64.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/generic.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/launch.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/malta.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/maltaint.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/msc01_pci.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/piix4.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/prom.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/sim.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips-boards/simint.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mips_mt.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mipsmtregs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mipsprom.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mipsregs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mman.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mmu.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mmu_context.h (97%) rename {include/asm-mips => arch/mips/include/asm}/mmzone.h (100%) rename {include/asm-mips => arch/mips/include/asm}/module.h (100%) rename {include/asm-mips => arch/mips/include/asm}/msc01_ic.h (100%) rename {include/asm-mips => arch/mips/include/asm}/msgbuf.h (100%) rename {include/asm-mips => arch/mips/include/asm}/mutex.h (100%) rename {include/asm-mips => arch/mips/include/asm}/nile4.h (100%) rename {include/asm-mips => arch/mips/include/asm}/paccess.h (100%) rename {include/asm-mips => arch/mips/include/asm}/page.h (100%) rename {include/asm-mips => arch/mips/include/asm}/param.h (100%) rename {include/asm-mips => arch/mips/include/asm}/parport.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pci.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pci/bridge.h (100%) rename {include/asm-mips => arch/mips/include/asm}/percpu.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pgalloc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pgtable-32.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pgtable-64.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pgtable-bits.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pgtable.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmc-sierra/msp71xx/gpio.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmc-sierra/msp71xx/msp_cic_int.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmc-sierra/msp71xx/msp_int.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmc-sierra/msp71xx/msp_pci.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmc-sierra/msp71xx/msp_prom.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmc-sierra/msp71xx/msp_regops.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmc-sierra/msp71xx/msp_regs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmc-sierra/msp71xx/msp_slp_int.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmc-sierra/msp71xx/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/pmon.h (100%) rename {include/asm-mips => arch/mips/include/asm}/poll.h (100%) rename {include/asm-mips => arch/mips/include/asm}/posix_types.h (100%) rename {include/asm-mips => arch/mips/include/asm}/prefetch.h (100%) rename {include/asm-mips => arch/mips/include/asm}/processor.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ptrace.h (100%) rename {include/asm-mips => arch/mips/include/asm}/r4k-timer.h (100%) rename {include/asm-mips => arch/mips/include/asm}/r4kcache.h (100%) rename {include/asm-mips => arch/mips/include/asm}/reboot.h (100%) rename {include/asm-mips => arch/mips/include/asm}/reg.h (100%) rename {include/asm-mips => arch/mips/include/asm}/regdef.h (100%) rename {include/asm-mips => arch/mips/include/asm}/resource.h (100%) rename {include/asm-mips => arch/mips/include/asm}/rm9k-ocd.h (100%) rename {include/asm-mips => arch/mips/include/asm}/rtlx.h (100%) rename {include/asm-mips => arch/mips/include/asm}/scatterlist.h (100%) rename {include/asm-mips => arch/mips/include/asm}/seccomp.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sections.h (100%) rename {include/asm-mips => arch/mips/include/asm}/segment.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sembuf.h (100%) rename {include/asm-mips => arch/mips/include/asm}/serial.h (100%) rename {include/asm-mips => arch/mips/include/asm}/setup.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgi/gio.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgi/hpc3.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgi/ioc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgi/ip22.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgi/mc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgi/pi1.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgi/seeq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgi/sgi.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgi/wd.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgialib.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgiarcs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sgidefs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/shmbuf.h (100%) rename {include/asm-mips => arch/mips/include/asm}/shmparam.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/bcm1480_int.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/bcm1480_l2c.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/bcm1480_mc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/bcm1480_regs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/bcm1480_scd.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/bigsur.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/board.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/carmel.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_defs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_dma.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_genbus.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_int.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_l2c.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_ldt.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_mac.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_mc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_regs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_scd.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_smbus.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_syncser.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sb1250_uart.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/sentosa.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sibyte/swarm.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sigcontext.h (100%) rename {include/asm-mips => arch/mips/include/asm}/siginfo.h (100%) rename {include/asm-mips => arch/mips/include/asm}/signal.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sim.h (100%) rename {include/asm-mips => arch/mips/include/asm}/smp-ops.h (100%) rename {include/asm-mips => arch/mips/include/asm}/smp.h (100%) rename {include/asm-mips => arch/mips/include/asm}/smtc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/smtc_ipi.h (100%) rename {include/asm-mips => arch/mips/include/asm}/smtc_proc.h (100%) rename {include/asm-mips => arch/mips/include/asm}/smvp.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/addrs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/agent.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/arch.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/fru.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/gda.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/hub.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/intr.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/io.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/ioc3.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/klconfig.h (96%) rename {include/asm-mips => arch/mips/include/asm}/sn/kldir.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/klkernvars.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/launch.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/mapped_kernel.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/nmi.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/sn0/addrs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/sn0/arch.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/sn0/hub.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/sn0/hubio.h (96%) rename {include/asm-mips => arch/mips/include/asm}/sn/sn0/hubmd.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/sn0/hubni.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/sn0/hubpi.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/sn0/ip27.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/sn_private.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sn/types.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sni.h (100%) rename {include/asm-mips => arch/mips/include/asm}/socket.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sockios.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sparsemem.h (100%) rename {include/asm-mips => arch/mips/include/asm}/spinlock.h (100%) rename {include/asm-mips => arch/mips/include/asm}/spinlock_types.h (100%) rename {include/asm-mips => arch/mips/include/asm}/stackframe.h (100%) rename {include/asm-mips => arch/mips/include/asm}/stacktrace.h (100%) rename {include/asm-mips => arch/mips/include/asm}/stat.h (100%) rename {include/asm-mips => arch/mips/include/asm}/statfs.h (100%) rename {include/asm-mips => arch/mips/include/asm}/string.h (100%) rename {include/asm-mips => arch/mips/include/asm}/suspend.h (100%) rename {include/asm-mips => arch/mips/include/asm}/sysmips.h (100%) rename {include/asm-mips => arch/mips/include/asm}/system.h (100%) rename {include/asm-mips => arch/mips/include/asm}/termbits.h (100%) rename {include/asm-mips => arch/mips/include/asm}/termios.h (100%) rename {include/asm-mips => arch/mips/include/asm}/thread_info.h (100%) rename {include/asm-mips => arch/mips/include/asm}/time.h (100%) rename {include/asm-mips => arch/mips/include/asm}/timex.h (100%) rename {include/asm-mips => arch/mips/include/asm}/titan_dep.h (100%) rename {include/asm-mips => arch/mips/include/asm}/tlb.h (100%) rename {include/asm-mips => arch/mips/include/asm}/tlbdebug.h (100%) rename {include/asm-mips => arch/mips/include/asm}/tlbflush.h (100%) rename {include/asm-mips => arch/mips/include/asm}/topology.h (100%) rename {include/asm-mips => arch/mips/include/asm}/traps.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/boards.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/generic.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/jmr3927.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/pci.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/rbtx4927.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/rbtx4938.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/rbtx4939.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/smsc_fdc37m81x.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/spi.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/tx3927.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/tx4927.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/tx4927pcic.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/tx4938.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9/tx4939.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9pio.h (100%) rename {include/asm-mips => arch/mips/include/asm}/txx9tmr.h (100%) rename {include/asm-mips => arch/mips/include/asm}/types.h (100%) rename {include/asm-mips => arch/mips/include/asm}/uaccess.h (100%) rename {include/asm-mips => arch/mips/include/asm}/ucontext.h (100%) rename {include/asm-mips => arch/mips/include/asm}/unaligned.h (100%) rename {include/asm-mips => arch/mips/include/asm}/unistd.h (100%) rename {include/asm-mips => arch/mips/include/asm}/user.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vga.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vpe.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/capcella.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/giu.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/irq.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/mpc30x.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/pci.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/siu.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/tb0219.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/tb0226.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/tb0287.h (100%) rename {include/asm-mips => arch/mips/include/asm}/vr41xx/vr41xx.h (100%) rename {include/asm-mips => arch/mips/include/asm}/war.h (100%) rename {include/asm-mips => arch/mips/include/asm}/wbflush.h (100%) rename {include/asm-mips => arch/mips/include/asm}/xor.h (100%) rename {include/asm-mips => arch/mips/include/asm}/xtalk/xtalk.h (100%) rename {include/asm-mips => arch/mips/include/asm}/xtalk/xwidget.h (100%) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 4401a0c1278c..7f39fd8a91fe 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -170,97 +170,97 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/ # Acer PICA 61, Mips Magnum 4000 and Olivetti M700. # core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ -cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz +cflags-$(CONFIG_MACH_JAZZ) += -I$(srctree)/arch/mips/include/asm/mach-jazz load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000 # # Common Alchemy Au1x00 stuff # core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/ -cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00 +cflags-$(CONFIG_SOC_AU1X00) += -I$(srctree)/arch/mips/include/asm/mach-au1x00 # # AMD Alchemy Pb1000 eval board # libs-$(CONFIG_MIPS_PB1000) += arch/mips/alchemy/pb1000/ -cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00 +cflags-$(CONFIG_MIPS_PB1000) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00 load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000 # # AMD Alchemy Pb1100 eval board # libs-$(CONFIG_MIPS_PB1100) += arch/mips/alchemy/pb1100/ -cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00 +cflags-$(CONFIG_MIPS_PB1100) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00 load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000 # # AMD Alchemy Pb1500 eval board # libs-$(CONFIG_MIPS_PB1500) += arch/mips/alchemy/pb1500/ -cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00 +cflags-$(CONFIG_MIPS_PB1500) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00 load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000 # # AMD Alchemy Pb1550 eval board # libs-$(CONFIG_MIPS_PB1550) += arch/mips/alchemy/pb1550/ -cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00 +cflags-$(CONFIG_MIPS_PB1550) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00 load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000 # # AMD Alchemy Pb1200 eval board # libs-$(CONFIG_MIPS_PB1200) += arch/mips/alchemy/pb1200/ -cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00 +cflags-$(CONFIG_MIPS_PB1200) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00 load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000 # # AMD Alchemy Db1000 eval board # libs-$(CONFIG_MIPS_DB1000) += arch/mips/alchemy/db1x00/ -cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00 +cflags-$(CONFIG_MIPS_DB1000) += -I$(srctree)/arch/mips/include/asm/mach-db1x00 load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000 # # AMD Alchemy Db1100 eval board # libs-$(CONFIG_MIPS_DB1100) += arch/mips/alchemy/db1x00/ -cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00 +cflags-$(CONFIG_MIPS_DB1100) += -I$(srctree)/arch/mips/include/asm/mach-db1x00 load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000 # # AMD Alchemy Db1500 eval board # libs-$(CONFIG_MIPS_DB1500) += arch/mips/alchemy/db1x00/ -cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00 +cflags-$(CONFIG_MIPS_DB1500) += -I$(srctree)/arch/mips/include/asm/mach-db1x00 load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000 # # AMD Alchemy Db1550 eval board # libs-$(CONFIG_MIPS_DB1550) += arch/mips/alchemy/db1x00/ -cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00 +cflags-$(CONFIG_MIPS_DB1550) += -I$(srctree)/arch/mips/include/asm/mach-db1x00 load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000 # # AMD Alchemy Db1200 eval board # libs-$(CONFIG_MIPS_DB1200) += arch/mips/alchemy/pb1200/ -cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00 +cflags-$(CONFIG_MIPS_DB1200) += -I$(srctree)/arch/mips/include/asm/mach-db1x00 load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000 # # AMD Alchemy Bosporus eval board # libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/alchemy/db1x00/ -cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00 +cflags-$(CONFIG_MIPS_BOSPORUS) += -I$(srctree)/arch/mips/include/asm/mach-db1x00 load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000 # # AMD Alchemy Mirage eval board # libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/alchemy/db1x00/ -cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00 +cflags-$(CONFIG_MIPS_MIRAGE) += -I$(srctree)/arch/mips/include/asm/mach-db1x00 load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000 # @@ -279,14 +279,14 @@ load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000 # Cobalt Server # core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/ -cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt +cflags-$(CONFIG_MIPS_COBALT) += -I$(srctree)/arch/mips/include/asm/mach-cobalt load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000 # # DECstation family # core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/ -cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec +cflags-$(CONFIG_MACH_DECSTATION)+= -I$(srctree)/arch/mips/include/asm/mach-dec libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/ load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000 @@ -294,7 +294,7 @@ load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000 # Wind River PPMC Board (4KC + GT64120) # core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/ -cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc +cflags-$(CONFIG_WR_PPMC) += -I$(srctree)/arch/mips/include/asm/mach-wrppmc load-$(CONFIG_WR_PPMC) += 0xffffffff80100000 # @@ -302,13 +302,13 @@ load-$(CONFIG_WR_PPMC) += 0xffffffff80100000 # core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/ load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000 -cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote +cflags-$(CONFIG_LEMOTE_FULONG) += -I$(srctree)/arch/mips/include/asm/mach-lemote # # MIPS Malta board # core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/ -cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-malta +cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000 all-$(CONFIG_MIPS_MALTA) := vmlinux.bin @@ -316,14 +316,14 @@ all-$(CONFIG_MIPS_MALTA) := vmlinux.bin # MIPS SIM # core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/ -cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-mipssim +cflags-$(CONFIG_MIPS_SIM) += -I$(srctree)/arch/mips/include/asm/mach-mipssim load-$(CONFIG_MIPS_SIM) += 0x80100000 # # PMC-Sierra MSP SOCs # core-$(CONFIG_PMC_MSP) += arch/mips/pmc-sierra/msp71xx/ -cflags-$(CONFIG_PMC_MSP) += -Iinclude/asm-mips/pmc-sierra/msp71xx \ +cflags-$(CONFIG_PMC_MSP) += -I$(srctree)/arch/mips/include/asm/pmc-sierra/msp71xx \ -mno-branch-likely load-$(CONFIG_PMC_MSP) += 0xffffffff80100000 @@ -331,28 +331,28 @@ load-$(CONFIG_PMC_MSP) += 0xffffffff80100000 # PMC-Sierra Yosemite # core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/ -cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite +cflags-$(CONFIG_PMC_YOSEMITE) += -I$(srctree)/arch/mips/include/asm/mach-yosemite load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 # # Basler eXcite # core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/ -cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite +cflags-$(CONFIG_BASLER_EXCITE) += -I$(srctree)/arch/mips/include/asm/mach-excite load-$(CONFIG_BASLER_EXCITE) += 0x80100000 # # LASAT platforms # core-$(CONFIG_LASAT) += arch/mips/lasat/ -cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat +cflags-$(CONFIG_LASAT) += -I$(srctree)/arch/mips/include/asm/mach-lasat load-$(CONFIG_LASAT) += 0xffffffff80000000 # # Common VR41xx # core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/ -cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx +cflags-$(CONFIG_MACH_VR41XX) += -I$(srctree)/arch/mips/include/asm/mach-vr41xx # # ZAO Networks Capcella (VR4131) @@ -385,13 +385,13 @@ load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000 # Common NXP PNX8550 # core-$(CONFIG_SOC_PNX8550) += arch/mips/nxp/pnx8550/common/ -cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550 +cflags-$(CONFIG_SOC_PNX8550) += -I$(srctree)/arch/mips/include/asm/mach-pnx8550 # # NXP PNX8550 JBS board # libs-$(CONFIG_PNX8550_JBS) += arch/mips/nxp/pnx8550/jbs/ -#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550 +#cflags-$(CONFIG_PNX8550_JBS) += -I$(srctree)/arch/mips/include/asm/mach-pnx8550 load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000 # NXP PNX8550 STB810 board @@ -402,7 +402,7 @@ load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000 # NEC EMMA2RH boards # core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/ -cflags-$(CONFIG_EMMA2RH) += -Iinclude/asm-mips/mach-emma2rh +cflags-$(CONFIG_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh # NEC EMMA2RH Mark-eins core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/ @@ -418,7 +418,7 @@ load-$(CONFIG_MARKEINS) += 0xffffffff88100000 # address by 8kb. # core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/ -cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22 +cflags-$(CONFIG_SGI_IP22) += -I$(srctree)/arch/mips/include/asm/mach-ip22 ifdef CONFIG_32BIT load-$(CONFIG_SGI_IP22) += 0xffffffff88002000 endif @@ -435,7 +435,7 @@ endif # ifdef CONFIG_SGI_IP27 core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/ -cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27 +cflags-$(CONFIG_SGI_IP27) += -I$(srctree)/arch/mips/include/asm/mach-ip27 ifdef CONFIG_MAPPED_KERNEL load-$(CONFIG_SGI_IP27) += 0xc00000004001c000 OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000 @@ -460,7 +460,7 @@ ifdef CONFIG_SGI_IP28 endif endif core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/ -cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -Iinclude/asm-mips/mach-ip28 +cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28 load-$(CONFIG_SGI_IP28) += 0xa800000020004000 # @@ -472,7 +472,7 @@ load-$(CONFIG_SGI_IP28) += 0xa800000020004000 # will break. # core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/ -cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32 +cflags-$(CONFIG_SGI_IP32) += -I$(srctree)/arch/mips/include/asm/mach-ip32 load-$(CONFIG_SGI_IP32) += 0xffffffff80004000 # @@ -484,22 +484,22 @@ load-$(CONFIG_SGI_IP32) += 0xffffffff80004000 # core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/ core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/ -cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \ +cflags-$(CONFIG_SIBYTE_BCM112X) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/ core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/ -cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \ +cflags-$(CONFIG_SIBYTE_SB1250) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/ core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/ -cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \ +cflags-$(CONFIG_SIBYTE_BCM1x55) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/ core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/ -cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \ +cflags-$(CONFIG_SIBYTE_BCM1x80) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL # @@ -529,14 +529,14 @@ load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000 # Broadcom BCM47XX boards # core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/ -cflags-$(CONFIG_BCM47XX) += -Iinclude/asm-mips/mach-bcm47xx +cflags-$(CONFIG_BCM47XX) += -I$(srctree)/arch/mips/include/asm/mach-bcm47xx load-$(CONFIG_BCM47XX) := 0xffffffff80001000 # # SNI RM # core-$(CONFIG_SNI_RM) += arch/mips/sni/ -cflags-$(CONFIG_SNI_RM) += -Iinclude/asm-mips/mach-rm +cflags-$(CONFIG_SNI_RM) += -I$(srctree)/arch/mips/include/asm/mach-rm ifdef CONFIG_CPU_LITTLE_ENDIAN load-$(CONFIG_SNI_RM) += 0xffffffff80600000 else @@ -548,10 +548,10 @@ all-$(CONFIG_SNI_RM) := vmlinux.ecoff # Common TXx9 # core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/ -cflags-$(CONFIG_MACH_TX39XX) += -Iinclude/asm-mips/mach-tx39xx +cflags-$(CONFIG_MACH_TX39XX) += -I$(srctree)/arch/mips/include/asm/mach-tx39xx load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000 core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/ -cflags-$(CONFIG_MACH_TX49XX) += -Iinclude/asm-mips/mach-tx49xx +cflags-$(CONFIG_MACH_TX49XX) += -I$(srctree)/arch/mips/include/asm/mach-tx49xx load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000 # @@ -563,7 +563,7 @@ core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/ # Routerboard 532 board # core-$(CONFIG_MIKROTIK_RB532) += arch/mips/rb532/ -cflags-$(CONFIG_MIKROTIK_RB532) += -Iinclude/asm-mips/mach-rc32434 +cflags-$(CONFIG_MIKROTIK_RB532) += -I$(srctree)/arch/mips/include/asm/mach-rc32434 load-$(CONFIG_MIKROTIK_RB532) += 0xffffffff80101000 # @@ -573,7 +573,7 @@ core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/ core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/ core-$(CONFIG_TOSHIBA_RBTX4939) += arch/mips/txx9/rbtx4939/ -cflags-y += -Iinclude/asm-mips/mach-generic +cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic drivers-$(CONFIG_PCI) += arch/mips/pci/ ifdef CONFIG_32BIT diff --git a/include/asm-mips/Kbuild b/arch/mips/include/asm/Kbuild similarity index 100% rename from include/asm-mips/Kbuild rename to arch/mips/include/asm/Kbuild diff --git a/include/asm-mips/a.out.h b/arch/mips/include/asm/a.out.h similarity index 100% rename from include/asm-mips/a.out.h rename to arch/mips/include/asm/a.out.h diff --git a/include/asm-mips/abi.h b/arch/mips/include/asm/abi.h similarity index 100% rename from include/asm-mips/abi.h rename to arch/mips/include/asm/abi.h diff --git a/include/asm-mips/addrspace.h b/arch/mips/include/asm/addrspace.h similarity index 100% rename from include/asm-mips/addrspace.h rename to arch/mips/include/asm/addrspace.h diff --git a/include/asm-mips/asm.h b/arch/mips/include/asm/asm.h similarity index 100% rename from include/asm-mips/asm.h rename to arch/mips/include/asm/asm.h diff --git a/include/asm-mips/asmmacro-32.h b/arch/mips/include/asm/asmmacro-32.h similarity index 100% rename from include/asm-mips/asmmacro-32.h rename to arch/mips/include/asm/asmmacro-32.h diff --git a/include/asm-mips/asmmacro-64.h b/arch/mips/include/asm/asmmacro-64.h similarity index 100% rename from include/asm-mips/asmmacro-64.h rename to arch/mips/include/asm/asmmacro-64.h diff --git a/include/asm-mips/asmmacro.h b/arch/mips/include/asm/asmmacro.h similarity index 100% rename from include/asm-mips/asmmacro.h rename to arch/mips/include/asm/asmmacro.h diff --git a/include/asm-mips/atomic.h b/arch/mips/include/asm/atomic.h similarity index 100% rename from include/asm-mips/atomic.h rename to arch/mips/include/asm/atomic.h diff --git a/include/asm-mips/auxvec.h b/arch/mips/include/asm/auxvec.h similarity index 100% rename from include/asm-mips/auxvec.h rename to arch/mips/include/asm/auxvec.h diff --git a/include/asm-mips/barrier.h b/arch/mips/include/asm/barrier.h similarity index 100% rename from include/asm-mips/barrier.h rename to arch/mips/include/asm/barrier.h diff --git a/include/asm-mips/bcache.h b/arch/mips/include/asm/bcache.h similarity index 100% rename from include/asm-mips/bcache.h rename to arch/mips/include/asm/bcache.h diff --git a/include/asm-mips/bitops.h b/arch/mips/include/asm/bitops.h similarity index 100% rename from include/asm-mips/bitops.h rename to arch/mips/include/asm/bitops.h diff --git a/include/asm-mips/bootinfo.h b/arch/mips/include/asm/bootinfo.h similarity index 100% rename from include/asm-mips/bootinfo.h rename to arch/mips/include/asm/bootinfo.h diff --git a/include/asm-mips/branch.h b/arch/mips/include/asm/branch.h similarity index 100% rename from include/asm-mips/branch.h rename to arch/mips/include/asm/branch.h diff --git a/include/asm-mips/break.h b/arch/mips/include/asm/break.h similarity index 100% rename from include/asm-mips/break.h rename to arch/mips/include/asm/break.h diff --git a/include/asm-mips/bug.h b/arch/mips/include/asm/bug.h similarity index 100% rename from include/asm-mips/bug.h rename to arch/mips/include/asm/bug.h diff --git a/include/asm-mips/bugs.h b/arch/mips/include/asm/bugs.h similarity index 100% rename from include/asm-mips/bugs.h rename to arch/mips/include/asm/bugs.h diff --git a/include/asm-mips/byteorder.h b/arch/mips/include/asm/byteorder.h similarity index 100% rename from include/asm-mips/byteorder.h rename to arch/mips/include/asm/byteorder.h diff --git a/include/asm-mips/cache.h b/arch/mips/include/asm/cache.h similarity index 100% rename from include/asm-mips/cache.h rename to arch/mips/include/asm/cache.h diff --git a/include/asm-mips/cachectl.h b/arch/mips/include/asm/cachectl.h similarity index 100% rename from include/asm-mips/cachectl.h rename to arch/mips/include/asm/cachectl.h diff --git a/include/asm-mips/cacheflush.h b/arch/mips/include/asm/cacheflush.h similarity index 100% rename from include/asm-mips/cacheflush.h rename to arch/mips/include/asm/cacheflush.h diff --git a/include/asm-mips/cacheops.h b/arch/mips/include/asm/cacheops.h similarity index 100% rename from include/asm-mips/cacheops.h rename to arch/mips/include/asm/cacheops.h diff --git a/include/asm-mips/checksum.h b/arch/mips/include/asm/checksum.h similarity index 100% rename from include/asm-mips/checksum.h rename to arch/mips/include/asm/checksum.h diff --git a/include/asm-mips/cmp.h b/arch/mips/include/asm/cmp.h similarity index 100% rename from include/asm-mips/cmp.h rename to arch/mips/include/asm/cmp.h diff --git a/include/asm-mips/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h similarity index 100% rename from include/asm-mips/cmpxchg.h rename to arch/mips/include/asm/cmpxchg.h diff --git a/include/asm-mips/compat-signal.h b/arch/mips/include/asm/compat-signal.h similarity index 100% rename from include/asm-mips/compat-signal.h rename to arch/mips/include/asm/compat-signal.h diff --git a/include/asm-mips/compat.h b/arch/mips/include/asm/compat.h similarity index 100% rename from include/asm-mips/compat.h rename to arch/mips/include/asm/compat.h diff --git a/include/asm-mips/compiler.h b/arch/mips/include/asm/compiler.h similarity index 100% rename from include/asm-mips/compiler.h rename to arch/mips/include/asm/compiler.h diff --git a/include/asm-mips/cpu-features.h b/arch/mips/include/asm/cpu-features.h similarity index 100% rename from include/asm-mips/cpu-features.h rename to arch/mips/include/asm/cpu-features.h diff --git a/include/asm-mips/cpu-info.h b/arch/mips/include/asm/cpu-info.h similarity index 100% rename from include/asm-mips/cpu-info.h rename to arch/mips/include/asm/cpu-info.h diff --git a/include/asm-mips/cpu.h b/arch/mips/include/asm/cpu.h similarity index 100% rename from include/asm-mips/cpu.h rename to arch/mips/include/asm/cpu.h diff --git a/include/asm-mips/cputime.h b/arch/mips/include/asm/cputime.h similarity index 100% rename from include/asm-mips/cputime.h rename to arch/mips/include/asm/cputime.h diff --git a/include/asm-mips/current.h b/arch/mips/include/asm/current.h similarity index 100% rename from include/asm-mips/current.h rename to arch/mips/include/asm/current.h diff --git a/include/asm-mips/debug.h b/arch/mips/include/asm/debug.h similarity index 100% rename from include/asm-mips/debug.h rename to arch/mips/include/asm/debug.h diff --git a/include/asm-mips/dec/ecc.h b/arch/mips/include/asm/dec/ecc.h similarity index 100% rename from include/asm-mips/dec/ecc.h rename to arch/mips/include/asm/dec/ecc.h diff --git a/include/asm-mips/dec/interrupts.h b/arch/mips/include/asm/dec/interrupts.h similarity index 100% rename from include/asm-mips/dec/interrupts.h rename to arch/mips/include/asm/dec/interrupts.h diff --git a/include/asm-mips/dec/ioasic.h b/arch/mips/include/asm/dec/ioasic.h similarity index 100% rename from include/asm-mips/dec/ioasic.h rename to arch/mips/include/asm/dec/ioasic.h diff --git a/include/asm-mips/dec/ioasic_addrs.h b/arch/mips/include/asm/dec/ioasic_addrs.h similarity index 100% rename from include/asm-mips/dec/ioasic_addrs.h rename to arch/mips/include/asm/dec/ioasic_addrs.h diff --git a/include/asm-mips/dec/ioasic_ints.h b/arch/mips/include/asm/dec/ioasic_ints.h similarity index 100% rename from include/asm-mips/dec/ioasic_ints.h rename to arch/mips/include/asm/dec/ioasic_ints.h diff --git a/include/asm-mips/dec/kn01.h b/arch/mips/include/asm/dec/kn01.h similarity index 100% rename from include/asm-mips/dec/kn01.h rename to arch/mips/include/asm/dec/kn01.h diff --git a/include/asm-mips/dec/kn02.h b/arch/mips/include/asm/dec/kn02.h similarity index 100% rename from include/asm-mips/dec/kn02.h rename to arch/mips/include/asm/dec/kn02.h diff --git a/include/asm-mips/dec/kn02ba.h b/arch/mips/include/asm/dec/kn02ba.h similarity index 100% rename from include/asm-mips/dec/kn02ba.h rename to arch/mips/include/asm/dec/kn02ba.h diff --git a/include/asm-mips/dec/kn02ca.h b/arch/mips/include/asm/dec/kn02ca.h similarity index 100% rename from include/asm-mips/dec/kn02ca.h rename to arch/mips/include/asm/dec/kn02ca.h diff --git a/include/asm-mips/dec/kn02xa.h b/arch/mips/include/asm/dec/kn02xa.h similarity index 100% rename from include/asm-mips/dec/kn02xa.h rename to arch/mips/include/asm/dec/kn02xa.h diff --git a/include/asm-mips/dec/kn03.h b/arch/mips/include/asm/dec/kn03.h similarity index 100% rename from include/asm-mips/dec/kn03.h rename to arch/mips/include/asm/dec/kn03.h diff --git a/include/asm-mips/dec/kn05.h b/arch/mips/include/asm/dec/kn05.h similarity index 100% rename from include/asm-mips/dec/kn05.h rename to arch/mips/include/asm/dec/kn05.h diff --git a/include/asm-mips/dec/kn230.h b/arch/mips/include/asm/dec/kn230.h similarity index 100% rename from include/asm-mips/dec/kn230.h rename to arch/mips/include/asm/dec/kn230.h diff --git a/include/asm-mips/dec/machtype.h b/arch/mips/include/asm/dec/machtype.h similarity index 100% rename from include/asm-mips/dec/machtype.h rename to arch/mips/include/asm/dec/machtype.h diff --git a/include/asm-mips/dec/prom.h b/arch/mips/include/asm/dec/prom.h similarity index 100% rename from include/asm-mips/dec/prom.h rename to arch/mips/include/asm/dec/prom.h diff --git a/include/asm-mips/dec/system.h b/arch/mips/include/asm/dec/system.h similarity index 100% rename from include/asm-mips/dec/system.h rename to arch/mips/include/asm/dec/system.h diff --git a/include/asm-mips/delay.h b/arch/mips/include/asm/delay.h similarity index 100% rename from include/asm-mips/delay.h rename to arch/mips/include/asm/delay.h diff --git a/include/asm-mips/device.h b/arch/mips/include/asm/device.h similarity index 100% rename from include/asm-mips/device.h rename to arch/mips/include/asm/device.h diff --git a/include/asm-mips/div64.h b/arch/mips/include/asm/div64.h similarity index 100% rename from include/asm-mips/div64.h rename to arch/mips/include/asm/div64.h diff --git a/include/asm-mips/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h similarity index 100% rename from include/asm-mips/dma-mapping.h rename to arch/mips/include/asm/dma-mapping.h diff --git a/include/asm-mips/dma.h b/arch/mips/include/asm/dma.h similarity index 100% rename from include/asm-mips/dma.h rename to arch/mips/include/asm/dma.h diff --git a/include/asm-mips/ds1286.h b/arch/mips/include/asm/ds1286.h similarity index 100% rename from include/asm-mips/ds1286.h rename to arch/mips/include/asm/ds1286.h diff --git a/include/asm-mips/ds1287.h b/arch/mips/include/asm/ds1287.h similarity index 100% rename from include/asm-mips/ds1287.h rename to arch/mips/include/asm/ds1287.h diff --git a/include/asm-mips/dsp.h b/arch/mips/include/asm/dsp.h similarity index 100% rename from include/asm-mips/dsp.h rename to arch/mips/include/asm/dsp.h diff --git a/include/asm-mips/edac.h b/arch/mips/include/asm/edac.h similarity index 100% rename from include/asm-mips/edac.h rename to arch/mips/include/asm/edac.h diff --git a/include/asm-mips/elf.h b/arch/mips/include/asm/elf.h similarity index 100% rename from include/asm-mips/elf.h rename to arch/mips/include/asm/elf.h diff --git a/include/asm-mips/emergency-restart.h b/arch/mips/include/asm/emergency-restart.h similarity index 100% rename from include/asm-mips/emergency-restart.h rename to arch/mips/include/asm/emergency-restart.h diff --git a/include/asm-mips/emma2rh/emma2rh.h b/arch/mips/include/asm/emma2rh/emma2rh.h similarity index 100% rename from include/asm-mips/emma2rh/emma2rh.h rename to arch/mips/include/asm/emma2rh/emma2rh.h diff --git a/include/asm-mips/emma2rh/markeins.h b/arch/mips/include/asm/emma2rh/markeins.h similarity index 100% rename from include/asm-mips/emma2rh/markeins.h rename to arch/mips/include/asm/emma2rh/markeins.h diff --git a/include/asm-mips/errno.h b/arch/mips/include/asm/errno.h similarity index 100% rename from include/asm-mips/errno.h rename to arch/mips/include/asm/errno.h diff --git a/include/asm-mips/fb.h b/arch/mips/include/asm/fb.h similarity index 100% rename from include/asm-mips/fb.h rename to arch/mips/include/asm/fb.h diff --git a/include/asm-mips/fcntl.h b/arch/mips/include/asm/fcntl.h similarity index 100% rename from include/asm-mips/fcntl.h rename to arch/mips/include/asm/fcntl.h diff --git a/include/asm-mips/fixmap.h b/arch/mips/include/asm/fixmap.h similarity index 100% rename from include/asm-mips/fixmap.h rename to arch/mips/include/asm/fixmap.h diff --git a/include/asm-mips/floppy.h b/arch/mips/include/asm/floppy.h similarity index 100% rename from include/asm-mips/floppy.h rename to arch/mips/include/asm/floppy.h diff --git a/include/asm-mips/fpregdef.h b/arch/mips/include/asm/fpregdef.h similarity index 100% rename from include/asm-mips/fpregdef.h rename to arch/mips/include/asm/fpregdef.h diff --git a/include/asm-mips/fpu.h b/arch/mips/include/asm/fpu.h similarity index 100% rename from include/asm-mips/fpu.h rename to arch/mips/include/asm/fpu.h diff --git a/include/asm-mips/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h similarity index 100% rename from include/asm-mips/fpu_emulator.h rename to arch/mips/include/asm/fpu_emulator.h diff --git a/include/asm-mips/futex.h b/arch/mips/include/asm/futex.h similarity index 100% rename from include/asm-mips/futex.h rename to arch/mips/include/asm/futex.h diff --git a/include/asm-mips/fw/arc/hinv.h b/arch/mips/include/asm/fw/arc/hinv.h similarity index 100% rename from include/asm-mips/fw/arc/hinv.h rename to arch/mips/include/asm/fw/arc/hinv.h diff --git a/include/asm-mips/fw/arc/types.h b/arch/mips/include/asm/fw/arc/types.h similarity index 100% rename from include/asm-mips/fw/arc/types.h rename to arch/mips/include/asm/fw/arc/types.h diff --git a/include/asm-mips/fw/cfe/cfe_api.h b/arch/mips/include/asm/fw/cfe/cfe_api.h similarity index 100% rename from include/asm-mips/fw/cfe/cfe_api.h rename to arch/mips/include/asm/fw/cfe/cfe_api.h diff --git a/include/asm-mips/fw/cfe/cfe_error.h b/arch/mips/include/asm/fw/cfe/cfe_error.h similarity index 100% rename from include/asm-mips/fw/cfe/cfe_error.h rename to arch/mips/include/asm/fw/cfe/cfe_error.h diff --git a/include/asm-mips/gcmpregs.h b/arch/mips/include/asm/gcmpregs.h similarity index 100% rename from include/asm-mips/gcmpregs.h rename to arch/mips/include/asm/gcmpregs.h diff --git a/include/asm-mips/gic.h b/arch/mips/include/asm/gic.h similarity index 100% rename from include/asm-mips/gic.h rename to arch/mips/include/asm/gic.h diff --git a/include/asm-mips/gpio.h b/arch/mips/include/asm/gpio.h similarity index 100% rename from include/asm-mips/gpio.h rename to arch/mips/include/asm/gpio.h diff --git a/include/asm-mips/gt64120.h b/arch/mips/include/asm/gt64120.h similarity index 100% rename from include/asm-mips/gt64120.h rename to arch/mips/include/asm/gt64120.h diff --git a/include/asm-mips/hardirq.h b/arch/mips/include/asm/hardirq.h similarity index 100% rename from include/asm-mips/hardirq.h rename to arch/mips/include/asm/hardirq.h diff --git a/include/asm-mips/hazards.h b/arch/mips/include/asm/hazards.h similarity index 100% rename from include/asm-mips/hazards.h rename to arch/mips/include/asm/hazards.h diff --git a/include/asm-mips/highmem.h b/arch/mips/include/asm/highmem.h similarity index 100% rename from include/asm-mips/highmem.h rename to arch/mips/include/asm/highmem.h diff --git a/include/asm-mips/hw_irq.h b/arch/mips/include/asm/hw_irq.h similarity index 100% rename from include/asm-mips/hw_irq.h rename to arch/mips/include/asm/hw_irq.h diff --git a/include/asm-mips/i8253.h b/arch/mips/include/asm/i8253.h similarity index 100% rename from include/asm-mips/i8253.h rename to arch/mips/include/asm/i8253.h diff --git a/include/asm-mips/i8259.h b/arch/mips/include/asm/i8259.h similarity index 100% rename from include/asm-mips/i8259.h rename to arch/mips/include/asm/i8259.h diff --git a/include/asm-mips/ide.h b/arch/mips/include/asm/ide.h similarity index 100% rename from include/asm-mips/ide.h rename to arch/mips/include/asm/ide.h diff --git a/include/asm-mips/inst.h b/arch/mips/include/asm/inst.h similarity index 100% rename from include/asm-mips/inst.h rename to arch/mips/include/asm/inst.h diff --git a/include/asm-mips/io.h b/arch/mips/include/asm/io.h similarity index 100% rename from include/asm-mips/io.h rename to arch/mips/include/asm/io.h diff --git a/include/asm-mips/ioctl.h b/arch/mips/include/asm/ioctl.h similarity index 100% rename from include/asm-mips/ioctl.h rename to arch/mips/include/asm/ioctl.h diff --git a/include/asm-mips/ioctls.h b/arch/mips/include/asm/ioctls.h similarity index 100% rename from include/asm-mips/ioctls.h rename to arch/mips/include/asm/ioctls.h diff --git a/include/asm-mips/ip32/crime.h b/arch/mips/include/asm/ip32/crime.h similarity index 100% rename from include/asm-mips/ip32/crime.h rename to arch/mips/include/asm/ip32/crime.h diff --git a/include/asm-mips/ip32/ip32_ints.h b/arch/mips/include/asm/ip32/ip32_ints.h similarity index 100% rename from include/asm-mips/ip32/ip32_ints.h rename to arch/mips/include/asm/ip32/ip32_ints.h diff --git a/include/asm-mips/ip32/mace.h b/arch/mips/include/asm/ip32/mace.h similarity index 100% rename from include/asm-mips/ip32/mace.h rename to arch/mips/include/asm/ip32/mace.h diff --git a/include/asm-mips/ipcbuf.h b/arch/mips/include/asm/ipcbuf.h similarity index 100% rename from include/asm-mips/ipcbuf.h rename to arch/mips/include/asm/ipcbuf.h diff --git a/include/asm-mips/irq.h b/arch/mips/include/asm/irq.h similarity index 100% rename from include/asm-mips/irq.h rename to arch/mips/include/asm/irq.h diff --git a/include/asm-mips/irq_cpu.h b/arch/mips/include/asm/irq_cpu.h similarity index 100% rename from include/asm-mips/irq_cpu.h rename to arch/mips/include/asm/irq_cpu.h diff --git a/include/asm-mips/irq_gt641xx.h b/arch/mips/include/asm/irq_gt641xx.h similarity index 100% rename from include/asm-mips/irq_gt641xx.h rename to arch/mips/include/asm/irq_gt641xx.h diff --git a/include/asm-mips/irq_regs.h b/arch/mips/include/asm/irq_regs.h similarity index 100% rename from include/asm-mips/irq_regs.h rename to arch/mips/include/asm/irq_regs.h diff --git a/include/asm-mips/irqflags.h b/arch/mips/include/asm/irqflags.h similarity index 100% rename from include/asm-mips/irqflags.h rename to arch/mips/include/asm/irqflags.h diff --git a/include/asm-mips/isadep.h b/arch/mips/include/asm/isadep.h similarity index 100% rename from include/asm-mips/isadep.h rename to arch/mips/include/asm/isadep.h diff --git a/include/asm-mips/jazz.h b/arch/mips/include/asm/jazz.h similarity index 100% rename from include/asm-mips/jazz.h rename to arch/mips/include/asm/jazz.h diff --git a/include/asm-mips/jazzdma.h b/arch/mips/include/asm/jazzdma.h similarity index 100% rename from include/asm-mips/jazzdma.h rename to arch/mips/include/asm/jazzdma.h diff --git a/include/asm-mips/kdebug.h b/arch/mips/include/asm/kdebug.h similarity index 100% rename from include/asm-mips/kdebug.h rename to arch/mips/include/asm/kdebug.h diff --git a/include/asm-mips/kexec.h b/arch/mips/include/asm/kexec.h similarity index 100% rename from include/asm-mips/kexec.h rename to arch/mips/include/asm/kexec.h diff --git a/include/asm-mips/kgdb.h b/arch/mips/include/asm/kgdb.h similarity index 100% rename from include/asm-mips/kgdb.h rename to arch/mips/include/asm/kgdb.h diff --git a/include/asm-mips/kmap_types.h b/arch/mips/include/asm/kmap_types.h similarity index 100% rename from include/asm-mips/kmap_types.h rename to arch/mips/include/asm/kmap_types.h diff --git a/include/asm-mips/kspd.h b/arch/mips/include/asm/kspd.h similarity index 100% rename from include/asm-mips/kspd.h rename to arch/mips/include/asm/kspd.h diff --git a/include/asm-mips/lasat/ds1603.h b/arch/mips/include/asm/lasat/ds1603.h similarity index 100% rename from include/asm-mips/lasat/ds1603.h rename to arch/mips/include/asm/lasat/ds1603.h diff --git a/include/asm-mips/lasat/eeprom.h b/arch/mips/include/asm/lasat/eeprom.h similarity index 100% rename from include/asm-mips/lasat/eeprom.h rename to arch/mips/include/asm/lasat/eeprom.h diff --git a/include/asm-mips/lasat/head.h b/arch/mips/include/asm/lasat/head.h similarity index 100% rename from include/asm-mips/lasat/head.h rename to arch/mips/include/asm/lasat/head.h diff --git a/include/asm-mips/lasat/lasat.h b/arch/mips/include/asm/lasat/lasat.h similarity index 100% rename from include/asm-mips/lasat/lasat.h rename to arch/mips/include/asm/lasat/lasat.h diff --git a/include/asm-mips/lasat/lasatint.h b/arch/mips/include/asm/lasat/lasatint.h similarity index 100% rename from include/asm-mips/lasat/lasatint.h rename to arch/mips/include/asm/lasat/lasatint.h diff --git a/include/asm-mips/lasat/picvue.h b/arch/mips/include/asm/lasat/picvue.h similarity index 100% rename from include/asm-mips/lasat/picvue.h rename to arch/mips/include/asm/lasat/picvue.h diff --git a/include/asm-mips/lasat/serial.h b/arch/mips/include/asm/lasat/serial.h similarity index 100% rename from include/asm-mips/lasat/serial.h rename to arch/mips/include/asm/lasat/serial.h diff --git a/include/asm-mips/linkage.h b/arch/mips/include/asm/linkage.h similarity index 100% rename from include/asm-mips/linkage.h rename to arch/mips/include/asm/linkage.h diff --git a/include/asm-mips/local.h b/arch/mips/include/asm/local.h similarity index 100% rename from include/asm-mips/local.h rename to arch/mips/include/asm/local.h diff --git a/include/asm-mips/m48t35.h b/arch/mips/include/asm/m48t35.h similarity index 100% rename from include/asm-mips/m48t35.h rename to arch/mips/include/asm/m48t35.h diff --git a/include/asm-mips/m48t37.h b/arch/mips/include/asm/m48t37.h similarity index 100% rename from include/asm-mips/m48t37.h rename to arch/mips/include/asm/m48t37.h diff --git a/include/asm-mips/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h similarity index 100% rename from include/asm-mips/mach-au1x00/au1000.h rename to arch/mips/include/asm/mach-au1x00/au1000.h diff --git a/include/asm-mips/mach-au1x00/au1000_dma.h b/arch/mips/include/asm/mach-au1x00/au1000_dma.h similarity index 100% rename from include/asm-mips/mach-au1x00/au1000_dma.h rename to arch/mips/include/asm/mach-au1x00/au1000_dma.h diff --git a/include/asm-mips/mach-au1x00/au1000_gpio.h b/arch/mips/include/asm/mach-au1x00/au1000_gpio.h similarity index 100% rename from include/asm-mips/mach-au1x00/au1000_gpio.h rename to arch/mips/include/asm/mach-au1x00/au1000_gpio.h diff --git a/include/asm-mips/mach-au1x00/au1100_mmc.h b/arch/mips/include/asm/mach-au1x00/au1100_mmc.h similarity index 100% rename from include/asm-mips/mach-au1x00/au1100_mmc.h rename to arch/mips/include/asm/mach-au1x00/au1100_mmc.h diff --git a/include/asm-mips/mach-au1x00/au1550_spi.h b/arch/mips/include/asm/mach-au1x00/au1550_spi.h similarity index 100% rename from include/asm-mips/mach-au1x00/au1550_spi.h rename to arch/mips/include/asm/mach-au1x00/au1550_spi.h diff --git a/include/asm-mips/mach-au1x00/au1xxx.h b/arch/mips/include/asm/mach-au1x00/au1xxx.h similarity index 100% rename from include/asm-mips/mach-au1x00/au1xxx.h rename to arch/mips/include/asm/mach-au1x00/au1xxx.h diff --git a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h similarity index 100% rename from include/asm-mips/mach-au1x00/au1xxx_dbdma.h rename to arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h similarity index 100% rename from include/asm-mips/mach-au1x00/au1xxx_ide.h rename to arch/mips/include/asm/mach-au1x00/au1xxx_ide.h diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h similarity index 100% rename from include/asm-mips/mach-au1x00/au1xxx_psc.h rename to arch/mips/include/asm/mach-au1x00/au1xxx_psc.h diff --git a/include/asm-mips/mach-au1x00/gpio.h b/arch/mips/include/asm/mach-au1x00/gpio.h similarity index 100% rename from include/asm-mips/mach-au1x00/gpio.h rename to arch/mips/include/asm/mach-au1x00/gpio.h diff --git a/include/asm-mips/mach-au1x00/ioremap.h b/arch/mips/include/asm/mach-au1x00/ioremap.h similarity index 100% rename from include/asm-mips/mach-au1x00/ioremap.h rename to arch/mips/include/asm/mach-au1x00/ioremap.h diff --git a/include/asm-mips/mach-au1x00/prom.h b/arch/mips/include/asm/mach-au1x00/prom.h similarity index 100% rename from include/asm-mips/mach-au1x00/prom.h rename to arch/mips/include/asm/mach-au1x00/prom.h diff --git a/include/asm-mips/mach-au1x00/war.h b/arch/mips/include/asm/mach-au1x00/war.h similarity index 100% rename from include/asm-mips/mach-au1x00/war.h rename to arch/mips/include/asm/mach-au1x00/war.h diff --git a/include/asm-mips/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h similarity index 100% rename from include/asm-mips/mach-bcm47xx/bcm47xx.h rename to arch/mips/include/asm/mach-bcm47xx/bcm47xx.h diff --git a/include/asm-mips/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h similarity index 100% rename from include/asm-mips/mach-bcm47xx/gpio.h rename to arch/mips/include/asm/mach-bcm47xx/gpio.h diff --git a/include/asm-mips/mach-bcm47xx/war.h b/arch/mips/include/asm/mach-bcm47xx/war.h similarity index 100% rename from include/asm-mips/mach-bcm47xx/war.h rename to arch/mips/include/asm/mach-bcm47xx/war.h diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/arch/mips/include/asm/mach-cobalt/cobalt.h similarity index 100% rename from include/asm-mips/mach-cobalt/cobalt.h rename to arch/mips/include/asm/mach-cobalt/cobalt.h diff --git a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-cobalt/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-cobalt/irq.h b/arch/mips/include/asm/mach-cobalt/irq.h similarity index 100% rename from include/asm-mips/mach-cobalt/irq.h rename to arch/mips/include/asm/mach-cobalt/irq.h diff --git a/include/asm-mips/mach-cobalt/mach-gt64120.h b/arch/mips/include/asm/mach-cobalt/mach-gt64120.h similarity index 100% rename from include/asm-mips/mach-cobalt/mach-gt64120.h rename to arch/mips/include/asm/mach-cobalt/mach-gt64120.h diff --git a/include/asm-mips/mach-cobalt/war.h b/arch/mips/include/asm/mach-cobalt/war.h similarity index 100% rename from include/asm-mips/mach-cobalt/war.h rename to arch/mips/include/asm/mach-cobalt/war.h diff --git a/include/asm-mips/mach-db1x00/db1200.h b/arch/mips/include/asm/mach-db1x00/db1200.h similarity index 100% rename from include/asm-mips/mach-db1x00/db1200.h rename to arch/mips/include/asm/mach-db1x00/db1200.h diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/arch/mips/include/asm/mach-db1x00/db1x00.h similarity index 100% rename from include/asm-mips/mach-db1x00/db1x00.h rename to arch/mips/include/asm/mach-db1x00/db1x00.h diff --git a/include/asm-mips/mach-dec/mc146818rtc.h b/arch/mips/include/asm/mach-dec/mc146818rtc.h similarity index 100% rename from include/asm-mips/mach-dec/mc146818rtc.h rename to arch/mips/include/asm/mach-dec/mc146818rtc.h diff --git a/include/asm-mips/mach-dec/war.h b/arch/mips/include/asm/mach-dec/war.h similarity index 100% rename from include/asm-mips/mach-dec/war.h rename to arch/mips/include/asm/mach-dec/war.h diff --git a/include/asm-mips/mach-emma2rh/irq.h b/arch/mips/include/asm/mach-emma2rh/irq.h similarity index 100% rename from include/asm-mips/mach-emma2rh/irq.h rename to arch/mips/include/asm/mach-emma2rh/irq.h diff --git a/include/asm-mips/mach-emma2rh/war.h b/arch/mips/include/asm/mach-emma2rh/war.h similarity index 100% rename from include/asm-mips/mach-emma2rh/war.h rename to arch/mips/include/asm/mach-emma2rh/war.h diff --git a/include/asm-mips/mach-excite/cpu-feature-overrides.h b/arch/mips/include/asm/mach-excite/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-excite/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-excite/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-excite/excite.h b/arch/mips/include/asm/mach-excite/excite.h similarity index 100% rename from include/asm-mips/mach-excite/excite.h rename to arch/mips/include/asm/mach-excite/excite.h diff --git a/include/asm-mips/mach-excite/excite_fpga.h b/arch/mips/include/asm/mach-excite/excite_fpga.h similarity index 100% rename from include/asm-mips/mach-excite/excite_fpga.h rename to arch/mips/include/asm/mach-excite/excite_fpga.h diff --git a/include/asm-mips/mach-excite/excite_nandflash.h b/arch/mips/include/asm/mach-excite/excite_nandflash.h similarity index 100% rename from include/asm-mips/mach-excite/excite_nandflash.h rename to arch/mips/include/asm/mach-excite/excite_nandflash.h diff --git a/include/asm-mips/mach-excite/rm9k_eth.h b/arch/mips/include/asm/mach-excite/rm9k_eth.h similarity index 100% rename from include/asm-mips/mach-excite/rm9k_eth.h rename to arch/mips/include/asm/mach-excite/rm9k_eth.h diff --git a/include/asm-mips/mach-excite/rm9k_wdt.h b/arch/mips/include/asm/mach-excite/rm9k_wdt.h similarity index 100% rename from include/asm-mips/mach-excite/rm9k_wdt.h rename to arch/mips/include/asm/mach-excite/rm9k_wdt.h diff --git a/include/asm-mips/mach-excite/rm9k_xicap.h b/arch/mips/include/asm/mach-excite/rm9k_xicap.h similarity index 100% rename from include/asm-mips/mach-excite/rm9k_xicap.h rename to arch/mips/include/asm/mach-excite/rm9k_xicap.h diff --git a/include/asm-mips/mach-excite/war.h b/arch/mips/include/asm/mach-excite/war.h similarity index 100% rename from include/asm-mips/mach-excite/war.h rename to arch/mips/include/asm/mach-excite/war.h diff --git a/include/asm-mips/mach-generic/cpu-feature-overrides.h b/arch/mips/include/asm/mach-generic/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-generic/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-generic/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-generic/dma-coherence.h b/arch/mips/include/asm/mach-generic/dma-coherence.h similarity index 100% rename from include/asm-mips/mach-generic/dma-coherence.h rename to arch/mips/include/asm/mach-generic/dma-coherence.h diff --git a/include/asm-mips/mach-generic/floppy.h b/arch/mips/include/asm/mach-generic/floppy.h similarity index 100% rename from include/asm-mips/mach-generic/floppy.h rename to arch/mips/include/asm/mach-generic/floppy.h diff --git a/include/asm-mips/mach-generic/gpio.h b/arch/mips/include/asm/mach-generic/gpio.h similarity index 100% rename from include/asm-mips/mach-generic/gpio.h rename to arch/mips/include/asm/mach-generic/gpio.h diff --git a/include/asm-mips/mach-generic/ide.h b/arch/mips/include/asm/mach-generic/ide.h similarity index 100% rename from include/asm-mips/mach-generic/ide.h rename to arch/mips/include/asm/mach-generic/ide.h diff --git a/include/asm-mips/mach-generic/ioremap.h b/arch/mips/include/asm/mach-generic/ioremap.h similarity index 100% rename from include/asm-mips/mach-generic/ioremap.h rename to arch/mips/include/asm/mach-generic/ioremap.h diff --git a/include/asm-mips/mach-generic/irq.h b/arch/mips/include/asm/mach-generic/irq.h similarity index 100% rename from include/asm-mips/mach-generic/irq.h rename to arch/mips/include/asm/mach-generic/irq.h diff --git a/include/asm-mips/mach-generic/kernel-entry-init.h b/arch/mips/include/asm/mach-generic/kernel-entry-init.h similarity index 100% rename from include/asm-mips/mach-generic/kernel-entry-init.h rename to arch/mips/include/asm/mach-generic/kernel-entry-init.h diff --git a/include/asm-mips/mach-generic/kmalloc.h b/arch/mips/include/asm/mach-generic/kmalloc.h similarity index 100% rename from include/asm-mips/mach-generic/kmalloc.h rename to arch/mips/include/asm/mach-generic/kmalloc.h diff --git a/include/asm-mips/mach-generic/mangle-port.h b/arch/mips/include/asm/mach-generic/mangle-port.h similarity index 100% rename from include/asm-mips/mach-generic/mangle-port.h rename to arch/mips/include/asm/mach-generic/mangle-port.h diff --git a/include/asm-mips/mach-generic/mc146818rtc.h b/arch/mips/include/asm/mach-generic/mc146818rtc.h similarity index 100% rename from include/asm-mips/mach-generic/mc146818rtc.h rename to arch/mips/include/asm/mach-generic/mc146818rtc.h diff --git a/include/asm-mips/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h similarity index 100% rename from include/asm-mips/mach-generic/spaces.h rename to arch/mips/include/asm/mach-generic/spaces.h diff --git a/include/asm-mips/mach-generic/topology.h b/arch/mips/include/asm/mach-generic/topology.h similarity index 100% rename from include/asm-mips/mach-generic/topology.h rename to arch/mips/include/asm/mach-generic/topology.h diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-ip22/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-ip22/ds1286.h b/arch/mips/include/asm/mach-ip22/ds1286.h similarity index 100% rename from include/asm-mips/mach-ip22/ds1286.h rename to arch/mips/include/asm/mach-ip22/ds1286.h diff --git a/include/asm-mips/mach-ip22/spaces.h b/arch/mips/include/asm/mach-ip22/spaces.h similarity index 100% rename from include/asm-mips/mach-ip22/spaces.h rename to arch/mips/include/asm/mach-ip22/spaces.h diff --git a/include/asm-mips/mach-ip22/war.h b/arch/mips/include/asm/mach-ip22/war.h similarity index 100% rename from include/asm-mips/mach-ip22/war.h rename to arch/mips/include/asm/mach-ip22/war.h diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-ip27/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-ip27/dma-coherence.h b/arch/mips/include/asm/mach-ip27/dma-coherence.h similarity index 100% rename from include/asm-mips/mach-ip27/dma-coherence.h rename to arch/mips/include/asm/mach-ip27/dma-coherence.h diff --git a/include/asm-mips/mach-ip27/irq.h b/arch/mips/include/asm/mach-ip27/irq.h similarity index 100% rename from include/asm-mips/mach-ip27/irq.h rename to arch/mips/include/asm/mach-ip27/irq.h diff --git a/include/asm-mips/mach-ip27/kernel-entry-init.h b/arch/mips/include/asm/mach-ip27/kernel-entry-init.h similarity index 100% rename from include/asm-mips/mach-ip27/kernel-entry-init.h rename to arch/mips/include/asm/mach-ip27/kernel-entry-init.h diff --git a/include/asm-mips/mach-ip27/kmalloc.h b/arch/mips/include/asm/mach-ip27/kmalloc.h similarity index 100% rename from include/asm-mips/mach-ip27/kmalloc.h rename to arch/mips/include/asm/mach-ip27/kmalloc.h diff --git a/include/asm-mips/mach-ip27/mangle-port.h b/arch/mips/include/asm/mach-ip27/mangle-port.h similarity index 100% rename from include/asm-mips/mach-ip27/mangle-port.h rename to arch/mips/include/asm/mach-ip27/mangle-port.h diff --git a/include/asm-mips/mach-ip27/mmzone.h b/arch/mips/include/asm/mach-ip27/mmzone.h similarity index 100% rename from include/asm-mips/mach-ip27/mmzone.h rename to arch/mips/include/asm/mach-ip27/mmzone.h diff --git a/include/asm-mips/mach-ip27/spaces.h b/arch/mips/include/asm/mach-ip27/spaces.h similarity index 100% rename from include/asm-mips/mach-ip27/spaces.h rename to arch/mips/include/asm/mach-ip27/spaces.h diff --git a/include/asm-mips/mach-ip27/topology.h b/arch/mips/include/asm/mach-ip27/topology.h similarity index 100% rename from include/asm-mips/mach-ip27/topology.h rename to arch/mips/include/asm/mach-ip27/topology.h diff --git a/include/asm-mips/mach-ip27/war.h b/arch/mips/include/asm/mach-ip27/war.h similarity index 100% rename from include/asm-mips/mach-ip27/war.h rename to arch/mips/include/asm/mach-ip27/war.h diff --git a/include/asm-mips/mach-ip28/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-ip28/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-ip28/ds1286.h b/arch/mips/include/asm/mach-ip28/ds1286.h similarity index 100% rename from include/asm-mips/mach-ip28/ds1286.h rename to arch/mips/include/asm/mach-ip28/ds1286.h diff --git a/include/asm-mips/mach-ip28/spaces.h b/arch/mips/include/asm/mach-ip28/spaces.h similarity index 100% rename from include/asm-mips/mach-ip28/spaces.h rename to arch/mips/include/asm/mach-ip28/spaces.h diff --git a/include/asm-mips/mach-ip28/war.h b/arch/mips/include/asm/mach-ip28/war.h similarity index 100% rename from include/asm-mips/mach-ip28/war.h rename to arch/mips/include/asm/mach-ip28/war.h diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-ip32/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-ip32/dma-coherence.h b/arch/mips/include/asm/mach-ip32/dma-coherence.h similarity index 100% rename from include/asm-mips/mach-ip32/dma-coherence.h rename to arch/mips/include/asm/mach-ip32/dma-coherence.h diff --git a/include/asm-mips/mach-ip32/kmalloc.h b/arch/mips/include/asm/mach-ip32/kmalloc.h similarity index 100% rename from include/asm-mips/mach-ip32/kmalloc.h rename to arch/mips/include/asm/mach-ip32/kmalloc.h diff --git a/include/asm-mips/mach-ip32/mangle-port.h b/arch/mips/include/asm/mach-ip32/mangle-port.h similarity index 100% rename from include/asm-mips/mach-ip32/mangle-port.h rename to arch/mips/include/asm/mach-ip32/mangle-port.h diff --git a/include/asm-mips/mach-ip32/mc146818rtc.h b/arch/mips/include/asm/mach-ip32/mc146818rtc.h similarity index 100% rename from include/asm-mips/mach-ip32/mc146818rtc.h rename to arch/mips/include/asm/mach-ip32/mc146818rtc.h diff --git a/include/asm-mips/mach-ip32/war.h b/arch/mips/include/asm/mach-ip32/war.h similarity index 100% rename from include/asm-mips/mach-ip32/war.h rename to arch/mips/include/asm/mach-ip32/war.h diff --git a/include/asm-mips/mach-jazz/dma-coherence.h b/arch/mips/include/asm/mach-jazz/dma-coherence.h similarity index 100% rename from include/asm-mips/mach-jazz/dma-coherence.h rename to arch/mips/include/asm/mach-jazz/dma-coherence.h diff --git a/include/asm-mips/mach-jazz/floppy.h b/arch/mips/include/asm/mach-jazz/floppy.h similarity index 100% rename from include/asm-mips/mach-jazz/floppy.h rename to arch/mips/include/asm/mach-jazz/floppy.h diff --git a/include/asm-mips/mach-jazz/mc146818rtc.h b/arch/mips/include/asm/mach-jazz/mc146818rtc.h similarity index 100% rename from include/asm-mips/mach-jazz/mc146818rtc.h rename to arch/mips/include/asm/mach-jazz/mc146818rtc.h diff --git a/include/asm-mips/mach-jazz/war.h b/arch/mips/include/asm/mach-jazz/war.h similarity index 100% rename from include/asm-mips/mach-jazz/war.h rename to arch/mips/include/asm/mach-jazz/war.h diff --git a/include/asm-mips/mach-lasat/irq.h b/arch/mips/include/asm/mach-lasat/irq.h similarity index 100% rename from include/asm-mips/mach-lasat/irq.h rename to arch/mips/include/asm/mach-lasat/irq.h diff --git a/include/asm-mips/mach-lasat/mach-gt64120.h b/arch/mips/include/asm/mach-lasat/mach-gt64120.h similarity index 100% rename from include/asm-mips/mach-lasat/mach-gt64120.h rename to arch/mips/include/asm/mach-lasat/mach-gt64120.h diff --git a/include/asm-mips/mach-lasat/war.h b/arch/mips/include/asm/mach-lasat/war.h similarity index 100% rename from include/asm-mips/mach-lasat/war.h rename to arch/mips/include/asm/mach-lasat/war.h diff --git a/include/asm-mips/mach-lemote/dma-coherence.h b/arch/mips/include/asm/mach-lemote/dma-coherence.h similarity index 100% rename from include/asm-mips/mach-lemote/dma-coherence.h rename to arch/mips/include/asm/mach-lemote/dma-coherence.h diff --git a/include/asm-mips/mach-lemote/mc146818rtc.h b/arch/mips/include/asm/mach-lemote/mc146818rtc.h similarity index 100% rename from include/asm-mips/mach-lemote/mc146818rtc.h rename to arch/mips/include/asm/mach-lemote/mc146818rtc.h diff --git a/include/asm-mips/mach-lemote/war.h b/arch/mips/include/asm/mach-lemote/war.h similarity index 100% rename from include/asm-mips/mach-lemote/war.h rename to arch/mips/include/asm/mach-lemote/war.h diff --git a/include/asm-mips/mach-malta/cpu-feature-overrides.h b/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-malta/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-malta/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-malta/irq.h b/arch/mips/include/asm/mach-malta/irq.h similarity index 100% rename from include/asm-mips/mach-malta/irq.h rename to arch/mips/include/asm/mach-malta/irq.h diff --git a/include/asm-mips/mach-malta/kernel-entry-init.h b/arch/mips/include/asm/mach-malta/kernel-entry-init.h similarity index 100% rename from include/asm-mips/mach-malta/kernel-entry-init.h rename to arch/mips/include/asm/mach-malta/kernel-entry-init.h diff --git a/include/asm-mips/mach-malta/mach-gt64120.h b/arch/mips/include/asm/mach-malta/mach-gt64120.h similarity index 100% rename from include/asm-mips/mach-malta/mach-gt64120.h rename to arch/mips/include/asm/mach-malta/mach-gt64120.h diff --git a/include/asm-mips/mach-malta/mc146818rtc.h b/arch/mips/include/asm/mach-malta/mc146818rtc.h similarity index 100% rename from include/asm-mips/mach-malta/mc146818rtc.h rename to arch/mips/include/asm/mach-malta/mc146818rtc.h diff --git a/include/asm-mips/mach-malta/war.h b/arch/mips/include/asm/mach-malta/war.h similarity index 100% rename from include/asm-mips/mach-malta/war.h rename to arch/mips/include/asm/mach-malta/war.h diff --git a/include/asm-mips/mach-mipssim/cpu-feature-overrides.h b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-mipssim/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-mipssim/war.h b/arch/mips/include/asm/mach-mipssim/war.h similarity index 100% rename from include/asm-mips/mach-mipssim/war.h rename to arch/mips/include/asm/mach-mipssim/war.h diff --git a/include/asm-mips/mach-pb1x00/mc146818rtc.h b/arch/mips/include/asm/mach-pb1x00/mc146818rtc.h similarity index 100% rename from include/asm-mips/mach-pb1x00/mc146818rtc.h rename to arch/mips/include/asm/mach-pb1x00/mc146818rtc.h diff --git a/include/asm-mips/mach-pb1x00/pb1000.h b/arch/mips/include/asm/mach-pb1x00/pb1000.h similarity index 100% rename from include/asm-mips/mach-pb1x00/pb1000.h rename to arch/mips/include/asm/mach-pb1x00/pb1000.h diff --git a/include/asm-mips/mach-pb1x00/pb1100.h b/arch/mips/include/asm/mach-pb1x00/pb1100.h similarity index 100% rename from include/asm-mips/mach-pb1x00/pb1100.h rename to arch/mips/include/asm/mach-pb1x00/pb1100.h diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/arch/mips/include/asm/mach-pb1x00/pb1200.h similarity index 100% rename from include/asm-mips/mach-pb1x00/pb1200.h rename to arch/mips/include/asm/mach-pb1x00/pb1200.h diff --git a/include/asm-mips/mach-pb1x00/pb1500.h b/arch/mips/include/asm/mach-pb1x00/pb1500.h similarity index 100% rename from include/asm-mips/mach-pb1x00/pb1500.h rename to arch/mips/include/asm/mach-pb1x00/pb1500.h diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/arch/mips/include/asm/mach-pb1x00/pb1550.h similarity index 100% rename from include/asm-mips/mach-pb1x00/pb1550.h rename to arch/mips/include/asm/mach-pb1x00/pb1550.h diff --git a/include/asm-mips/mach-pnx8550/cm.h b/arch/mips/include/asm/mach-pnx8550/cm.h similarity index 100% rename from include/asm-mips/mach-pnx8550/cm.h rename to arch/mips/include/asm/mach-pnx8550/cm.h diff --git a/include/asm-mips/mach-pnx8550/glb.h b/arch/mips/include/asm/mach-pnx8550/glb.h similarity index 100% rename from include/asm-mips/mach-pnx8550/glb.h rename to arch/mips/include/asm/mach-pnx8550/glb.h diff --git a/include/asm-mips/mach-pnx8550/int.h b/arch/mips/include/asm/mach-pnx8550/int.h similarity index 100% rename from include/asm-mips/mach-pnx8550/int.h rename to arch/mips/include/asm/mach-pnx8550/int.h diff --git a/include/asm-mips/mach-pnx8550/kernel-entry-init.h b/arch/mips/include/asm/mach-pnx8550/kernel-entry-init.h similarity index 100% rename from include/asm-mips/mach-pnx8550/kernel-entry-init.h rename to arch/mips/include/asm/mach-pnx8550/kernel-entry-init.h diff --git a/include/asm-mips/mach-pnx8550/nand.h b/arch/mips/include/asm/mach-pnx8550/nand.h similarity index 100% rename from include/asm-mips/mach-pnx8550/nand.h rename to arch/mips/include/asm/mach-pnx8550/nand.h diff --git a/include/asm-mips/mach-pnx8550/pci.h b/arch/mips/include/asm/mach-pnx8550/pci.h similarity index 100% rename from include/asm-mips/mach-pnx8550/pci.h rename to arch/mips/include/asm/mach-pnx8550/pci.h diff --git a/include/asm-mips/mach-pnx8550/uart.h b/arch/mips/include/asm/mach-pnx8550/uart.h similarity index 100% rename from include/asm-mips/mach-pnx8550/uart.h rename to arch/mips/include/asm/mach-pnx8550/uart.h diff --git a/include/asm-mips/mach-pnx8550/usb.h b/arch/mips/include/asm/mach-pnx8550/usb.h similarity index 100% rename from include/asm-mips/mach-pnx8550/usb.h rename to arch/mips/include/asm/mach-pnx8550/usb.h diff --git a/include/asm-mips/mach-pnx8550/war.h b/arch/mips/include/asm/mach-pnx8550/war.h similarity index 100% rename from include/asm-mips/mach-pnx8550/war.h rename to arch/mips/include/asm/mach-pnx8550/war.h diff --git a/include/asm-mips/mach-rc32434/cpu-feature-overrides.h b/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-rc32434/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-rc32434/ddr.h b/arch/mips/include/asm/mach-rc32434/ddr.h similarity index 100% rename from include/asm-mips/mach-rc32434/ddr.h rename to arch/mips/include/asm/mach-rc32434/ddr.h diff --git a/include/asm-mips/mach-rc32434/dma.h b/arch/mips/include/asm/mach-rc32434/dma.h similarity index 100% rename from include/asm-mips/mach-rc32434/dma.h rename to arch/mips/include/asm/mach-rc32434/dma.h diff --git a/include/asm-mips/mach-rc32434/dma_v.h b/arch/mips/include/asm/mach-rc32434/dma_v.h similarity index 100% rename from include/asm-mips/mach-rc32434/dma_v.h rename to arch/mips/include/asm/mach-rc32434/dma_v.h diff --git a/include/asm-mips/mach-rc32434/eth.h b/arch/mips/include/asm/mach-rc32434/eth.h similarity index 100% rename from include/asm-mips/mach-rc32434/eth.h rename to arch/mips/include/asm/mach-rc32434/eth.h diff --git a/include/asm-mips/mach-rc32434/gpio.h b/arch/mips/include/asm/mach-rc32434/gpio.h similarity index 100% rename from include/asm-mips/mach-rc32434/gpio.h rename to arch/mips/include/asm/mach-rc32434/gpio.h diff --git a/include/asm-mips/mach-rc32434/integ.h b/arch/mips/include/asm/mach-rc32434/integ.h similarity index 100% rename from include/asm-mips/mach-rc32434/integ.h rename to arch/mips/include/asm/mach-rc32434/integ.h diff --git a/include/asm-mips/mach-rc32434/irq.h b/arch/mips/include/asm/mach-rc32434/irq.h similarity index 100% rename from include/asm-mips/mach-rc32434/irq.h rename to arch/mips/include/asm/mach-rc32434/irq.h diff --git a/include/asm-mips/mach-rc32434/pci.h b/arch/mips/include/asm/mach-rc32434/pci.h similarity index 100% rename from include/asm-mips/mach-rc32434/pci.h rename to arch/mips/include/asm/mach-rc32434/pci.h diff --git a/include/asm-mips/mach-rc32434/prom.h b/arch/mips/include/asm/mach-rc32434/prom.h similarity index 100% rename from include/asm-mips/mach-rc32434/prom.h rename to arch/mips/include/asm/mach-rc32434/prom.h diff --git a/include/asm-mips/mach-rc32434/rb.h b/arch/mips/include/asm/mach-rc32434/rb.h similarity index 100% rename from include/asm-mips/mach-rc32434/rb.h rename to arch/mips/include/asm/mach-rc32434/rb.h diff --git a/include/asm-mips/mach-rc32434/rc32434.h b/arch/mips/include/asm/mach-rc32434/rc32434.h similarity index 100% rename from include/asm-mips/mach-rc32434/rc32434.h rename to arch/mips/include/asm/mach-rc32434/rc32434.h diff --git a/include/asm-mips/mach-rc32434/timer.h b/arch/mips/include/asm/mach-rc32434/timer.h similarity index 100% rename from include/asm-mips/mach-rc32434/timer.h rename to arch/mips/include/asm/mach-rc32434/timer.h diff --git a/include/asm-mips/mach-rc32434/war.h b/arch/mips/include/asm/mach-rc32434/war.h similarity index 100% rename from include/asm-mips/mach-rc32434/war.h rename to arch/mips/include/asm/mach-rc32434/war.h diff --git a/include/asm-mips/mach-rm/cpu-feature-overrides.h b/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-rm/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-rm/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-rm/mc146818rtc.h b/arch/mips/include/asm/mach-rm/mc146818rtc.h similarity index 100% rename from include/asm-mips/mach-rm/mc146818rtc.h rename to arch/mips/include/asm/mach-rm/mc146818rtc.h diff --git a/include/asm-mips/mach-rm/war.h b/arch/mips/include/asm/mach-rm/war.h similarity index 100% rename from include/asm-mips/mach-rm/war.h rename to arch/mips/include/asm/mach-rm/war.h diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-sibyte/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h similarity index 100% rename from include/asm-mips/mach-sibyte/war.h rename to arch/mips/include/asm/mach-sibyte/war.h diff --git a/include/asm-mips/mach-tx39xx/ioremap.h b/arch/mips/include/asm/mach-tx39xx/ioremap.h similarity index 100% rename from include/asm-mips/mach-tx39xx/ioremap.h rename to arch/mips/include/asm/mach-tx39xx/ioremap.h diff --git a/include/asm-mips/mach-tx39xx/mangle-port.h b/arch/mips/include/asm/mach-tx39xx/mangle-port.h similarity index 100% rename from include/asm-mips/mach-tx39xx/mangle-port.h rename to arch/mips/include/asm/mach-tx39xx/mangle-port.h diff --git a/include/asm-mips/mach-tx39xx/war.h b/arch/mips/include/asm/mach-tx39xx/war.h similarity index 100% rename from include/asm-mips/mach-tx39xx/war.h rename to arch/mips/include/asm/mach-tx39xx/war.h diff --git a/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-tx49xx/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-tx49xx/ioremap.h b/arch/mips/include/asm/mach-tx49xx/ioremap.h similarity index 100% rename from include/asm-mips/mach-tx49xx/ioremap.h rename to arch/mips/include/asm/mach-tx49xx/ioremap.h diff --git a/include/asm-mips/mach-tx49xx/kmalloc.h b/arch/mips/include/asm/mach-tx49xx/kmalloc.h similarity index 100% rename from include/asm-mips/mach-tx49xx/kmalloc.h rename to arch/mips/include/asm/mach-tx49xx/kmalloc.h diff --git a/include/asm-mips/mach-tx49xx/war.h b/arch/mips/include/asm/mach-tx49xx/war.h similarity index 100% rename from include/asm-mips/mach-tx49xx/war.h rename to arch/mips/include/asm/mach-tx49xx/war.h diff --git a/include/asm-mips/mach-vr41xx/irq.h b/arch/mips/include/asm/mach-vr41xx/irq.h similarity index 100% rename from include/asm-mips/mach-vr41xx/irq.h rename to arch/mips/include/asm/mach-vr41xx/irq.h diff --git a/include/asm-mips/mach-vr41xx/war.h b/arch/mips/include/asm/mach-vr41xx/war.h similarity index 100% rename from include/asm-mips/mach-vr41xx/war.h rename to arch/mips/include/asm/mach-vr41xx/war.h diff --git a/include/asm-mips/mach-wrppmc/mach-gt64120.h b/arch/mips/include/asm/mach-wrppmc/mach-gt64120.h similarity index 100% rename from include/asm-mips/mach-wrppmc/mach-gt64120.h rename to arch/mips/include/asm/mach-wrppmc/mach-gt64120.h diff --git a/include/asm-mips/mach-wrppmc/war.h b/arch/mips/include/asm/mach-wrppmc/war.h similarity index 100% rename from include/asm-mips/mach-wrppmc/war.h rename to arch/mips/include/asm/mach-wrppmc/war.h diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h similarity index 100% rename from include/asm-mips/mach-yosemite/cpu-feature-overrides.h rename to arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h diff --git a/include/asm-mips/mach-yosemite/war.h b/arch/mips/include/asm/mach-yosemite/war.h similarity index 100% rename from include/asm-mips/mach-yosemite/war.h rename to arch/mips/include/asm/mach-yosemite/war.h diff --git a/include/asm-mips/mc146818-time.h b/arch/mips/include/asm/mc146818-time.h similarity index 100% rename from include/asm-mips/mc146818-time.h rename to arch/mips/include/asm/mc146818-time.h diff --git a/include/asm-mips/mc146818rtc.h b/arch/mips/include/asm/mc146818rtc.h similarity index 100% rename from include/asm-mips/mc146818rtc.h rename to arch/mips/include/asm/mc146818rtc.h diff --git a/include/asm-mips/mips-boards/bonito64.h b/arch/mips/include/asm/mips-boards/bonito64.h similarity index 100% rename from include/asm-mips/mips-boards/bonito64.h rename to arch/mips/include/asm/mips-boards/bonito64.h diff --git a/include/asm-mips/mips-boards/generic.h b/arch/mips/include/asm/mips-boards/generic.h similarity index 100% rename from include/asm-mips/mips-boards/generic.h rename to arch/mips/include/asm/mips-boards/generic.h diff --git a/include/asm-mips/mips-boards/launch.h b/arch/mips/include/asm/mips-boards/launch.h similarity index 100% rename from include/asm-mips/mips-boards/launch.h rename to arch/mips/include/asm/mips-boards/launch.h diff --git a/include/asm-mips/mips-boards/malta.h b/arch/mips/include/asm/mips-boards/malta.h similarity index 100% rename from include/asm-mips/mips-boards/malta.h rename to arch/mips/include/asm/mips-boards/malta.h diff --git a/include/asm-mips/mips-boards/maltaint.h b/arch/mips/include/asm/mips-boards/maltaint.h similarity index 100% rename from include/asm-mips/mips-boards/maltaint.h rename to arch/mips/include/asm/mips-boards/maltaint.h diff --git a/include/asm-mips/mips-boards/msc01_pci.h b/arch/mips/include/asm/mips-boards/msc01_pci.h similarity index 100% rename from include/asm-mips/mips-boards/msc01_pci.h rename to arch/mips/include/asm/mips-boards/msc01_pci.h diff --git a/include/asm-mips/mips-boards/piix4.h b/arch/mips/include/asm/mips-boards/piix4.h similarity index 100% rename from include/asm-mips/mips-boards/piix4.h rename to arch/mips/include/asm/mips-boards/piix4.h diff --git a/include/asm-mips/mips-boards/prom.h b/arch/mips/include/asm/mips-boards/prom.h similarity index 100% rename from include/asm-mips/mips-boards/prom.h rename to arch/mips/include/asm/mips-boards/prom.h diff --git a/include/asm-mips/mips-boards/sim.h b/arch/mips/include/asm/mips-boards/sim.h similarity index 100% rename from include/asm-mips/mips-boards/sim.h rename to arch/mips/include/asm/mips-boards/sim.h diff --git a/include/asm-mips/mips-boards/simint.h b/arch/mips/include/asm/mips-boards/simint.h similarity index 100% rename from include/asm-mips/mips-boards/simint.h rename to arch/mips/include/asm/mips-boards/simint.h diff --git a/include/asm-mips/mips_mt.h b/arch/mips/include/asm/mips_mt.h similarity index 100% rename from include/asm-mips/mips_mt.h rename to arch/mips/include/asm/mips_mt.h diff --git a/include/asm-mips/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h similarity index 100% rename from include/asm-mips/mipsmtregs.h rename to arch/mips/include/asm/mipsmtregs.h diff --git a/include/asm-mips/mipsprom.h b/arch/mips/include/asm/mipsprom.h similarity index 100% rename from include/asm-mips/mipsprom.h rename to arch/mips/include/asm/mipsprom.h diff --git a/include/asm-mips/mipsregs.h b/arch/mips/include/asm/mipsregs.h similarity index 100% rename from include/asm-mips/mipsregs.h rename to arch/mips/include/asm/mipsregs.h diff --git a/include/asm-mips/mman.h b/arch/mips/include/asm/mman.h similarity index 100% rename from include/asm-mips/mman.h rename to arch/mips/include/asm/mman.h diff --git a/include/asm-mips/mmu.h b/arch/mips/include/asm/mmu.h similarity index 100% rename from include/asm-mips/mmu.h rename to arch/mips/include/asm/mmu.h diff --git a/include/asm-mips/mmu_context.h b/arch/mips/include/asm/mmu_context.h similarity index 97% rename from include/asm-mips/mmu_context.h rename to arch/mips/include/asm/mmu_context.h index 0c4f245eaeb2..d7f3eb03ad12 100644 --- a/include/asm-mips/mmu_context.h +++ b/arch/mips/include/asm/mmu_context.h @@ -220,8 +220,8 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next) oldasid = read_c0_entryhi() & ASID_MASK; if(smtc_live_asid[mytlb][oldasid]) { smtc_live_asid[mytlb][oldasid] &= ~(0x1 << cpu); - if(smtc_live_asid[mytlb][oldasid] == 0) - smtc_flush_tlb_asid(oldasid); + if(smtc_live_asid[mytlb][oldasid] == 0) + smtc_flush_tlb_asid(oldasid); } /* See comments for similar code above */ write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) | @@ -285,8 +285,8 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu) /* SMTC shares the TLB (and ASIDs) across VPEs */ for_each_online_cpu(i) { - if((smtc_status & SMTC_TLB_SHARED) - || (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id)) + if((smtc_status & SMTC_TLB_SHARED) + || (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id)) cpu_context(i, mm) = 0; } #endif /* CONFIG_MIPS_MT_SMTC */ diff --git a/include/asm-mips/mmzone.h b/arch/mips/include/asm/mmzone.h similarity index 100% rename from include/asm-mips/mmzone.h rename to arch/mips/include/asm/mmzone.h diff --git a/include/asm-mips/module.h b/arch/mips/include/asm/module.h similarity index 100% rename from include/asm-mips/module.h rename to arch/mips/include/asm/module.h diff --git a/include/asm-mips/msc01_ic.h b/arch/mips/include/asm/msc01_ic.h similarity index 100% rename from include/asm-mips/msc01_ic.h rename to arch/mips/include/asm/msc01_ic.h diff --git a/include/asm-mips/msgbuf.h b/arch/mips/include/asm/msgbuf.h similarity index 100% rename from include/asm-mips/msgbuf.h rename to arch/mips/include/asm/msgbuf.h diff --git a/include/asm-mips/mutex.h b/arch/mips/include/asm/mutex.h similarity index 100% rename from include/asm-mips/mutex.h rename to arch/mips/include/asm/mutex.h diff --git a/include/asm-mips/nile4.h b/arch/mips/include/asm/nile4.h similarity index 100% rename from include/asm-mips/nile4.h rename to arch/mips/include/asm/nile4.h diff --git a/include/asm-mips/paccess.h b/arch/mips/include/asm/paccess.h similarity index 100% rename from include/asm-mips/paccess.h rename to arch/mips/include/asm/paccess.h diff --git a/include/asm-mips/page.h b/arch/mips/include/asm/page.h similarity index 100% rename from include/asm-mips/page.h rename to arch/mips/include/asm/page.h diff --git a/include/asm-mips/param.h b/arch/mips/include/asm/param.h similarity index 100% rename from include/asm-mips/param.h rename to arch/mips/include/asm/param.h diff --git a/include/asm-mips/parport.h b/arch/mips/include/asm/parport.h similarity index 100% rename from include/asm-mips/parport.h rename to arch/mips/include/asm/parport.h diff --git a/include/asm-mips/pci.h b/arch/mips/include/asm/pci.h similarity index 100% rename from include/asm-mips/pci.h rename to arch/mips/include/asm/pci.h diff --git a/include/asm-mips/pci/bridge.h b/arch/mips/include/asm/pci/bridge.h similarity index 100% rename from include/asm-mips/pci/bridge.h rename to arch/mips/include/asm/pci/bridge.h diff --git a/include/asm-mips/percpu.h b/arch/mips/include/asm/percpu.h similarity index 100% rename from include/asm-mips/percpu.h rename to arch/mips/include/asm/percpu.h diff --git a/include/asm-mips/pgalloc.h b/arch/mips/include/asm/pgalloc.h similarity index 100% rename from include/asm-mips/pgalloc.h rename to arch/mips/include/asm/pgalloc.h diff --git a/include/asm-mips/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h similarity index 100% rename from include/asm-mips/pgtable-32.h rename to arch/mips/include/asm/pgtable-32.h diff --git a/include/asm-mips/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h similarity index 100% rename from include/asm-mips/pgtable-64.h rename to arch/mips/include/asm/pgtable-64.h diff --git a/include/asm-mips/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h similarity index 100% rename from include/asm-mips/pgtable-bits.h rename to arch/mips/include/asm/pgtable-bits.h diff --git a/include/asm-mips/pgtable.h b/arch/mips/include/asm/pgtable.h similarity index 100% rename from include/asm-mips/pgtable.h rename to arch/mips/include/asm/pgtable.h diff --git a/include/asm-mips/pmc-sierra/msp71xx/gpio.h b/arch/mips/include/asm/pmc-sierra/msp71xx/gpio.h similarity index 100% rename from include/asm-mips/pmc-sierra/msp71xx/gpio.h rename to arch/mips/include/asm/pmc-sierra/msp71xx/gpio.h diff --git a/include/asm-mips/pmc-sierra/msp71xx/msp_cic_int.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_cic_int.h similarity index 100% rename from include/asm-mips/pmc-sierra/msp71xx/msp_cic_int.h rename to arch/mips/include/asm/pmc-sierra/msp71xx/msp_cic_int.h diff --git a/include/asm-mips/pmc-sierra/msp71xx/msp_int.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_int.h similarity index 100% rename from include/asm-mips/pmc-sierra/msp71xx/msp_int.h rename to arch/mips/include/asm/pmc-sierra/msp71xx/msp_int.h diff --git a/include/asm-mips/pmc-sierra/msp71xx/msp_pci.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_pci.h similarity index 100% rename from include/asm-mips/pmc-sierra/msp71xx/msp_pci.h rename to arch/mips/include/asm/pmc-sierra/msp71xx/msp_pci.h diff --git a/include/asm-mips/pmc-sierra/msp71xx/msp_prom.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_prom.h similarity index 100% rename from include/asm-mips/pmc-sierra/msp71xx/msp_prom.h rename to arch/mips/include/asm/pmc-sierra/msp71xx/msp_prom.h diff --git a/include/asm-mips/pmc-sierra/msp71xx/msp_regops.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regops.h similarity index 100% rename from include/asm-mips/pmc-sierra/msp71xx/msp_regops.h rename to arch/mips/include/asm/pmc-sierra/msp71xx/msp_regops.h diff --git a/include/asm-mips/pmc-sierra/msp71xx/msp_regs.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h similarity index 100% rename from include/asm-mips/pmc-sierra/msp71xx/msp_regs.h rename to arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h diff --git a/include/asm-mips/pmc-sierra/msp71xx/msp_slp_int.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_slp_int.h similarity index 100% rename from include/asm-mips/pmc-sierra/msp71xx/msp_slp_int.h rename to arch/mips/include/asm/pmc-sierra/msp71xx/msp_slp_int.h diff --git a/include/asm-mips/pmc-sierra/msp71xx/war.h b/arch/mips/include/asm/pmc-sierra/msp71xx/war.h similarity index 100% rename from include/asm-mips/pmc-sierra/msp71xx/war.h rename to arch/mips/include/asm/pmc-sierra/msp71xx/war.h diff --git a/include/asm-mips/pmon.h b/arch/mips/include/asm/pmon.h similarity index 100% rename from include/asm-mips/pmon.h rename to arch/mips/include/asm/pmon.h diff --git a/include/asm-mips/poll.h b/arch/mips/include/asm/poll.h similarity index 100% rename from include/asm-mips/poll.h rename to arch/mips/include/asm/poll.h diff --git a/include/asm-mips/posix_types.h b/arch/mips/include/asm/posix_types.h similarity index 100% rename from include/asm-mips/posix_types.h rename to arch/mips/include/asm/posix_types.h diff --git a/include/asm-mips/prefetch.h b/arch/mips/include/asm/prefetch.h similarity index 100% rename from include/asm-mips/prefetch.h rename to arch/mips/include/asm/prefetch.h diff --git a/include/asm-mips/processor.h b/arch/mips/include/asm/processor.h similarity index 100% rename from include/asm-mips/processor.h rename to arch/mips/include/asm/processor.h diff --git a/include/asm-mips/ptrace.h b/arch/mips/include/asm/ptrace.h similarity index 100% rename from include/asm-mips/ptrace.h rename to arch/mips/include/asm/ptrace.h diff --git a/include/asm-mips/r4k-timer.h b/arch/mips/include/asm/r4k-timer.h similarity index 100% rename from include/asm-mips/r4k-timer.h rename to arch/mips/include/asm/r4k-timer.h diff --git a/include/asm-mips/r4kcache.h b/arch/mips/include/asm/r4kcache.h similarity index 100% rename from include/asm-mips/r4kcache.h rename to arch/mips/include/asm/r4kcache.h diff --git a/include/asm-mips/reboot.h b/arch/mips/include/asm/reboot.h similarity index 100% rename from include/asm-mips/reboot.h rename to arch/mips/include/asm/reboot.h diff --git a/include/asm-mips/reg.h b/arch/mips/include/asm/reg.h similarity index 100% rename from include/asm-mips/reg.h rename to arch/mips/include/asm/reg.h diff --git a/include/asm-mips/regdef.h b/arch/mips/include/asm/regdef.h similarity index 100% rename from include/asm-mips/regdef.h rename to arch/mips/include/asm/regdef.h diff --git a/include/asm-mips/resource.h b/arch/mips/include/asm/resource.h similarity index 100% rename from include/asm-mips/resource.h rename to arch/mips/include/asm/resource.h diff --git a/include/asm-mips/rm9k-ocd.h b/arch/mips/include/asm/rm9k-ocd.h similarity index 100% rename from include/asm-mips/rm9k-ocd.h rename to arch/mips/include/asm/rm9k-ocd.h diff --git a/include/asm-mips/rtlx.h b/arch/mips/include/asm/rtlx.h similarity index 100% rename from include/asm-mips/rtlx.h rename to arch/mips/include/asm/rtlx.h diff --git a/include/asm-mips/scatterlist.h b/arch/mips/include/asm/scatterlist.h similarity index 100% rename from include/asm-mips/scatterlist.h rename to arch/mips/include/asm/scatterlist.h diff --git a/include/asm-mips/seccomp.h b/arch/mips/include/asm/seccomp.h similarity index 100% rename from include/asm-mips/seccomp.h rename to arch/mips/include/asm/seccomp.h diff --git a/include/asm-mips/sections.h b/arch/mips/include/asm/sections.h similarity index 100% rename from include/asm-mips/sections.h rename to arch/mips/include/asm/sections.h diff --git a/include/asm-mips/segment.h b/arch/mips/include/asm/segment.h similarity index 100% rename from include/asm-mips/segment.h rename to arch/mips/include/asm/segment.h diff --git a/include/asm-mips/sembuf.h b/arch/mips/include/asm/sembuf.h similarity index 100% rename from include/asm-mips/sembuf.h rename to arch/mips/include/asm/sembuf.h diff --git a/include/asm-mips/serial.h b/arch/mips/include/asm/serial.h similarity index 100% rename from include/asm-mips/serial.h rename to arch/mips/include/asm/serial.h diff --git a/include/asm-mips/setup.h b/arch/mips/include/asm/setup.h similarity index 100% rename from include/asm-mips/setup.h rename to arch/mips/include/asm/setup.h diff --git a/include/asm-mips/sgi/gio.h b/arch/mips/include/asm/sgi/gio.h similarity index 100% rename from include/asm-mips/sgi/gio.h rename to arch/mips/include/asm/sgi/gio.h diff --git a/include/asm-mips/sgi/hpc3.h b/arch/mips/include/asm/sgi/hpc3.h similarity index 100% rename from include/asm-mips/sgi/hpc3.h rename to arch/mips/include/asm/sgi/hpc3.h diff --git a/include/asm-mips/sgi/ioc.h b/arch/mips/include/asm/sgi/ioc.h similarity index 100% rename from include/asm-mips/sgi/ioc.h rename to arch/mips/include/asm/sgi/ioc.h diff --git a/include/asm-mips/sgi/ip22.h b/arch/mips/include/asm/sgi/ip22.h similarity index 100% rename from include/asm-mips/sgi/ip22.h rename to arch/mips/include/asm/sgi/ip22.h diff --git a/include/asm-mips/sgi/mc.h b/arch/mips/include/asm/sgi/mc.h similarity index 100% rename from include/asm-mips/sgi/mc.h rename to arch/mips/include/asm/sgi/mc.h diff --git a/include/asm-mips/sgi/pi1.h b/arch/mips/include/asm/sgi/pi1.h similarity index 100% rename from include/asm-mips/sgi/pi1.h rename to arch/mips/include/asm/sgi/pi1.h diff --git a/include/asm-mips/sgi/seeq.h b/arch/mips/include/asm/sgi/seeq.h similarity index 100% rename from include/asm-mips/sgi/seeq.h rename to arch/mips/include/asm/sgi/seeq.h diff --git a/include/asm-mips/sgi/sgi.h b/arch/mips/include/asm/sgi/sgi.h similarity index 100% rename from include/asm-mips/sgi/sgi.h rename to arch/mips/include/asm/sgi/sgi.h diff --git a/include/asm-mips/sgi/wd.h b/arch/mips/include/asm/sgi/wd.h similarity index 100% rename from include/asm-mips/sgi/wd.h rename to arch/mips/include/asm/sgi/wd.h diff --git a/include/asm-mips/sgialib.h b/arch/mips/include/asm/sgialib.h similarity index 100% rename from include/asm-mips/sgialib.h rename to arch/mips/include/asm/sgialib.h diff --git a/include/asm-mips/sgiarcs.h b/arch/mips/include/asm/sgiarcs.h similarity index 100% rename from include/asm-mips/sgiarcs.h rename to arch/mips/include/asm/sgiarcs.h diff --git a/include/asm-mips/sgidefs.h b/arch/mips/include/asm/sgidefs.h similarity index 100% rename from include/asm-mips/sgidefs.h rename to arch/mips/include/asm/sgidefs.h diff --git a/include/asm-mips/shmbuf.h b/arch/mips/include/asm/shmbuf.h similarity index 100% rename from include/asm-mips/shmbuf.h rename to arch/mips/include/asm/shmbuf.h diff --git a/include/asm-mips/shmparam.h b/arch/mips/include/asm/shmparam.h similarity index 100% rename from include/asm-mips/shmparam.h rename to arch/mips/include/asm/shmparam.h diff --git a/include/asm-mips/sibyte/bcm1480_int.h b/arch/mips/include/asm/sibyte/bcm1480_int.h similarity index 100% rename from include/asm-mips/sibyte/bcm1480_int.h rename to arch/mips/include/asm/sibyte/bcm1480_int.h diff --git a/include/asm-mips/sibyte/bcm1480_l2c.h b/arch/mips/include/asm/sibyte/bcm1480_l2c.h similarity index 100% rename from include/asm-mips/sibyte/bcm1480_l2c.h rename to arch/mips/include/asm/sibyte/bcm1480_l2c.h diff --git a/include/asm-mips/sibyte/bcm1480_mc.h b/arch/mips/include/asm/sibyte/bcm1480_mc.h similarity index 100% rename from include/asm-mips/sibyte/bcm1480_mc.h rename to arch/mips/include/asm/sibyte/bcm1480_mc.h diff --git a/include/asm-mips/sibyte/bcm1480_regs.h b/arch/mips/include/asm/sibyte/bcm1480_regs.h similarity index 100% rename from include/asm-mips/sibyte/bcm1480_regs.h rename to arch/mips/include/asm/sibyte/bcm1480_regs.h diff --git a/include/asm-mips/sibyte/bcm1480_scd.h b/arch/mips/include/asm/sibyte/bcm1480_scd.h similarity index 100% rename from include/asm-mips/sibyte/bcm1480_scd.h rename to arch/mips/include/asm/sibyte/bcm1480_scd.h diff --git a/include/asm-mips/sibyte/bigsur.h b/arch/mips/include/asm/sibyte/bigsur.h similarity index 100% rename from include/asm-mips/sibyte/bigsur.h rename to arch/mips/include/asm/sibyte/bigsur.h diff --git a/include/asm-mips/sibyte/board.h b/arch/mips/include/asm/sibyte/board.h similarity index 100% rename from include/asm-mips/sibyte/board.h rename to arch/mips/include/asm/sibyte/board.h diff --git a/include/asm-mips/sibyte/carmel.h b/arch/mips/include/asm/sibyte/carmel.h similarity index 100% rename from include/asm-mips/sibyte/carmel.h rename to arch/mips/include/asm/sibyte/carmel.h diff --git a/include/asm-mips/sibyte/sb1250.h b/arch/mips/include/asm/sibyte/sb1250.h similarity index 100% rename from include/asm-mips/sibyte/sb1250.h rename to arch/mips/include/asm/sibyte/sb1250.h diff --git a/include/asm-mips/sibyte/sb1250_defs.h b/arch/mips/include/asm/sibyte/sb1250_defs.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_defs.h rename to arch/mips/include/asm/sibyte/sb1250_defs.h diff --git a/include/asm-mips/sibyte/sb1250_dma.h b/arch/mips/include/asm/sibyte/sb1250_dma.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_dma.h rename to arch/mips/include/asm/sibyte/sb1250_dma.h diff --git a/include/asm-mips/sibyte/sb1250_genbus.h b/arch/mips/include/asm/sibyte/sb1250_genbus.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_genbus.h rename to arch/mips/include/asm/sibyte/sb1250_genbus.h diff --git a/include/asm-mips/sibyte/sb1250_int.h b/arch/mips/include/asm/sibyte/sb1250_int.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_int.h rename to arch/mips/include/asm/sibyte/sb1250_int.h diff --git a/include/asm-mips/sibyte/sb1250_l2c.h b/arch/mips/include/asm/sibyte/sb1250_l2c.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_l2c.h rename to arch/mips/include/asm/sibyte/sb1250_l2c.h diff --git a/include/asm-mips/sibyte/sb1250_ldt.h b/arch/mips/include/asm/sibyte/sb1250_ldt.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_ldt.h rename to arch/mips/include/asm/sibyte/sb1250_ldt.h diff --git a/include/asm-mips/sibyte/sb1250_mac.h b/arch/mips/include/asm/sibyte/sb1250_mac.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_mac.h rename to arch/mips/include/asm/sibyte/sb1250_mac.h diff --git a/include/asm-mips/sibyte/sb1250_mc.h b/arch/mips/include/asm/sibyte/sb1250_mc.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_mc.h rename to arch/mips/include/asm/sibyte/sb1250_mc.h diff --git a/include/asm-mips/sibyte/sb1250_regs.h b/arch/mips/include/asm/sibyte/sb1250_regs.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_regs.h rename to arch/mips/include/asm/sibyte/sb1250_regs.h diff --git a/include/asm-mips/sibyte/sb1250_scd.h b/arch/mips/include/asm/sibyte/sb1250_scd.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_scd.h rename to arch/mips/include/asm/sibyte/sb1250_scd.h diff --git a/include/asm-mips/sibyte/sb1250_smbus.h b/arch/mips/include/asm/sibyte/sb1250_smbus.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_smbus.h rename to arch/mips/include/asm/sibyte/sb1250_smbus.h diff --git a/include/asm-mips/sibyte/sb1250_syncser.h b/arch/mips/include/asm/sibyte/sb1250_syncser.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_syncser.h rename to arch/mips/include/asm/sibyte/sb1250_syncser.h diff --git a/include/asm-mips/sibyte/sb1250_uart.h b/arch/mips/include/asm/sibyte/sb1250_uart.h similarity index 100% rename from include/asm-mips/sibyte/sb1250_uart.h rename to arch/mips/include/asm/sibyte/sb1250_uart.h diff --git a/include/asm-mips/sibyte/sentosa.h b/arch/mips/include/asm/sibyte/sentosa.h similarity index 100% rename from include/asm-mips/sibyte/sentosa.h rename to arch/mips/include/asm/sibyte/sentosa.h diff --git a/include/asm-mips/sibyte/swarm.h b/arch/mips/include/asm/sibyte/swarm.h similarity index 100% rename from include/asm-mips/sibyte/swarm.h rename to arch/mips/include/asm/sibyte/swarm.h diff --git a/include/asm-mips/sigcontext.h b/arch/mips/include/asm/sigcontext.h similarity index 100% rename from include/asm-mips/sigcontext.h rename to arch/mips/include/asm/sigcontext.h diff --git a/include/asm-mips/siginfo.h b/arch/mips/include/asm/siginfo.h similarity index 100% rename from include/asm-mips/siginfo.h rename to arch/mips/include/asm/siginfo.h diff --git a/include/asm-mips/signal.h b/arch/mips/include/asm/signal.h similarity index 100% rename from include/asm-mips/signal.h rename to arch/mips/include/asm/signal.h diff --git a/include/asm-mips/sim.h b/arch/mips/include/asm/sim.h similarity index 100% rename from include/asm-mips/sim.h rename to arch/mips/include/asm/sim.h diff --git a/include/asm-mips/smp-ops.h b/arch/mips/include/asm/smp-ops.h similarity index 100% rename from include/asm-mips/smp-ops.h rename to arch/mips/include/asm/smp-ops.h diff --git a/include/asm-mips/smp.h b/arch/mips/include/asm/smp.h similarity index 100% rename from include/asm-mips/smp.h rename to arch/mips/include/asm/smp.h diff --git a/include/asm-mips/smtc.h b/arch/mips/include/asm/smtc.h similarity index 100% rename from include/asm-mips/smtc.h rename to arch/mips/include/asm/smtc.h diff --git a/include/asm-mips/smtc_ipi.h b/arch/mips/include/asm/smtc_ipi.h similarity index 100% rename from include/asm-mips/smtc_ipi.h rename to arch/mips/include/asm/smtc_ipi.h diff --git a/include/asm-mips/smtc_proc.h b/arch/mips/include/asm/smtc_proc.h similarity index 100% rename from include/asm-mips/smtc_proc.h rename to arch/mips/include/asm/smtc_proc.h diff --git a/include/asm-mips/smvp.h b/arch/mips/include/asm/smvp.h similarity index 100% rename from include/asm-mips/smvp.h rename to arch/mips/include/asm/smvp.h diff --git a/include/asm-mips/sn/addrs.h b/arch/mips/include/asm/sn/addrs.h similarity index 100% rename from include/asm-mips/sn/addrs.h rename to arch/mips/include/asm/sn/addrs.h diff --git a/include/asm-mips/sn/agent.h b/arch/mips/include/asm/sn/agent.h similarity index 100% rename from include/asm-mips/sn/agent.h rename to arch/mips/include/asm/sn/agent.h diff --git a/include/asm-mips/sn/arch.h b/arch/mips/include/asm/sn/arch.h similarity index 100% rename from include/asm-mips/sn/arch.h rename to arch/mips/include/asm/sn/arch.h diff --git a/include/asm-mips/sn/fru.h b/arch/mips/include/asm/sn/fru.h similarity index 100% rename from include/asm-mips/sn/fru.h rename to arch/mips/include/asm/sn/fru.h diff --git a/include/asm-mips/sn/gda.h b/arch/mips/include/asm/sn/gda.h similarity index 100% rename from include/asm-mips/sn/gda.h rename to arch/mips/include/asm/sn/gda.h diff --git a/include/asm-mips/sn/hub.h b/arch/mips/include/asm/sn/hub.h similarity index 100% rename from include/asm-mips/sn/hub.h rename to arch/mips/include/asm/sn/hub.h diff --git a/include/asm-mips/sn/intr.h b/arch/mips/include/asm/sn/intr.h similarity index 100% rename from include/asm-mips/sn/intr.h rename to arch/mips/include/asm/sn/intr.h diff --git a/include/asm-mips/sn/io.h b/arch/mips/include/asm/sn/io.h similarity index 100% rename from include/asm-mips/sn/io.h rename to arch/mips/include/asm/sn/io.h diff --git a/include/asm-mips/sn/ioc3.h b/arch/mips/include/asm/sn/ioc3.h similarity index 100% rename from include/asm-mips/sn/ioc3.h rename to arch/mips/include/asm/sn/ioc3.h diff --git a/include/asm-mips/sn/klconfig.h b/arch/mips/include/asm/sn/klconfig.h similarity index 96% rename from include/asm-mips/sn/klconfig.h rename to arch/mips/include/asm/sn/klconfig.h index 96cfd2ab1bcd..09e590daca17 100644 --- a/include/asm-mips/sn/klconfig.h +++ b/arch/mips/include/asm/sn/klconfig.h @@ -425,7 +425,7 @@ typedef struct lboard_s { unsigned char brd_sversion; /* version of this structure */ unsigned char brd_brevision; /* board revision */ unsigned char brd_promver; /* board prom version, if any */ - unsigned char brd_flags; /* Enabled, Disabled etc */ + unsigned char brd_flags; /* Enabled, Disabled etc */ unsigned char brd_slot; /* slot number */ unsigned short brd_debugsw; /* Debug switches */ moduleid_t brd_module; /* module to which it belongs */ @@ -595,9 +595,9 @@ typedef struct klcpu_s { /* CPU */ klinfo_t cpu_info; unsigned short cpu_prid; /* Processor PRID value */ unsigned short cpu_fpirr; /* FPU IRR value */ - unsigned short cpu_speed; /* Speed in MHZ */ - unsigned short cpu_scachesz; /* secondary cache size in MB */ - unsigned short cpu_scachespeed;/* secondary cache speed in MHz */ + unsigned short cpu_speed; /* Speed in MHZ */ + unsigned short cpu_scachesz; /* secondary cache size in MB */ + unsigned short cpu_scachespeed;/* secondary cache speed in MHz */ } klcpu_t ; #define CPU_STRUCT_VERSION 2 @@ -621,7 +621,7 @@ typedef struct klhub_uart_s { /* HUB */ typedef struct klmembnk_s { /* MEMORY BANK */ klinfo_t membnk_info; - short membnk_memsz; /* Total memory in megabytes */ + short membnk_memsz; /* Total memory in megabytes */ short membnk_dimm_select; /* bank to physical addr mapping*/ short membnk_bnksz[MD_MEM_BANKS]; /* Memory bank sizes */ short membnk_attr; @@ -657,7 +657,7 @@ typedef struct klmod_serial_num_s { typedef struct klxbow_s { /* XBOW */ klinfo_t xbow_info ; - klport_t xbow_port_info[MAX_XBOW_LINKS] ; /* Module number */ + klport_t xbow_port_info[MAX_XBOW_LINKS] ; /* Module number */ int xbow_master_hub_link; /* type of brd connected+component struct ptr+flags */ } klxbow_t ; @@ -673,9 +673,9 @@ typedef struct klpci_device_s { typedef struct klbri_s { /* BRIDGE */ klinfo_t bri_info ; - unsigned char bri_eprominfo ; /* IO6prom connected to bridge */ - unsigned char bri_bustype ; /* PCI/VME BUS bridge/GIO */ - pci_t pci_specific ; /* PCI Board config info */ + unsigned char bri_eprominfo ; /* IO6prom connected to bridge */ + unsigned char bri_bustype ; /* PCI/VME BUS bridge/GIO */ + pci_t pci_specific ; /* PCI Board config info */ klpci_device_t bri_devices[MAX_PCI_DEVS] ; /* PCI IDs */ klconf_off_t bri_mfg_nic ; } klbri_t ; @@ -684,9 +684,9 @@ typedef struct klbri_s { /* BRIDGE */ typedef struct klioc3_s { /* IOC3 */ klinfo_t ioc3_info ; - unsigned char ioc3_ssram ; /* Info about ssram */ - unsigned char ioc3_nvram ; /* Info about nvram */ - klinfo_t ioc3_superio ; /* Info about superio */ + unsigned char ioc3_ssram ; /* Info about ssram */ + unsigned char ioc3_nvram ; /* Info about nvram */ + klinfo_t ioc3_superio ; /* Info about superio */ klconf_off_t ioc3_tty_off ; klinfo_t ioc3_enet ; klconf_off_t ioc3_enet_off ; @@ -698,13 +698,13 @@ typedef struct klioc3_s { /* IOC3 */ typedef struct klvmeb_s { /* VME BRIDGE - PCI CTLR */ klinfo_t vmeb_info ; vmeb_t vmeb_specific ; - klconf_off_t vmeb_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */ + klconf_off_t vmeb_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */ } klvmeb_t ; typedef struct klvmed_s { /* VME DEVICE - VME BOARD */ klinfo_t vmed_info ; vmed_t vmed_specific ; - klconf_off_t vmed_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */ + klconf_off_t vmed_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */ } klvmed_t ; #define ROUTER_VECTOR_VERS 2 @@ -714,7 +714,7 @@ typedef struct klrou_s { /* ROUTER */ klinfo_t rou_info ; unsigned int rou_flags ; /* PCFG_ROUTER_xxx flags */ nic_t rou_box_nic ; /* nic of the containing module */ - klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */ + klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */ klconf_off_t rou_mfg_nic ; /* MFG NIC string */ u64 rou_vector; /* vector from master node */ } klrou_t ; @@ -769,7 +769,7 @@ typedef struct klgsn_s { /* GSN board */ typedef struct klscsi_s { /* SCSI Controller */ klinfo_t scsi_info ; - scsi_t scsi_specific ; + scsi_t scsi_specific ; unsigned char scsi_numdevs ; klconf_off_t scsi_devinfo[MAX_SCSI_DEVS] ; } klscsi_t ; @@ -803,13 +803,13 @@ typedef struct klmsdev_s { /* mouse device */ typedef struct klfddi_s { /* FDDI */ klinfo_t fddi_info ; - fddi_t fddi_specific ; + fddi_t fddi_specific ; klconf_off_t fddi_devinfo[MAX_FDDI_DEVS] ; } klfddi_t ; typedef struct klmio_s { /* MIO */ klinfo_t mio_info ; - mio_t mio_specific ; + mio_t mio_specific ; } klmio_t ; diff --git a/include/asm-mips/sn/kldir.h b/arch/mips/include/asm/sn/kldir.h similarity index 100% rename from include/asm-mips/sn/kldir.h rename to arch/mips/include/asm/sn/kldir.h diff --git a/include/asm-mips/sn/klkernvars.h b/arch/mips/include/asm/sn/klkernvars.h similarity index 100% rename from include/asm-mips/sn/klkernvars.h rename to arch/mips/include/asm/sn/klkernvars.h diff --git a/include/asm-mips/sn/launch.h b/arch/mips/include/asm/sn/launch.h similarity index 100% rename from include/asm-mips/sn/launch.h rename to arch/mips/include/asm/sn/launch.h diff --git a/include/asm-mips/sn/mapped_kernel.h b/arch/mips/include/asm/sn/mapped_kernel.h similarity index 100% rename from include/asm-mips/sn/mapped_kernel.h rename to arch/mips/include/asm/sn/mapped_kernel.h diff --git a/include/asm-mips/sn/nmi.h b/arch/mips/include/asm/sn/nmi.h similarity index 100% rename from include/asm-mips/sn/nmi.h rename to arch/mips/include/asm/sn/nmi.h diff --git a/include/asm-mips/sn/sn0/addrs.h b/arch/mips/include/asm/sn/sn0/addrs.h similarity index 100% rename from include/asm-mips/sn/sn0/addrs.h rename to arch/mips/include/asm/sn/sn0/addrs.h diff --git a/include/asm-mips/sn/sn0/arch.h b/arch/mips/include/asm/sn/sn0/arch.h similarity index 100% rename from include/asm-mips/sn/sn0/arch.h rename to arch/mips/include/asm/sn/sn0/arch.h diff --git a/include/asm-mips/sn/sn0/hub.h b/arch/mips/include/asm/sn/sn0/hub.h similarity index 100% rename from include/asm-mips/sn/sn0/hub.h rename to arch/mips/include/asm/sn/sn0/hub.h diff --git a/include/asm-mips/sn/sn0/hubio.h b/arch/mips/include/asm/sn/sn0/hubio.h similarity index 96% rename from include/asm-mips/sn/sn0/hubio.h rename to arch/mips/include/asm/sn/sn0/hubio.h index 0187895e556c..d0c29d4de084 100644 --- a/include/asm-mips/sn/sn0/hubio.h +++ b/arch/mips/include/asm/sn/sn0/hubio.h @@ -175,10 +175,10 @@ typedef union hubii_wid_u { u64 wid_reg_value; struct { u64 wid_rsvd: 32, /* unused */ - wid_rev_num: 4, /* revision number */ - wid_part_num: 16, /* the widget type: hub=c101 */ - wid_mfg_num: 11, /* Manufacturer id (IBM) */ - wid_rsvd1: 1; /* Reserved */ + wid_rev_num: 4, /* revision number */ + wid_part_num: 16, /* the widget type: hub=c101 */ + wid_mfg_num: 11, /* Manufacturer id (IBM) */ + wid_rsvd1: 1; /* Reserved */ } wid_fields_s; } hubii_wid_t; @@ -187,13 +187,13 @@ typedef union hubii_wcr_u { u64 wcr_reg_value; struct { u64 wcr_rsvd: 41, /* unused */ - wcr_e_thresh: 5, /* elasticity threshold */ + wcr_e_thresh: 5, /* elasticity threshold */ wcr_dir_con: 1, /* widget direct connect */ - wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */ - wcr_xbar_crd: 3, /* LLP crossbar credit */ - wcr_rsvd1: 8, /* Reserved */ + wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */ + wcr_xbar_crd: 3, /* LLP crossbar credit */ + wcr_rsvd1: 8, /* Reserved */ wcr_tag_mode: 1, /* Tag mode */ - wcr_widget_id: 4; /* LLP crossbar credit */ + wcr_widget_id: 4; /* LLP crossbar credit */ } wcr_fields_s; } hubii_wcr_t; @@ -220,14 +220,14 @@ typedef union hubii_ilcsr_u { u64 icsr_reg_value; struct { u64 icsr_rsvd: 22, /* unused */ - icsr_max_burst: 10, /* max burst */ + icsr_max_burst: 10, /* max burst */ icsr_rsvd4: 6, /* reserved */ - icsr_max_retry: 10, /* max retry */ + icsr_max_retry: 10, /* max retry */ icsr_rsvd3: 2, /* reserved */ icsr_lnk_stat: 2, /* link status */ icsr_bm8: 1, /* Bit mode 8 */ icsr_llp_en: 1, /* LLP enable bit */ - icsr_rsvd2: 1, /* reserver */ + icsr_rsvd2: 1, /* reserver */ icsr_wrm_reset: 1, /* Warm reset bit */ icsr_rsvd1: 2, /* Data ready offset */ icsr_null_to: 6; /* Null timeout */ @@ -240,9 +240,9 @@ typedef union hubii_iowa_u { u64 iowa_reg_value; struct { u64 iowa_rsvd: 48, /* unused */ - iowa_wxoac: 8, /* xtalk widget access bits */ - iowa_rsvd1: 7, /* xtalk widget access bits */ - iowa_w0oac: 1; /* xtalk widget access bits */ + iowa_wxoac: 8, /* xtalk widget access bits */ + iowa_rsvd1: 7, /* xtalk widget access bits */ + iowa_w0oac: 1; /* xtalk widget access bits */ } iowa_fields_s; } hubii_iowa_t; @@ -261,7 +261,7 @@ typedef union hubii_illr_u { struct { u64 illr_rsvd: 32, /* unused */ illr_cb_cnt: 16, /* checkbit error count */ - illr_sn_cnt: 16; /* sequence number count */ + illr_sn_cnt: 16; /* sequence number count */ } illr_fields_s; } hubii_illr_t; @@ -275,7 +275,7 @@ typedef union io_perf_sel { struct { u64 perf_rsvd : 48, perf_icct : 8, - perf_ippr1 : 4, + perf_ippr1 : 4, perf_ippr0 : 4; } perf_sel_bits; } io_perf_sel_t; @@ -733,7 +733,7 @@ typedef union hubii_ifdr_u { u64 ifdr_rsvd: 49, ifdr_maxrp: 7, ifdr_rsvd1: 1, - ifdr_maxrq: 7; + ifdr_maxrq: 7; } hi_ifdr_fields; } hubii_ifdr_t; diff --git a/include/asm-mips/sn/sn0/hubmd.h b/arch/mips/include/asm/sn/sn0/hubmd.h similarity index 100% rename from include/asm-mips/sn/sn0/hubmd.h rename to arch/mips/include/asm/sn/sn0/hubmd.h diff --git a/include/asm-mips/sn/sn0/hubni.h b/arch/mips/include/asm/sn/sn0/hubni.h similarity index 100% rename from include/asm-mips/sn/sn0/hubni.h rename to arch/mips/include/asm/sn/sn0/hubni.h diff --git a/include/asm-mips/sn/sn0/hubpi.h b/arch/mips/include/asm/sn/sn0/hubpi.h similarity index 100% rename from include/asm-mips/sn/sn0/hubpi.h rename to arch/mips/include/asm/sn/sn0/hubpi.h diff --git a/include/asm-mips/sn/sn0/ip27.h b/arch/mips/include/asm/sn/sn0/ip27.h similarity index 100% rename from include/asm-mips/sn/sn0/ip27.h rename to arch/mips/include/asm/sn/sn0/ip27.h diff --git a/include/asm-mips/sn/sn_private.h b/arch/mips/include/asm/sn/sn_private.h similarity index 100% rename from include/asm-mips/sn/sn_private.h rename to arch/mips/include/asm/sn/sn_private.h diff --git a/include/asm-mips/sn/types.h b/arch/mips/include/asm/sn/types.h similarity index 100% rename from include/asm-mips/sn/types.h rename to arch/mips/include/asm/sn/types.h diff --git a/include/asm-mips/sni.h b/arch/mips/include/asm/sni.h similarity index 100% rename from include/asm-mips/sni.h rename to arch/mips/include/asm/sni.h diff --git a/include/asm-mips/socket.h b/arch/mips/include/asm/socket.h similarity index 100% rename from include/asm-mips/socket.h rename to arch/mips/include/asm/socket.h diff --git a/include/asm-mips/sockios.h b/arch/mips/include/asm/sockios.h similarity index 100% rename from include/asm-mips/sockios.h rename to arch/mips/include/asm/sockios.h diff --git a/include/asm-mips/sparsemem.h b/arch/mips/include/asm/sparsemem.h similarity index 100% rename from include/asm-mips/sparsemem.h rename to arch/mips/include/asm/sparsemem.h diff --git a/include/asm-mips/spinlock.h b/arch/mips/include/asm/spinlock.h similarity index 100% rename from include/asm-mips/spinlock.h rename to arch/mips/include/asm/spinlock.h diff --git a/include/asm-mips/spinlock_types.h b/arch/mips/include/asm/spinlock_types.h similarity index 100% rename from include/asm-mips/spinlock_types.h rename to arch/mips/include/asm/spinlock_types.h diff --git a/include/asm-mips/stackframe.h b/arch/mips/include/asm/stackframe.h similarity index 100% rename from include/asm-mips/stackframe.h rename to arch/mips/include/asm/stackframe.h diff --git a/include/asm-mips/stacktrace.h b/arch/mips/include/asm/stacktrace.h similarity index 100% rename from include/asm-mips/stacktrace.h rename to arch/mips/include/asm/stacktrace.h diff --git a/include/asm-mips/stat.h b/arch/mips/include/asm/stat.h similarity index 100% rename from include/asm-mips/stat.h rename to arch/mips/include/asm/stat.h diff --git a/include/asm-mips/statfs.h b/arch/mips/include/asm/statfs.h similarity index 100% rename from include/asm-mips/statfs.h rename to arch/mips/include/asm/statfs.h diff --git a/include/asm-mips/string.h b/arch/mips/include/asm/string.h similarity index 100% rename from include/asm-mips/string.h rename to arch/mips/include/asm/string.h diff --git a/include/asm-mips/suspend.h b/arch/mips/include/asm/suspend.h similarity index 100% rename from include/asm-mips/suspend.h rename to arch/mips/include/asm/suspend.h diff --git a/include/asm-mips/sysmips.h b/arch/mips/include/asm/sysmips.h similarity index 100% rename from include/asm-mips/sysmips.h rename to arch/mips/include/asm/sysmips.h diff --git a/include/asm-mips/system.h b/arch/mips/include/asm/system.h similarity index 100% rename from include/asm-mips/system.h rename to arch/mips/include/asm/system.h diff --git a/include/asm-mips/termbits.h b/arch/mips/include/asm/termbits.h similarity index 100% rename from include/asm-mips/termbits.h rename to arch/mips/include/asm/termbits.h diff --git a/include/asm-mips/termios.h b/arch/mips/include/asm/termios.h similarity index 100% rename from include/asm-mips/termios.h rename to arch/mips/include/asm/termios.h diff --git a/include/asm-mips/thread_info.h b/arch/mips/include/asm/thread_info.h similarity index 100% rename from include/asm-mips/thread_info.h rename to arch/mips/include/asm/thread_info.h diff --git a/include/asm-mips/time.h b/arch/mips/include/asm/time.h similarity index 100% rename from include/asm-mips/time.h rename to arch/mips/include/asm/time.h diff --git a/include/asm-mips/timex.h b/arch/mips/include/asm/timex.h similarity index 100% rename from include/asm-mips/timex.h rename to arch/mips/include/asm/timex.h diff --git a/include/asm-mips/titan_dep.h b/arch/mips/include/asm/titan_dep.h similarity index 100% rename from include/asm-mips/titan_dep.h rename to arch/mips/include/asm/titan_dep.h diff --git a/include/asm-mips/tlb.h b/arch/mips/include/asm/tlb.h similarity index 100% rename from include/asm-mips/tlb.h rename to arch/mips/include/asm/tlb.h diff --git a/include/asm-mips/tlbdebug.h b/arch/mips/include/asm/tlbdebug.h similarity index 100% rename from include/asm-mips/tlbdebug.h rename to arch/mips/include/asm/tlbdebug.h diff --git a/include/asm-mips/tlbflush.h b/arch/mips/include/asm/tlbflush.h similarity index 100% rename from include/asm-mips/tlbflush.h rename to arch/mips/include/asm/tlbflush.h diff --git a/include/asm-mips/topology.h b/arch/mips/include/asm/topology.h similarity index 100% rename from include/asm-mips/topology.h rename to arch/mips/include/asm/topology.h diff --git a/include/asm-mips/traps.h b/arch/mips/include/asm/traps.h similarity index 100% rename from include/asm-mips/traps.h rename to arch/mips/include/asm/traps.h diff --git a/include/asm-mips/txx9/boards.h b/arch/mips/include/asm/txx9/boards.h similarity index 100% rename from include/asm-mips/txx9/boards.h rename to arch/mips/include/asm/txx9/boards.h diff --git a/include/asm-mips/txx9/generic.h b/arch/mips/include/asm/txx9/generic.h similarity index 100% rename from include/asm-mips/txx9/generic.h rename to arch/mips/include/asm/txx9/generic.h diff --git a/include/asm-mips/txx9/jmr3927.h b/arch/mips/include/asm/txx9/jmr3927.h similarity index 100% rename from include/asm-mips/txx9/jmr3927.h rename to arch/mips/include/asm/txx9/jmr3927.h diff --git a/include/asm-mips/txx9/pci.h b/arch/mips/include/asm/txx9/pci.h similarity index 100% rename from include/asm-mips/txx9/pci.h rename to arch/mips/include/asm/txx9/pci.h diff --git a/include/asm-mips/txx9/rbtx4927.h b/arch/mips/include/asm/txx9/rbtx4927.h similarity index 100% rename from include/asm-mips/txx9/rbtx4927.h rename to arch/mips/include/asm/txx9/rbtx4927.h diff --git a/include/asm-mips/txx9/rbtx4938.h b/arch/mips/include/asm/txx9/rbtx4938.h similarity index 100% rename from include/asm-mips/txx9/rbtx4938.h rename to arch/mips/include/asm/txx9/rbtx4938.h diff --git a/include/asm-mips/txx9/rbtx4939.h b/arch/mips/include/asm/txx9/rbtx4939.h similarity index 100% rename from include/asm-mips/txx9/rbtx4939.h rename to arch/mips/include/asm/txx9/rbtx4939.h diff --git a/include/asm-mips/txx9/smsc_fdc37m81x.h b/arch/mips/include/asm/txx9/smsc_fdc37m81x.h similarity index 100% rename from include/asm-mips/txx9/smsc_fdc37m81x.h rename to arch/mips/include/asm/txx9/smsc_fdc37m81x.h diff --git a/include/asm-mips/txx9/spi.h b/arch/mips/include/asm/txx9/spi.h similarity index 100% rename from include/asm-mips/txx9/spi.h rename to arch/mips/include/asm/txx9/spi.h diff --git a/include/asm-mips/txx9/tx3927.h b/arch/mips/include/asm/txx9/tx3927.h similarity index 100% rename from include/asm-mips/txx9/tx3927.h rename to arch/mips/include/asm/txx9/tx3927.h diff --git a/include/asm-mips/txx9/tx4927.h b/arch/mips/include/asm/txx9/tx4927.h similarity index 100% rename from include/asm-mips/txx9/tx4927.h rename to arch/mips/include/asm/txx9/tx4927.h diff --git a/include/asm-mips/txx9/tx4927pcic.h b/arch/mips/include/asm/txx9/tx4927pcic.h similarity index 100% rename from include/asm-mips/txx9/tx4927pcic.h rename to arch/mips/include/asm/txx9/tx4927pcic.h diff --git a/include/asm-mips/txx9/tx4938.h b/arch/mips/include/asm/txx9/tx4938.h similarity index 100% rename from include/asm-mips/txx9/tx4938.h rename to arch/mips/include/asm/txx9/tx4938.h diff --git a/include/asm-mips/txx9/tx4939.h b/arch/mips/include/asm/txx9/tx4939.h similarity index 100% rename from include/asm-mips/txx9/tx4939.h rename to arch/mips/include/asm/txx9/tx4939.h diff --git a/include/asm-mips/txx9irq.h b/arch/mips/include/asm/txx9irq.h similarity index 100% rename from include/asm-mips/txx9irq.h rename to arch/mips/include/asm/txx9irq.h diff --git a/include/asm-mips/txx9pio.h b/arch/mips/include/asm/txx9pio.h similarity index 100% rename from include/asm-mips/txx9pio.h rename to arch/mips/include/asm/txx9pio.h diff --git a/include/asm-mips/txx9tmr.h b/arch/mips/include/asm/txx9tmr.h similarity index 100% rename from include/asm-mips/txx9tmr.h rename to arch/mips/include/asm/txx9tmr.h diff --git a/include/asm-mips/types.h b/arch/mips/include/asm/types.h similarity index 100% rename from include/asm-mips/types.h rename to arch/mips/include/asm/types.h diff --git a/include/asm-mips/uaccess.h b/arch/mips/include/asm/uaccess.h similarity index 100% rename from include/asm-mips/uaccess.h rename to arch/mips/include/asm/uaccess.h diff --git a/include/asm-mips/ucontext.h b/arch/mips/include/asm/ucontext.h similarity index 100% rename from include/asm-mips/ucontext.h rename to arch/mips/include/asm/ucontext.h diff --git a/include/asm-mips/unaligned.h b/arch/mips/include/asm/unaligned.h similarity index 100% rename from include/asm-mips/unaligned.h rename to arch/mips/include/asm/unaligned.h diff --git a/include/asm-mips/unistd.h b/arch/mips/include/asm/unistd.h similarity index 100% rename from include/asm-mips/unistd.h rename to arch/mips/include/asm/unistd.h diff --git a/include/asm-mips/user.h b/arch/mips/include/asm/user.h similarity index 100% rename from include/asm-mips/user.h rename to arch/mips/include/asm/user.h diff --git a/include/asm-mips/vga.h b/arch/mips/include/asm/vga.h similarity index 100% rename from include/asm-mips/vga.h rename to arch/mips/include/asm/vga.h diff --git a/include/asm-mips/vpe.h b/arch/mips/include/asm/vpe.h similarity index 100% rename from include/asm-mips/vpe.h rename to arch/mips/include/asm/vpe.h diff --git a/include/asm-mips/vr41xx/capcella.h b/arch/mips/include/asm/vr41xx/capcella.h similarity index 100% rename from include/asm-mips/vr41xx/capcella.h rename to arch/mips/include/asm/vr41xx/capcella.h diff --git a/include/asm-mips/vr41xx/giu.h b/arch/mips/include/asm/vr41xx/giu.h similarity index 100% rename from include/asm-mips/vr41xx/giu.h rename to arch/mips/include/asm/vr41xx/giu.h diff --git a/include/asm-mips/vr41xx/irq.h b/arch/mips/include/asm/vr41xx/irq.h similarity index 100% rename from include/asm-mips/vr41xx/irq.h rename to arch/mips/include/asm/vr41xx/irq.h diff --git a/include/asm-mips/vr41xx/mpc30x.h b/arch/mips/include/asm/vr41xx/mpc30x.h similarity index 100% rename from include/asm-mips/vr41xx/mpc30x.h rename to arch/mips/include/asm/vr41xx/mpc30x.h diff --git a/include/asm-mips/vr41xx/pci.h b/arch/mips/include/asm/vr41xx/pci.h similarity index 100% rename from include/asm-mips/vr41xx/pci.h rename to arch/mips/include/asm/vr41xx/pci.h diff --git a/include/asm-mips/vr41xx/siu.h b/arch/mips/include/asm/vr41xx/siu.h similarity index 100% rename from include/asm-mips/vr41xx/siu.h rename to arch/mips/include/asm/vr41xx/siu.h diff --git a/include/asm-mips/vr41xx/tb0219.h b/arch/mips/include/asm/vr41xx/tb0219.h similarity index 100% rename from include/asm-mips/vr41xx/tb0219.h rename to arch/mips/include/asm/vr41xx/tb0219.h diff --git a/include/asm-mips/vr41xx/tb0226.h b/arch/mips/include/asm/vr41xx/tb0226.h similarity index 100% rename from include/asm-mips/vr41xx/tb0226.h rename to arch/mips/include/asm/vr41xx/tb0226.h diff --git a/include/asm-mips/vr41xx/tb0287.h b/arch/mips/include/asm/vr41xx/tb0287.h similarity index 100% rename from include/asm-mips/vr41xx/tb0287.h rename to arch/mips/include/asm/vr41xx/tb0287.h diff --git a/include/asm-mips/vr41xx/vr41xx.h b/arch/mips/include/asm/vr41xx/vr41xx.h similarity index 100% rename from include/asm-mips/vr41xx/vr41xx.h rename to arch/mips/include/asm/vr41xx/vr41xx.h diff --git a/include/asm-mips/war.h b/arch/mips/include/asm/war.h similarity index 100% rename from include/asm-mips/war.h rename to arch/mips/include/asm/war.h diff --git a/include/asm-mips/wbflush.h b/arch/mips/include/asm/wbflush.h similarity index 100% rename from include/asm-mips/wbflush.h rename to arch/mips/include/asm/wbflush.h diff --git a/include/asm-mips/xor.h b/arch/mips/include/asm/xor.h similarity index 100% rename from include/asm-mips/xor.h rename to arch/mips/include/asm/xor.h diff --git a/include/asm-mips/xtalk/xtalk.h b/arch/mips/include/asm/xtalk/xtalk.h similarity index 100% rename from include/asm-mips/xtalk/xtalk.h rename to arch/mips/include/asm/xtalk/xtalk.h diff --git a/include/asm-mips/xtalk/xwidget.h b/arch/mips/include/asm/xtalk/xwidget.h similarity index 100% rename from include/asm-mips/xtalk/xwidget.h rename to arch/mips/include/asm/xtalk/xwidget.h From d86a8123b11a9a40d850f6e88b89c948c2477da3 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 11 Oct 2008 16:18:53 +0100 Subject: [PATCH 36/49] MIPS: IP checksums: Remove unncessary folding of sum to 16 bit. Signed-off-by: Ralf Baechle --- arch/mips/lib/csum_partial.S | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S index edac9892c51a..201d82ee4c71 100644 --- a/arch/mips/lib/csum_partial.S +++ b/arch/mips/lib/csum_partial.S @@ -276,11 +276,6 @@ LEAF(csum_partial) dsra32 sum, sum, 0 addu sum, v1 #endif - sll v1, sum, 16 - addu sum, v1 - sltu v1, sum, v1 - srl sum, sum, 16 - addu sum, v1 /* odd buffer alignment? */ beqz t7, 1f @@ -678,11 +673,6 @@ EXC( sb t0, NBYTES-2(dst), .Ls_exc) dsra32 sum, sum, 0 addu sum, v1 #endif - sll v1, sum, 16 - addu sum, v1 - sltu v1, sum, v1 - srl sum, sum, 16 - addu sum, v1 /* odd buffer alignment? */ beqz odd, 1f From 60724ca59eda766a30be57aec6b49bc3e2bead91 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 11 Oct 2008 16:18:53 +0100 Subject: [PATCH 37/49] MIPS: IP checksums: Remove unncessary .set pseudos They possibly silence meaningful warnings ... Signed-off-by: Ralf Baechle --- arch/mips/lib/csum_partial.S | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S index 201d82ee4c71..84d5e6a1e76f 100644 --- a/arch/mips/lib/csum_partial.S +++ b/arch/mips/lib/csum_partial.S @@ -55,20 +55,14 @@ #define UNIT(unit) ((unit)*NBYTES) #define ADDC(sum,reg) \ - .set push; \ - .set noat; \ ADD sum, reg; \ sltu v1, sum, reg; \ ADD sum, v1; \ - .set pop #define ADDC32(sum,reg) \ - .set push; \ - .set noat; \ addu sum, reg; \ sltu v1, sum, reg; \ addu sum, v1; \ - .set pop #define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \ LOAD _t0, (offset + UNIT(0))(src); \ @@ -267,8 +261,6 @@ LEAF(csum_partial) 1: ADDC(sum, t1) /* fold checksum */ - .set push - .set noat #ifdef USE_DOUBLE dsll32 v1, sum, 0 daddu sum, v1 @@ -284,7 +276,6 @@ LEAF(csum_partial) srl sum, sum, 8 or sum, v1 andi sum, 0xffff - .set pop 1: .set reorder /* Add the passed partial csum. */ @@ -664,8 +655,6 @@ EXC( sb t0, NBYTES-2(dst), .Ls_exc) ADDC(sum, t2) .Ldone: /* fold checksum */ - .set push - .set noat #ifdef USE_DOUBLE dsll32 v1, sum, 0 daddu sum, v1 @@ -681,7 +670,6 @@ EXC( sb t0, NBYTES-2(dst), .Ls_exc) srl sum, sum, 8 or sum, v1 andi sum, 0xffff - .set pop 1: .set reorder ADDC32(sum, psum) From b65a75b8c91c0f05047399401407371678fe9549 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 11 Oct 2008 16:18:53 +0100 Subject: [PATCH 38/49] MIPS: IP checksums: Optimize adjust of sum on buffers of odd alignment. Signed-off-by: Ralf Baechle --- arch/mips/lib/csum_partial.S | 35 ++++++++++++++++++++++++----------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S index 84d5e6a1e76f..6b876ca299ee 100644 --- a/arch/mips/lib/csum_partial.S +++ b/arch/mips/lib/csum_partial.S @@ -270,13 +270,20 @@ LEAF(csum_partial) #endif /* odd buffer alignment? */ - beqz t7, 1f - nop - sll v1, sum, 8 +#ifdef CPU_MIPSR2 + wsbh v1, sum + movn sum, v1, t7 +#else + beqz t7, 1f /* odd buffer alignment? */ + lui v1, 0x00ff + addu v1, 0x00ff + and t0, sum, v1 + sll t0, t0, 8 srl sum, sum, 8 - or sum, v1 - andi sum, 0xffff + and sum, sum, v1 + or sum, sum, t0 1: +#endif .set reorder /* Add the passed partial csum. */ ADDC32(sum, a2) @@ -663,14 +670,20 @@ EXC( sb t0, NBYTES-2(dst), .Ls_exc) addu sum, v1 #endif - /* odd buffer alignment? */ - beqz odd, 1f - nop - sll v1, sum, 8 +#ifdef CPU_MIPSR2 + wsbh v1, sum + movn sum, v1, odd +#else + beqz odd, 1f /* odd buffer alignment? */ + lui v1, 0x00ff + addu v1, 0x00ff + and t0, sum, v1 + sll t0, t0, 8 srl sum, sum, 8 - or sum, v1 - andi sum, 0xffff + and sum, sum, v1 + or sum, sum, t0 1: +#endif .set reorder ADDC32(sum, psum) jr ra From 2a31b03335e570dce5fdd082e0d71d48b2cb4290 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 28 Aug 2008 15:17:49 +0100 Subject: [PATCH 39/49] MIPS: Rewrite spinlocks to ticket locks. Based on patch by Chad Reese of Cavium Networks. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 5 - arch/mips/include/asm/spinlock.h | 261 ++++++++++++++++++------- arch/mips/include/asm/spinlock_types.h | 7 +- 3 files changed, 192 insertions(+), 81 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c15416c2e89d..16097a8f5c52 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -610,11 +610,6 @@ source "arch/mips/vr41xx/Kconfig" endmenu -config GENERIC_LOCKBREAK - bool - default y - depends on SMP && PREEMPT - config RWSEM_GENERIC_SPINLOCK bool default y diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h index bb897016c491..5d98a3cb85b7 100644 --- a/arch/mips/include/asm/spinlock.h +++ b/arch/mips/include/asm/spinlock.h @@ -9,62 +9,125 @@ #ifndef _ASM_SPINLOCK_H #define _ASM_SPINLOCK_H +#include + #include #include /* * Your basic SMP spinlocks, allowing only a single CPU anywhere - */ - -#define __raw_spin_is_locked(x) ((x)->lock != 0) -#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) -#define __raw_spin_unlock_wait(x) \ - do { cpu_relax(); } while ((x)->lock) - -/* + * * Simple spin lock operations. There are two variants, one clears IRQ's * on the local processor, one does not. * - * We make no fairness assumptions. They have a cost. + * These are fair FIFO ticket locks + * + * (the type definitions are in asm/spinlock_types.h) */ + +/* + * Ticket locks are conceptually two parts, one indicating the current head of + * the queue, and the other indicating the current tail. The lock is acquired + * by atomically noting the tail and incrementing it by one (thus adding + * ourself to the queue and noting our position), then waiting until the head + * becomes equal to the the initial value of the tail. + */ + +static inline int __raw_spin_is_locked(raw_spinlock_t *lock) +{ + unsigned int counters = ACCESS_ONCE(lock->lock); + + return ((counters >> 14) ^ counters) & 0x1fff; +} + +#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) +#define __raw_spin_unlock_wait(x) \ + while (__raw_spin_is_locked(x)) { cpu_relax(); } + +static inline int __raw_spin_is_contended(raw_spinlock_t *lock) +{ + unsigned int counters = ACCESS_ONCE(lock->lock); + + return (((counters >> 14) - counters) & 0x1fff) > 1; +} + static inline void __raw_spin_lock(raw_spinlock_t *lock) { - unsigned int tmp; + int my_ticket; + int tmp; if (R10000_LLSC_WAR) { - __asm__ __volatile__( - " .set noreorder # __raw_spin_lock \n" - "1: ll %1, %2 \n" - " bnez %1, 1b \n" - " li %1, 1 \n" - " sc %1, %0 \n" - " beqzl %1, 1b \n" - " nop \n" - " .set reorder \n" - : "=m" (lock->lock), "=&r" (tmp) - : "m" (lock->lock) - : "memory"); - } else { - __asm__ __volatile__( - " .set noreorder # __raw_spin_lock \n" - "1: ll %1, %2 \n" - " bnez %1, 2f \n" - " li %1, 1 \n" - " sc %1, %0 \n" - " beqz %1, 2f \n" + __asm__ __volatile__ ( + " .set push # __raw_spin_lock \n" + " .set noreorder \n" + " \n" + "1: ll %[ticket], %[ticket_ptr] \n" + " addiu %[my_ticket], %[ticket], 0x4000 \n" + " sc %[my_ticket], %[ticket_ptr] \n" + " beqzl %[my_ticket], 1b \n" " nop \n" + " srl %[my_ticket], %[ticket], 14 \n" + " andi %[my_ticket], %[my_ticket], 0x1fff \n" + " andi %[ticket], %[ticket], 0x1fff \n" + " bne %[ticket], %[my_ticket], 4f \n" + " subu %[ticket], %[my_ticket], %[ticket] \n" + "2: \n" " .subsection 2 \n" - "2: ll %1, %2 \n" - " bnez %1, 2b \n" - " li %1, 1 \n" - " b 1b \n" - " nop \n" + "4: andi %[ticket], %[ticket], 0x1fff \n" + "5: sll %[ticket], 5 \n" + " \n" + "6: bnez %[ticket], 6b \n" + " subu %[ticket], 1 \n" + " \n" + " lw %[ticket], %[ticket_ptr] \n" + " andi %[ticket], %[ticket], 0x1fff \n" + " beq %[ticket], %[my_ticket], 2b \n" + " subu %[ticket], %[my_ticket], %[ticket] \n" + " b 5b \n" + " subu %[ticket], %[ticket], 1 \n" " .previous \n" - " .set reorder \n" - : "=m" (lock->lock), "=&r" (tmp) - : "m" (lock->lock) - : "memory"); + " .set pop \n" + : [ticket_ptr] "+m" (lock->lock), + [ticket] "=&r" (tmp), + [my_ticket] "=&r" (my_ticket)); + } else { + __asm__ __volatile__ ( + " .set push # __raw_spin_lock \n" + " .set noreorder \n" + " \n" + " ll %[ticket], %[ticket_ptr] \n" + "1: addiu %[my_ticket], %[ticket], 0x4000 \n" + " sc %[my_ticket], %[ticket_ptr] \n" + " beqz %[my_ticket], 3f \n" + " nop \n" + " srl %[my_ticket], %[ticket], 14 \n" + " andi %[my_ticket], %[my_ticket], 0x1fff \n" + " andi %[ticket], %[ticket], 0x1fff \n" + " bne %[ticket], %[my_ticket], 4f \n" + " subu %[ticket], %[my_ticket], %[ticket] \n" + "2: \n" + " .subsection 2 \n" + "3: b 1b \n" + " ll %[ticket], %[ticket_ptr] \n" + " \n" + "4: andi %[ticket], %[ticket], 0x1fff \n" + "5: sll %[ticket], 5 \n" + " \n" + "6: bnez %[ticket], 6b \n" + " subu %[ticket], 1 \n" + " \n" + " lw %[ticket], %[ticket_ptr] \n" + " andi %[ticket], %[ticket], 0x1fff \n" + " beq %[ticket], %[my_ticket], 2b \n" + " subu %[ticket], %[my_ticket], %[ticket] \n" + " b 5b \n" + " subu %[ticket], %[ticket], 1 \n" + " .previous \n" + " .set pop \n" + : [ticket_ptr] "+m" (lock->lock), + [ticket] "=&r" (tmp), + [my_ticket] "=&r" (my_ticket)); } smp_llsc_mb(); @@ -72,55 +135,103 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) static inline void __raw_spin_unlock(raw_spinlock_t *lock) { - smp_mb(); + int tmp; - __asm__ __volatile__( - " .set noreorder # __raw_spin_unlock \n" - " sw $0, %0 \n" - " .set\treorder \n" - : "=m" (lock->lock) - : "m" (lock->lock) - : "memory"); + smp_llsc_mb(); + + if (R10000_LLSC_WAR) { + __asm__ __volatile__ ( + " # __raw_spin_unlock \n" + "1: ll %[ticket], %[ticket_ptr] \n" + " addiu %[ticket], %[ticket], 1 \n" + " ori %[ticket], %[ticket], 0x2000 \n" + " xori %[ticket], %[ticket], 0x2000 \n" + " sc %[ticket], %[ticket_ptr] \n" + " beqzl %[ticket], 2f \n" + : [ticket_ptr] "+m" (lock->lock), + [ticket] "=&r" (tmp)); + } else { + __asm__ __volatile__ ( + " .set push # __raw_spin_unlock \n" + " .set noreorder \n" + " \n" + " ll %[ticket], %[ticket_ptr] \n" + "1: addiu %[ticket], %[ticket], 1 \n" + " ori %[ticket], %[ticket], 0x2000 \n" + " xori %[ticket], %[ticket], 0x2000 \n" + " sc %[ticket], %[ticket_ptr] \n" + " beqz %[ticket], 2f \n" + " nop \n" + " \n" + " .subsection 2 \n" + "2: b 1b \n" + " ll %[ticket], %[ticket_ptr] \n" + " .previous \n" + " .set pop \n" + : [ticket_ptr] "+m" (lock->lock), + [ticket] "=&r" (tmp)); + } } static inline unsigned int __raw_spin_trylock(raw_spinlock_t *lock) { - unsigned int temp, res; + int tmp, tmp2, tmp3; if (R10000_LLSC_WAR) { - __asm__ __volatile__( - " .set noreorder # __raw_spin_trylock \n" - "1: ll %0, %3 \n" - " ori %2, %0, 1 \n" - " sc %2, %1 \n" - " beqzl %2, 1b \n" - " nop \n" - " andi %2, %0, 1 \n" - " .set reorder" - : "=&r" (temp), "=m" (lock->lock), "=&r" (res) - : "m" (lock->lock) - : "memory"); - } else { - __asm__ __volatile__( - " .set noreorder # __raw_spin_trylock \n" - "1: ll %0, %3 \n" - " ori %2, %0, 1 \n" - " sc %2, %1 \n" - " beqz %2, 2f \n" - " andi %2, %0, 1 \n" + __asm__ __volatile__ ( + " .set push # __raw_spin_trylock \n" + " .set noreorder \n" + " \n" + "1: ll %[ticket], %[ticket_ptr] \n" + " srl %[my_ticket], %[ticket], 14 \n" + " andi %[my_ticket], %[my_ticket], 0x1fff \n" + " andi %[now_serving], %[ticket], 0x1fff \n" + " bne %[my_ticket], %[now_serving], 3f \n" + " addiu %[ticket], %[ticket], 0x4000 \n" + " sc %[ticket], %[ticket_ptr] \n" + " beqzl %[ticket], 1b \n" + " li %[ticket], 1 \n" + "2: \n" " .subsection 2 \n" - "2: b 1b \n" - " nop \n" + "3: b 2b \n" + " li %[ticket], 0 \n" " .previous \n" - " .set reorder" - : "=&r" (temp), "=m" (lock->lock), "=&r" (res) - : "m" (lock->lock) - : "memory"); + " .set pop \n" + : [ticket_ptr] "+m" (lock->lock), + [ticket] "=&r" (tmp), + [my_ticket] "=&r" (tmp2), + [now_serving] "=&r" (tmp3)); + } else { + __asm__ __volatile__ ( + " .set push # __raw_spin_trylock \n" + " .set noreorder \n" + " \n" + " ll %[ticket], %[ticket_ptr] \n" + "1: srl %[my_ticket], %[ticket], 14 \n" + " andi %[my_ticket], %[my_ticket], 0x1fff \n" + " andi %[now_serving], %[ticket], 0x1fff \n" + " bne %[my_ticket], %[now_serving], 3f \n" + " addiu %[ticket], %[ticket], 0x4000 \n" + " sc %[ticket], %[ticket_ptr] \n" + " beqz %[ticket], 4f \n" + " li %[ticket], 1 \n" + "2: \n" + " .subsection 2 \n" + "3: b 2b \n" + " li %[ticket], 0 \n" + "4: b 1b \n" + " ll %[ticket], %[ticket_ptr] \n" + " .previous \n" + " .set pop \n" + : [ticket_ptr] "+m" (lock->lock), + [ticket] "=&r" (tmp), + [my_ticket] "=&r" (tmp2), + [now_serving] "=&r" (tmp3)); } smp_llsc_mb(); - return res == 0; + return tmp; } /* diff --git a/arch/mips/include/asm/spinlock_types.h b/arch/mips/include/asm/spinlock_types.h index ce26c5048b15..adeedaa116c1 100644 --- a/arch/mips/include/asm/spinlock_types.h +++ b/arch/mips/include/asm/spinlock_types.h @@ -6,7 +6,12 @@ #endif typedef struct { - volatile unsigned int lock; + /* + * bits 0..13: serving_now + * bits 14 : junk data + * bits 15..28: ticket + */ + unsigned int lock; } raw_spinlock_t; #define __RAW_SPIN_LOCK_UNLOCKED { 0 } From 4bacc68766b11c191ee1567f54103f109c002f4f Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 18 Sep 2008 00:13:58 +0900 Subject: [PATCH 40/49] MIPS: TXx9: Add TX4939 ATA support (v2) Add a helper routine to register tx4939ide driver and use it on RBTX4939 board. Signed-off-by: Atsushi Nemoto Acked-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- arch/mips/include/asm/txx9/tx4939.h | 1 + arch/mips/txx9/generic/setup_tx4939.c | 46 +++++++++++++++++++++++++++ arch/mips/txx9/rbtx4939/setup.c | 1 + 3 files changed, 48 insertions(+) diff --git a/arch/mips/include/asm/txx9/tx4939.h b/arch/mips/include/asm/txx9/tx4939.h index 7ce2dff3b7cc..88badb423010 100644 --- a/arch/mips/include/asm/txx9/tx4939.h +++ b/arch/mips/include/asm/txx9/tx4939.h @@ -540,5 +540,6 @@ void tx4939_setup_pcierr_irq(void); void tx4939_irq_init(void); int tx4939_irq(void); void tx4939_mtd_init(int ch); +void tx4939_ata_init(void); #endif /* __ASM_TXX9_TX4939_H */ diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c index f14a497077da..6c0049a5bbc1 100644 --- a/arch/mips/txx9/generic/setup_tx4939.c +++ b/arch/mips/txx9/generic/setup_tx4939.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -389,6 +390,51 @@ void __init tx4939_mtd_init(int ch) txx9_physmap_flash_init(ch, start, size, &pdata); } +#define TX4939_ATA_REG_PHYS(ch) (TX4939_ATA_REG(ch) & 0xfffffffffULL) +void __init tx4939_ata_init(void) +{ + static struct resource ata0_res[] = { + { + .start = TX4939_ATA_REG_PHYS(0), + .end = TX4939_ATA_REG_PHYS(0) + 0x1000 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = TXX9_IRQ_BASE + TX4939_IR_ATA(0), + .flags = IORESOURCE_IRQ, + }, + }; + static struct resource ata1_res[] = { + { + .start = TX4939_ATA_REG_PHYS(1), + .end = TX4939_ATA_REG_PHYS(1) + 0x1000 - 1, + .flags = IORESOURCE_MEM, + }, { + .start = TXX9_IRQ_BASE + TX4939_IR_ATA(1), + .flags = IORESOURCE_IRQ, + }, + }; + static struct platform_device ata0_dev = { + .name = "tx4939ide", + .id = 0, + .num_resources = ARRAY_SIZE(ata0_res), + .resource = ata0_res, + }; + static struct platform_device ata1_dev = { + .name = "tx4939ide", + .id = 1, + .num_resources = ARRAY_SIZE(ata1_res), + .resource = ata1_res, + }; + __u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg); + + if (pcfg & TX4939_PCFG_ATA0MODE) + platform_device_register(&ata0_dev); + if ((pcfg & (TX4939_PCFG_ATA1MODE | + TX4939_PCFG_ET1MODE | + TX4939_PCFG_ET0MODE)) == TX4939_PCFG_ATA1MODE) + platform_device_register(&ata1_dev); +} + static void __init tx4939_stop_unused_modules(void) { __u64 pcfg, rst = 0, ckd = 0; diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c index 277864d5e779..9855d7bccc20 100644 --- a/arch/mips/txx9/rbtx4939/setup.c +++ b/arch/mips/txx9/rbtx4939/setup.c @@ -264,6 +264,7 @@ static void __init rbtx4939_device_init(void) #endif rbtx4939_led_setup(); tx4939_wdt_init(); + tx4939_ata_init(); } static void __init rbtx4939_setup(void) From 71ec6ccfdc2706e767189d40016fc802305067bb Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 31 Oct 2006 02:52:56 +0000 Subject: [PATCH 41/49] MIPS: Replace use of with native implementations. Signed-off-by: Ralf Baechle --- arch/mips/include/asm/uaccess.h | 264 +++++++++++++++++++++++++++++++- 1 file changed, 263 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/uaccess.h b/arch/mips/include/asm/uaccess.h index b895144d577a..09ff5bb17445 100644 --- a/arch/mips/include/asm/uaccess.h +++ b/arch/mips/include/asm/uaccess.h @@ -13,7 +13,6 @@ #include #include #include -#include /* * The fs value determines whether argument validity checking should be @@ -373,6 +372,269 @@ do { \ extern void __put_user_unknown(void); +/* + * put_user_unaligned: - Write a simple value into user space. + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * + * Context: User context only. This function may sleep. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger + * data types like structures or arrays. + * + * @ptr must have pointer-to-simple-variable type, and @x must be assignable + * to the result of dereferencing @ptr. + * + * Returns zero on success, or -EFAULT on error. + */ +#define put_user_unaligned(x,ptr) \ + __put_user_unaligned_check((x),(ptr),sizeof(*(ptr))) + +/* + * get_user_unaligned: - Get a simple variable from user space. + * @x: Variable to store result. + * @ptr: Source address, in user space. + * + * Context: User context only. This function may sleep. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger + * data types like structures or arrays. + * + * @ptr must have pointer-to-simple-variable type, and the result of + * dereferencing @ptr must be assignable to @x without a cast. + * + * Returns zero on success, or -EFAULT on error. + * On error, the variable @x is set to zero. + */ +#define get_user_unaligned(x,ptr) \ + __get_user_unaligned_check((x),(ptr),sizeof(*(ptr))) + +/* + * __put_user_unaligned: - Write a simple value into user space, with less checking. + * @x: Value to copy to user space. + * @ptr: Destination address, in user space. + * + * Context: User context only. This function may sleep. + * + * This macro copies a single simple value from kernel space to user + * space. It supports simple types like char and int, but not larger + * data types like structures or arrays. + * + * @ptr must have pointer-to-simple-variable type, and @x must be assignable + * to the result of dereferencing @ptr. + * + * Caller must check the pointer with access_ok() before calling this + * function. + * + * Returns zero on success, or -EFAULT on error. + */ +#define __put_user_unaligned(x,ptr) \ + __put_user_unaligned_nocheck((x),(ptr),sizeof(*(ptr))) + +/* + * __get_user_unaligned: - Get a simple variable from user space, with less checking. + * @x: Variable to store result. + * @ptr: Source address, in user space. + * + * Context: User context only. This function may sleep. + * + * This macro copies a single simple variable from user space to kernel + * space. It supports simple types like char and int, but not larger + * data types like structures or arrays. + * + * @ptr must have pointer-to-simple-variable type, and the result of + * dereferencing @ptr must be assignable to @x without a cast. + * + * Caller must check the pointer with access_ok() before calling this + * function. + * + * Returns zero on success, or -EFAULT on error. + * On error, the variable @x is set to zero. + */ +#define __get_user_unaligned(x,ptr) \ + __get_user__unalignednocheck((x),(ptr),sizeof(*(ptr))) + +/* + * Yuck. We need two variants, one for 64bit operation and one + * for 32 bit mode and old iron. + */ +#ifdef CONFIG_32BIT +#define __GET_USER_UNALIGNED_DW(val, ptr) \ + __get_user_unaligned_asm_ll32(val, ptr) +#endif +#ifdef CONFIG_64BIT +#define __GET_USER_UNALIGNED_DW(val, ptr) \ + __get_user_unaligned_asm(val, "uld", ptr) +#endif + +extern void __get_user_unaligned_unknown(void); + +#define __get_user_unaligned_common(val, size, ptr) \ +do { \ + switch (size) { \ + case 1: __get_user_asm(val, "lb", ptr); break; \ + case 2: __get_user_unaligned_asm(val, "ulh", ptr); break; \ + case 4: __get_user_unaligned_asm(val, "ulw", ptr); break; \ + case 8: __GET_USER_UNALIGNED_DW(val, ptr); break; \ + default: __get_user_unaligned_unknown(); break; \ + } \ +} while (0) + +#define __get_user_unaligned_nocheck(x,ptr,size) \ +({ \ + int __gu_err; \ + \ + __get_user_unaligned_common((x), size, ptr); \ + __gu_err; \ +}) + +#define __get_user_unaligned_check(x,ptr,size) \ +({ \ + int __gu_err = -EFAULT; \ + const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \ + \ + if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \ + __get_user_unaligned_common((x), size, __gu_ptr); \ + \ + __gu_err; \ +}) + +#define __get_user_unaligned_asm(val, insn, addr) \ +{ \ + long __gu_tmp; \ + \ + __asm__ __volatile__( \ + "1: " insn " %1, %3 \n" \ + "2: \n" \ + " .section .fixup,\"ax\" \n" \ + "3: li %0, %4 \n" \ + " j 2b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " "__UA_ADDR "\t1b, 3b \n" \ + " "__UA_ADDR "\t1b + 4, 3b \n" \ + " .previous \n" \ + : "=r" (__gu_err), "=r" (__gu_tmp) \ + : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \ + \ + (val) = (__typeof__(*(addr))) __gu_tmp; \ +} + +/* + * Get a long long 64 using 32 bit registers. + */ +#define __get_user_unaligned_asm_ll32(val, addr) \ +{ \ + unsigned long long __gu_tmp; \ + \ + __asm__ __volatile__( \ + "1: ulw %1, (%3) \n" \ + "2: ulw %D1, 4(%3) \n" \ + " move %0, $0 \n" \ + "3: .section .fixup,\"ax\" \n" \ + "4: li %0, %4 \n" \ + " move %1, $0 \n" \ + " move %D1, $0 \n" \ + " j 3b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " " __UA_ADDR " 1b, 4b \n" \ + " " __UA_ADDR " 1b + 4, 4b \n" \ + " " __UA_ADDR " 2b, 4b \n" \ + " " __UA_ADDR " 2b + 4, 4b \n" \ + " .previous \n" \ + : "=r" (__gu_err), "=&r" (__gu_tmp) \ + : "0" (0), "r" (addr), "i" (-EFAULT)); \ + (val) = (__typeof__(*(addr))) __gu_tmp; \ +} + +/* + * Yuck. We need two variants, one for 64bit operation and one + * for 32 bit mode and old iron. + */ +#ifdef CONFIG_32BIT +#define __PUT_USER_UNALIGNED_DW(ptr) __put_user_unaligned_asm_ll32(ptr) +#endif +#ifdef CONFIG_64BIT +#define __PUT_USER_UNALIGNED_DW(ptr) __put_user_unaligned_asm("usd", ptr) +#endif + +#define __put_user_unaligned_nocheck(x,ptr,size) \ +({ \ + __typeof__(*(ptr)) __pu_val; \ + int __pu_err = 0; \ + \ + __pu_val = (x); \ + switch (size) { \ + case 1: __put_user_asm("sb", ptr); break; \ + case 2: __put_user_unaligned_asm("ush", ptr); break; \ + case 4: __put_user_unaligned_asm("usw", ptr); break; \ + case 8: __PUT_USER_UNALIGNED_DW(ptr); break; \ + default: __put_user_unaligned_unknown(); break; \ + } \ + __pu_err; \ +}) + +#define __put_user_unaligned_check(x,ptr,size) \ +({ \ + __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ + __typeof__(*(ptr)) __pu_val = (x); \ + int __pu_err = -EFAULT; \ + \ + if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \ + switch (size) { \ + case 1: __put_user_asm("sb", __pu_addr); break; \ + case 2: __put_user_unaligned_asm("ush", __pu_addr); break; \ + case 4: __put_user_unaligned_asm("usw", __pu_addr); break; \ + case 8: __PUT_USER_UNALGINED_DW(__pu_addr); break; \ + default: __put_user_unaligned_unknown(); break; \ + } \ + } \ + __pu_err; \ +}) + +#define __put_user_unaligned_asm(insn, ptr) \ +{ \ + __asm__ __volatile__( \ + "1: " insn " %z2, %3 # __put_user_unaligned_asm\n" \ + "2: \n" \ + " .section .fixup,\"ax\" \n" \ + "3: li %0, %4 \n" \ + " j 2b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " " __UA_ADDR " 1b, 3b \n" \ + " .previous \n" \ + : "=r" (__pu_err) \ + : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), \ + "i" (-EFAULT)); \ +} + +#define __put_user_unaligned_asm_ll32(ptr) \ +{ \ + __asm__ __volatile__( \ + "1: sw %2, (%3) # __put_user_unaligned_asm_ll32 \n" \ + "2: sw %D2, 4(%3) \n" \ + "3: \n" \ + " .section .fixup,\"ax\" \n" \ + "4: li %0, %4 \n" \ + " j 3b \n" \ + " .previous \n" \ + " .section __ex_table,\"a\" \n" \ + " " __UA_ADDR " 1b, 4b \n" \ + " " __UA_ADDR " 1b + 4, 4b \n" \ + " " __UA_ADDR " 2b, 4b \n" \ + " " __UA_ADDR " 2b + 4, 4b \n" \ + " .previous" \ + : "=r" (__pu_err) \ + : "0" (0), "r" (__pu_val), "r" (ptr), \ + "i" (-EFAULT)); \ +} + +extern void __put_user_unaligned_unknown(void); + /* * We're generating jump to subroutines which will be outside the range of * jump instructions From 8192c9ea9ac44213d1266ecb64615519443979b3 Mon Sep 17 00:00:00 2001 From: David Daney Date: Tue, 23 Sep 2008 00:04:26 -0700 Subject: [PATCH 42/49] MIPS: Add HARDWARE_WATCHPOINTS configure option. This is automatically set for all MIPS32 and MIPS64 processors. Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 16097a8f5c52..cd5fbf6f0784 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1268,6 +1268,13 @@ config CPU_SUPPORTS_32BIT_KERNEL config CPU_SUPPORTS_64BIT_KERNEL bool +# +# Set to y for ptrace access to watch registers. +# +config HARDWARE_WATCHPOINTS + bool + default y if CPU_MIPS32 || CPU_MIPS64 + menu "Kernel type" choice From 6aa3524c182c01b8b8b7c21c4da20c742a9b4d86 Mon Sep 17 00:00:00 2001 From: David Daney Date: Tue, 23 Sep 2008 00:05:54 -0700 Subject: [PATCH 43/49] MIPS: Add HARDWARE_WATCHPOINTS definitions and support code. This is the main support code for the patch. Here we just add the code, the following patches hook it up. Signed-off-by: David Daney Signed-off-by: Ralf Baechle create mode 100644 arch/mips/include/asm/watch.h create mode 100644 arch/mips/kernel/watch.c --- arch/mips/include/asm/cpu-info.h | 6 + arch/mips/include/asm/processor.h | 20 +++ arch/mips/include/asm/thread_info.h | 2 + arch/mips/include/asm/watch.h | 32 +++++ arch/mips/kernel/Makefile | 2 +- arch/mips/kernel/watch.c | 188 ++++++++++++++++++++++++++++ 6 files changed, 249 insertions(+), 1 deletion(-) create mode 100644 arch/mips/include/asm/watch.h create mode 100644 arch/mips/kernel/watch.c diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index 2de73dbb2e9e..744cd8fb107f 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -12,6 +12,8 @@ #ifndef __ASM_CPU_INFO_H #define __ASM_CPU_INFO_H +#include + #include /* @@ -69,6 +71,10 @@ struct cpuinfo_mips { int tc_id; /* Thread Context number */ #endif void *data; /* Additional data */ + unsigned int watch_reg_count; /* Number that exist */ + unsigned int watch_reg_use_cnt; /* Usable by ptrace */ +#define NUM_WATCH_REGS 4 + u16 watch_reg_masks[NUM_WATCH_REGS]; } __attribute__((aligned(SMP_CACHE_BYTES))); extern struct cpuinfo_mips cpu_data[]; diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index a1e4453469f9..18ee58e39445 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -105,6 +105,19 @@ struct mips_dsp_state { {0,} \ } +struct mips3264_watch_reg_state { + /* The width of watchlo is 32 in a 32 bit kernel and 64 in a + 64 bit kernel. We use unsigned long as it has the same + property. */ + unsigned long watchlo[NUM_WATCH_REGS]; + /* Only the mask and IRW bits from watchhi. */ + u16 watchhi[NUM_WATCH_REGS]; +}; + +union mips_watch_reg_state { + struct mips3264_watch_reg_state mips3264; +}; + typedef struct { unsigned long seg; } mm_segment_t; @@ -137,6 +150,9 @@ struct thread_struct { /* Saved state of the DSP ASE, if available. */ struct mips_dsp_state dsp; + /* Saved watch register state, if available. */ + union mips_watch_reg_state watch; + /* Other stuff associated with the thread. */ unsigned long cp0_badvaddr; /* Last user fault */ unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ @@ -192,6 +208,10 @@ struct thread_struct { .dspr = {0, }, \ .dspcontrol = 0, \ }, \ + /* \ + * saved watch register stuff \ + */ \ + .watch = {{{0,},},}, \ /* \ * Other stuff associated with the process \ */ \ diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h index bb3060699df2..3f76de73c943 100644 --- a/arch/mips/include/asm/thread_info.h +++ b/arch/mips/include/asm/thread_info.h @@ -124,6 +124,7 @@ register struct thread_info *__current_thread_info __asm__("$28"); #define TIF_32BIT_REGS 22 /* also implies 16/32 fprs */ #define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */ #define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */ +#define TIF_LOAD_WATCH 25 /* If set, load watch registers */ #define TIF_SYSCALL_TRACE 31 /* syscall trace active */ #define _TIF_SYSCALL_TRACE (1< + +#include + +void mips_install_watch_registers(void); +void mips_read_watch_registers(void); +void mips_clear_watch_registers(void); +void mips_probe_watch_registers(struct cpuinfo_mips *c); + +#ifdef CONFIG_HARDWARE_WATCHPOINTS +#define __restore_watch() do { \ + if (unlikely(test_bit(TIF_LOAD_WATCH, \ + ¤t_thread_info()->flags))) { \ + mips_install_watch_registers(); \ + } \ +} while (0) + +#else +#define __restore_watch() do {} while (0) +#endif + +#endif /* _ASM_WATCH_H */ diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 25775cb54000..d9da7112aaf8 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -6,7 +6,7 @@ extra-y := head.o init_task.o vmlinux.lds obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ ptrace.o reset.o setup.o signal.o syscall.o \ - time.o topology.o traps.o unaligned.o + time.o topology.o traps.o unaligned.o watch.o obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c new file mode 100644 index 000000000000..c15406968030 --- /dev/null +++ b/arch/mips/kernel/watch.c @@ -0,0 +1,188 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2008 David Daney + */ + +#include + +#include +#include + +/* + * Install the watch registers for the current thread. A maximum of + * four registers are installed although the machine may have more. + */ +void mips_install_watch_registers(void) +{ + struct mips3264_watch_reg_state *watches = + ¤t->thread.watch.mips3264; + switch (current_cpu_data.watch_reg_use_cnt) { + default: + BUG(); + case 4: + write_c0_watchlo3(watches->watchlo[3]); + /* Write 1 to the I, R, and W bits to clear them, and + 1 to G so all ASIDs are trapped. */ + write_c0_watchhi3(0x40000007 | watches->watchhi[3]); + case 3: + write_c0_watchlo2(watches->watchlo[2]); + write_c0_watchhi2(0x40000007 | watches->watchhi[2]); + case 2: + write_c0_watchlo1(watches->watchlo[1]); + write_c0_watchhi1(0x40000007 | watches->watchhi[1]); + case 1: + write_c0_watchlo0(watches->watchlo[0]); + write_c0_watchhi0(0x40000007 | watches->watchhi[0]); + } +} + +/* + * Read back the watchhi registers so the user space debugger has + * access to the I, R, and W bits. A maximum of four registers are + * read although the machine may have more. + */ +void mips_read_watch_registers(void) +{ + struct mips3264_watch_reg_state *watches = + ¤t->thread.watch.mips3264; + switch (current_cpu_data.watch_reg_use_cnt) { + default: + BUG(); + case 4: + watches->watchhi[3] = (read_c0_watchhi3() & 0x0fff); + case 3: + watches->watchhi[2] = (read_c0_watchhi2() & 0x0fff); + case 2: + watches->watchhi[1] = (read_c0_watchhi1() & 0x0fff); + case 1: + watches->watchhi[0] = (read_c0_watchhi0() & 0x0fff); + } + if (current_cpu_data.watch_reg_use_cnt == 1 && + (watches->watchhi[0] & 7) == 0) { + /* Pathological case of release 1 architecture that + * doesn't set the condition bits. We assume that + * since we got here, the watch condition was met and + * signal that the conditions requested in watchlo + * were met. */ + watches->watchhi[0] |= (watches->watchlo[0] & 7); + } + } + +/* + * Disable all watch registers. Although only four registers are + * installed, all are cleared to eliminate the possibility of endless + * looping in the watch handler. + */ +void mips_clear_watch_registers(void) +{ + switch (current_cpu_data.watch_reg_count) { + default: + BUG(); + case 8: + write_c0_watchlo7(0); + case 7: + write_c0_watchlo6(0); + case 6: + write_c0_watchlo5(0); + case 5: + write_c0_watchlo4(0); + case 4: + write_c0_watchlo3(0); + case 3: + write_c0_watchlo2(0); + case 2: + write_c0_watchlo1(0); + case 1: + write_c0_watchlo0(0); + } +} + +__cpuinit void mips_probe_watch_registers(struct cpuinfo_mips *c) +{ + unsigned int t; + + if ((c->options & MIPS_CPU_WATCH) == 0) + return; + /* + * Check which of the I,R and W bits are supported, then + * disable the register. + */ + write_c0_watchlo0(7); + t = read_c0_watchlo0(); + write_c0_watchlo0(0); + c->watch_reg_masks[0] = t & 7; + + /* Write the mask bits and read them back to determine which + * can be used. */ + c->watch_reg_count = 1; + c->watch_reg_use_cnt = 1; + t = read_c0_watchhi0(); + write_c0_watchhi0(t | 0xff8); + t = read_c0_watchhi0(); + c->watch_reg_masks[0] |= (t & 0xff8); + if ((t & 0x80000000) == 0) + return; + + write_c0_watchlo1(7); + t = read_c0_watchlo1(); + write_c0_watchlo1(0); + c->watch_reg_masks[1] = t & 7; + + c->watch_reg_count = 2; + c->watch_reg_use_cnt = 2; + t = read_c0_watchhi1(); + write_c0_watchhi1(t | 0xff8); + t = read_c0_watchhi1(); + c->watch_reg_masks[1] |= (t & 0xff8); + if ((t & 0x80000000) == 0) + return; + + write_c0_watchlo2(7); + t = read_c0_watchlo2(); + write_c0_watchlo2(0); + c->watch_reg_masks[2] = t & 7; + + c->watch_reg_count = 3; + c->watch_reg_use_cnt = 3; + t = read_c0_watchhi2(); + write_c0_watchhi2(t | 0xff8); + t = read_c0_watchhi2(); + c->watch_reg_masks[2] |= (t & 0xff8); + if ((t & 0x80000000) == 0) + return; + + write_c0_watchlo3(7); + t = read_c0_watchlo3(); + write_c0_watchlo3(0); + c->watch_reg_masks[3] = t & 7; + + c->watch_reg_count = 4; + c->watch_reg_use_cnt = 4; + t = read_c0_watchhi3(); + write_c0_watchhi3(t | 0xff8); + t = read_c0_watchhi3(); + c->watch_reg_masks[3] |= (t & 0xff8); + if ((t & 0x80000000) == 0) + return; + + /* We use at most 4, but probe and report up to 8. */ + c->watch_reg_count = 5; + t = read_c0_watchhi4(); + if ((t & 0x80000000) == 0) + return; + + c->watch_reg_count = 6; + t = read_c0_watchhi5(); + if ((t & 0x80000000) == 0) + return; + + c->watch_reg_count = 7; + t = read_c0_watchhi6(); + if ((t & 0x80000000) == 0) + return; + + c->watch_reg_count = 8; +} From 654f57bfb467996fb730eae96dc30ea4de989fdc Mon Sep 17 00:00:00 2001 From: David Daney Date: Tue, 23 Sep 2008 00:07:16 -0700 Subject: [PATCH 44/49] MIPS: Probe watch registers and report configuration. Probe for watch register characteristics, and report them in /proc/cpuinfo. Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-probe.c | 2 ++ arch/mips/kernel/proc.c | 13 +++++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index e621fda8ab37..0cf15457ecac 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -21,6 +21,7 @@ #include #include #include +#include /* * Not all of the MIPS CPUs have the "wait" instruction available. Moreover, @@ -677,6 +678,7 @@ static inline void spram_config(void) {} static inline void cpu_probe_mips(struct cpuinfo_mips *c) { decode_configs(c); + mips_probe_watch_registers(c); switch (c->processor_id & 0xff00) { case PRID_IMP_4KC: c->cputype = CPU_4KC; diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 36f065398243..75bb1300dd7a 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -23,6 +23,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) unsigned int version = cpu_data[n].processor_id; unsigned int fp_vers = cpu_data[n].fpu_id; char fmt [64]; + int i; #ifdef CONFIG_SMP if (!cpu_isset(n, cpu_online_map)) @@ -50,8 +51,16 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize); seq_printf(m, "extra interrupt vector\t: %s\n", cpu_has_divec ? "yes" : "no"); - seq_printf(m, "hardware watchpoint\t: %s\n", - cpu_has_watch ? "yes" : "no"); + seq_printf(m, "hardware watchpoint\t: %s", + cpu_has_watch ? "yes, " : "no\n"); + if (cpu_has_watch) { + seq_printf(m, "count: %d, address/irw mask: [", + cpu_data[n].watch_reg_count); + for (i = 0; i < cpu_data[n].watch_reg_count; i++) + seq_printf(m, "%s0x%04x", i ? ", " : "" , + cpu_data[n].watch_reg_masks[i]); + seq_printf(m, "]\n"); + } seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n", cpu_has_mips16 ? " mips16" : "", cpu_has_mdmx ? " mdmx" : "", From b67b2b703047bfaf62687ca64c9486599b609ef0 Mon Sep 17 00:00:00 2001 From: David Daney Date: Tue, 23 Sep 2008 00:08:45 -0700 Subject: [PATCH 45/49] MIPS: Watch exception handling for HARDWARE_WATCHPOINTS. Here we hook up the watch exception handler so that it sends SIGTRAP when the hardware watch registers are triggered. Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- arch/mips/kernel/genex.S | 4 ++++ arch/mips/kernel/traps.c | 24 +++++++++++++++++++----- 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 01dcbe38fa01..757d48f0d80f 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -453,7 +453,11 @@ NESTED(nmi_handler, PT_SIZE, sp) BUILD_HANDLER tr tr sti silent /* #13 */ BUILD_HANDLER fpe fpe fpe silent /* #15 */ BUILD_HANDLER mdmx mdmx sti silent /* #22 */ +#ifdef CONFIG_HARDWARE_WATCHPOINTS + BUILD_HANDLER watch watch sti silent /* #23 */ +#else BUILD_HANDLER watch watch sti verbose /* #23 */ +#endif BUILD_HANDLER mcheck mcheck cli verbose /* #24 */ BUILD_HANDLER mt mt sti silent /* #25 */ BUILD_HANDLER dsp dsp sti silent /* #26 */ diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index b602ac6eb47d..80b9e070c207 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -42,6 +42,7 @@ #include #include #include +#include #include #include #include @@ -912,13 +913,26 @@ asmlinkage void do_mdmx(struct pt_regs *regs) asmlinkage void do_watch(struct pt_regs *regs) { + u32 cause; + /* - * We use the watch exception where available to detect stack - * overflows. + * Clear WP (bit 22) bit of cause register so we don't loop + * forever. */ - dump_tlb_all(); - show_regs(regs); - panic("Caught WATCH exception - probably caused by stack overflow."); + cause = read_c0_cause(); + cause &= ~(1 << 22); + write_c0_cause(cause); + + /* + * If the current thread has the watch registers loaded, save + * their values and send SIGTRAP. Otherwise another thread + * left the registers set, clear them and continue. + */ + if (test_tsk_thread_flag(current, TIF_LOAD_WATCH)) { + mips_read_watch_registers(); + force_sig(SIGTRAP, current); + } else + mips_clear_watch_registers(); } asmlinkage void do_mcheck(struct pt_regs *regs) From 2c708cbaa6031b73be6b992adb3ec1811f91cdb1 Mon Sep 17 00:00:00 2001 From: David Daney Date: Tue, 23 Sep 2008 00:09:51 -0700 Subject: [PATCH 46/49] MIPS: Scheduler support for HARDWARE_WATCHPOINTS. Here we hook up the scheduler. Whenever we switch to a new process, we check to see if the watch registers should be installed, and do it if needed. Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- arch/mips/include/asm/system.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h index a944eda4faf5..cd30f83235bb 100644 --- a/arch/mips/include/asm/system.h +++ b/arch/mips/include/asm/system.h @@ -20,6 +20,7 @@ #include #include #include +#include #include @@ -76,6 +77,7 @@ do { \ __restore_dsp(current); \ if (cpu_has_userlocal) \ write_c0_userlocal(current_thread_info()->tp_value); \ + __restore_watch(); \ } while (0) static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) From 0926bf953ee79b8f139741b442e5a18520f81705 Mon Sep 17 00:00:00 2001 From: David Daney Date: Tue, 23 Sep 2008 00:11:26 -0700 Subject: [PATCH 47/49] MIPS: Ptrace support for HARDWARE_WATCHPOINTS This is the final part of the watch register patch. Here we hook up ptrace so that the user space debugger (gdb), can set and read the registers. Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- arch/mips/include/asm/ptrace.h | 46 +++++++++++++++ arch/mips/kernel/ptrace.c | 100 ++++++++++++++++++++++++++++++++- arch/mips/kernel/ptrace32.c | 10 ++++ 3 files changed, 155 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h index c00cca24dae0..cd5e8a47812b 100644 --- a/arch/mips/include/asm/ptrace.h +++ b/arch/mips/include/asm/ptrace.h @@ -74,11 +74,57 @@ struct pt_regs { #define PTRACE_POKEDATA_3264 0xc3 #define PTRACE_GET_THREAD_AREA_3264 0xc4 +/* Read and write watchpoint registers. */ +enum pt_watch_style { + pt_watch_style_mips32, + pt_watch_style_mips64 +}; +struct mips32_watch_regs { + uint32_t watchlo[8]; + /* Lower 16 bits of watchhi. */ + uint16_t watchhi[8]; + /* Valid mask and I R W bits. + * bit 0 -- 1 if W bit is usable. + * bit 1 -- 1 if R bit is usable. + * bit 2 -- 1 if I bit is usable. + * bits 3 - 11 -- Valid watchhi mask bits. + */ + uint16_t watch_masks[8]; + /* The number of valid watch register pairs. */ + uint32_t num_valid; +} __attribute__((aligned(8))); + +struct mips64_watch_regs { + uint64_t watchlo[8]; + uint16_t watchhi[8]; + uint16_t watch_masks[8]; + uint32_t num_valid; +} __attribute__((aligned(8))); + +struct pt_watch_regs { + enum pt_watch_style style; + union { + struct mips32_watch_regs mips32; + struct mips32_watch_regs mips64; + }; +}; + +#define PTRACE_GET_WATCH_REGS 0xd0 +#define PTRACE_SET_WATCH_REGS 0xd1 + #ifdef __KERNEL__ +#include #include #include +struct task_struct; + +extern int ptrace_get_watch_regs(struct task_struct *child, + struct pt_watch_regs __user *addr); +extern int ptrace_set_watch_regs(struct task_struct *child, + struct pt_watch_regs __user *addr); + /* * Does the process account for user or for system time? */ diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 96ffc9c6d194..054861ccb4dd 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -46,7 +46,8 @@ */ void ptrace_disable(struct task_struct *child) { - /* Nothing to do.. */ + /* Don't load the watchpoint registers for the ex-child. */ + clear_tsk_thread_flag(child, TIF_LOAD_WATCH); } /* @@ -167,6 +168,93 @@ int ptrace_setfpregs(struct task_struct *child, __u32 __user *data) return 0; } +int ptrace_get_watch_regs(struct task_struct *child, + struct pt_watch_regs __user *addr) +{ + enum pt_watch_style style; + int i; + + if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0) + return -EIO; + if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs))) + return -EIO; + +#ifdef CONFIG_32BIT + style = pt_watch_style_mips32; +#define WATCH_STYLE mips32 +#else + style = pt_watch_style_mips64; +#define WATCH_STYLE mips64 +#endif + + __put_user(style, &addr->style); + __put_user(current_cpu_data.watch_reg_use_cnt, + &addr->WATCH_STYLE.num_valid); + for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { + __put_user(child->thread.watch.mips3264.watchlo[i], + &addr->WATCH_STYLE.watchlo[i]); + __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff, + &addr->WATCH_STYLE.watchhi[i]); + __put_user(current_cpu_data.watch_reg_masks[i], + &addr->WATCH_STYLE.watch_masks[i]); + } + for (; i < 8; i++) { + __put_user(0, &addr->WATCH_STYLE.watchlo[i]); + __put_user(0, &addr->WATCH_STYLE.watchhi[i]); + __put_user(0, &addr->WATCH_STYLE.watch_masks[i]); + } + + return 0; +} + +int ptrace_set_watch_regs(struct task_struct *child, + struct pt_watch_regs __user *addr) +{ + int i; + int watch_active = 0; + unsigned long lt[NUM_WATCH_REGS]; + u16 ht[NUM_WATCH_REGS]; + + if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0) + return -EIO; + if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs))) + return -EIO; + /* Check the values. */ + for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { + __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]); +#ifdef CONFIG_32BIT + if (lt[i] & __UA_LIMIT) + return -EINVAL; +#else + if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) { + if (lt[i] & 0xffffffff80000000UL) + return -EINVAL; + } else { + if (lt[i] & __UA_LIMIT) + return -EINVAL; + } +#endif + __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]); + if (ht[i] & ~0xff8) + return -EINVAL; + } + /* Install them. */ + for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { + if (lt[i] & 7) + watch_active = 1; + child->thread.watch.mips3264.watchlo[i] = lt[i]; + /* Set the G bit. */ + child->thread.watch.mips3264.watchhi[i] = ht[i]; + } + + if (watch_active) + set_tsk_thread_flag(child, TIF_LOAD_WATCH); + else + clear_tsk_thread_flag(child, TIF_LOAD_WATCH); + + return 0; +} + long arch_ptrace(struct task_struct *child, long request, long addr, long data) { int ret; @@ -440,6 +528,16 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) (unsigned long __user *) data); break; + case PTRACE_GET_WATCH_REGS: + ret = ptrace_get_watch_regs(child, + (struct pt_watch_regs __user *) addr); + break; + + case PTRACE_SET_WATCH_REGS: + ret = ptrace_set_watch_regs(child, + (struct pt_watch_regs __user *) addr); + break; + default: ret = ptrace_request(child, request, addr, data); break; diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index cac56a8c8679..e45105e3ef00 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -387,6 +387,16 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, (unsigned long __user *) (unsigned long) data); break; + case PTRACE_GET_WATCH_REGS: + ret = ptrace_get_watch_regs(child, + (struct pt_watch_regs __user *) (unsigned long) addr); + break; + + case PTRACE_SET_WATCH_REGS: + ret = ptrace_set_watch_regs(child, + (struct pt_watch_regs __user *) (unsigned long) addr); + break; + default: ret = ptrace_request(child, request, addr, data); break; From d302d05cf4d25f4fbbec0f9338fac13ee0c0ad89 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 11 Oct 2008 16:18:57 +0100 Subject: [PATCH 48/49] MIPS: Move ptrace prototypes to ptrace.h Signed-off-by: Ralf Baechle --- arch/mips/include/asm/ptrace.h | 6 ++++++ arch/mips/kernel/ptrace32.c | 6 ------ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h index cd5e8a47812b..9c22571b160d 100644 --- a/arch/mips/include/asm/ptrace.h +++ b/arch/mips/include/asm/ptrace.h @@ -120,6 +120,12 @@ struct pt_watch_regs { struct task_struct; +extern int ptrace_getregs(struct task_struct *child, __s64 __user *data); +extern int ptrace_setregs(struct task_struct *child, __s64 __user *data); + +extern int ptrace_getfpregs(struct task_struct *child, __u32 __user *data); +extern int ptrace_setfpregs(struct task_struct *child, __u32 __user *data); + extern int ptrace_get_watch_regs(struct task_struct *child, struct pt_watch_regs __user *addr); extern int ptrace_set_watch_regs(struct task_struct *child, diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index e45105e3ef00..1ca34104e593 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -37,12 +37,6 @@ #include #include -int ptrace_getregs(struct task_struct *child, __s64 __user *data); -int ptrace_setregs(struct task_struct *child, __s64 __user *data); - -int ptrace_getfpregs(struct task_struct *child, __u32 __user *data); -int ptrace_setfpregs(struct task_struct *child, __u32 __user *data); - /* * Tracing a 32-bit process with a 64-bit strace and vice versa will not * work. I don't know how to fix this. From 9609e74093abd9f61fb1d20a8915a8ea87c77d5a Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 11 Sep 2008 17:48:00 +0200 Subject: [PATCH 49/49] MIPS: RB532: provide GPIO_BUILTIN_NR and irq_to_gpio/gpio_to_irq This patchs defines the number of built-in the GPIOs present on the SoC as Documentation/gpio.txt recommends to do. Define irq_to_gpio/gpio_to_irq to return the right values so that it fixes a compilation error on drivers/gpio/gpiolib.c when enabling debugfs. Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mach-rc32434/gpio.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/mips/include/asm/mach-rc32434/gpio.h b/arch/mips/include/asm/mach-rc32434/gpio.h index 3a70b41cd7a5..c8e554eafce3 100644 --- a/arch/mips/include/asm/mach-rc32434/gpio.h +++ b/arch/mips/include/asm/mach-rc32434/gpio.h @@ -14,17 +14,17 @@ #define _RC32434_GPIO_H_ #include - -#define gpio_get_value __gpio_get_value -#define gpio_set_value __gpio_set_value - -#define gpio_cansleep __gpio_cansleep - -#define gpio_to_irq(gpio) IRQ_GPIO(gpio) -#define irq_to_gpio(irq) IRQ_TO_GPIO(irq) - #include +#define NR_BUILTIN_GPIO 32 + +#define gpio_get_value __gpio_get_value +#define gpio_set_value __gpio_set_value +#define gpio_cansleep __gpio_cansleep + +#define gpio_to_irq(gpio) (8 + 4 * 32 + gpio) +#define irq_to_gpio(irq) (irq - (8 + 4 * 32)) + struct rb532_gpio_reg { u32 gpiofunc; /* GPIO Function Register * gpiofunc[x]==0 bit = gpio