mirror of https://gitee.com/openkylin/linux.git
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: sparc64: Fix IRQ ->set_affinity() methods. sparc: cpumask_of_node() should handle -1 as a node sparc64: Update defconfig. sparc: Add missing SW perf fault events. sparc64: Fully support both performance counters. sparc64: Add perf callchain support. sparc: convert to arch_gettimeoffset() sparc: leds_resource.end assigned to itself in clock_board_probe() sparc32: Fix page_to_phys(). sparc: Simplify param.h by simply including <asm-generic/param.h> sparc32: Update defconfig. SPARC: use helpers for rlimits sparc: copy_from_user() should not return -EFAULT
This commit is contained in:
Linus Torvalds
commit
840f51ffe1
|
|
@ -64,8 +64,11 @@ config BITS
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|||
default 64 if SPARC64
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||||
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||||
config GENERIC_TIME
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def_bool y
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config ARCH_USES_GETTIMEOFFSET
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bool
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default y if SPARC64
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default y if SPARC32
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||||
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||||
config GENERIC_CMOS_UPDATE
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bool
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|
|
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|||
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@ -1,7 +1,7 @@
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|||
#
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||||
# Automatically generated make config: don't edit
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||||
# Linux kernel version: 2.6.31
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||||
# Wed Sep 16 00:03:43 2009
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||||
# Linux kernel version: 2.6.33-rc2
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# Mon Jan 11 23:20:31 2010
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#
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||||
# CONFIG_64BIT is not set
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||||
CONFIG_SPARC=y
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||||
|
|
@ -41,6 +41,7 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
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|||
#
|
||||
CONFIG_TREE_RCU=y
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||||
# CONFIG_TREE_PREEMPT_RCU is not set
|
||||
# CONFIG_TINY_RCU is not set
|
||||
# CONFIG_RCU_TRACE is not set
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||||
CONFIG_RCU_FANOUT=32
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||||
# CONFIG_RCU_FANOUT_EXACT is not set
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|
|
@ -88,21 +89,21 @@ CONFIG_TIMERFD=y
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CONFIG_EVENTFD=y
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CONFIG_SHMEM=y
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CONFIG_AIO=y
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||||
CONFIG_HAVE_PERF_COUNTERS=y
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CONFIG_HAVE_PERF_EVENTS=y
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||||
CONFIG_PERF_USE_VMALLOC=y
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||||
#
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||||
# Performance Counters
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||||
# Kernel Performance Events And Counters
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||||
#
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||||
# CONFIG_PERF_EVENTS is not set
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||||
# CONFIG_PERF_COUNTERS is not set
|
||||
CONFIG_VM_EVENT_COUNTERS=y
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||||
CONFIG_PCI_QUIRKS=y
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||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_SLAB=y
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||||
# CONFIG_SLUB is not set
|
||||
# CONFIG_SLOB is not set
|
||||
# CONFIG_PROFILING is not set
|
||||
# CONFIG_MARKERS is not set
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||||
CONFIG_HAVE_OPROFILE=y
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||||
CONFIG_HAVE_ARCH_TRACEHOOK=y
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||||
CONFIG_HAVE_DMA_ATTRS=y
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||||
|
|
@ -131,14 +132,41 @@ CONFIG_LBDAF=y
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# IO Schedulers
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#
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||||
CONFIG_IOSCHED_NOOP=y
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||||
CONFIG_IOSCHED_AS=y
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||||
CONFIG_IOSCHED_DEADLINE=y
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||||
CONFIG_IOSCHED_CFQ=y
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||||
# CONFIG_DEFAULT_AS is not set
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||||
# CONFIG_DEFAULT_DEADLINE is not set
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||||
CONFIG_DEFAULT_CFQ=y
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||||
# CONFIG_DEFAULT_NOOP is not set
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||||
CONFIG_DEFAULT_IOSCHED="cfq"
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||||
# CONFIG_INLINE_SPIN_TRYLOCK is not set
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||||
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
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||||
# CONFIG_INLINE_SPIN_LOCK is not set
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||||
# CONFIG_INLINE_SPIN_LOCK_BH is not set
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||||
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
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# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
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CONFIG_INLINE_SPIN_UNLOCK=y
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# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
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CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
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||||
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
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||||
# CONFIG_INLINE_READ_TRYLOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK_BH is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
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||||
CONFIG_INLINE_READ_UNLOCK=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_BH is not set
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||||
CONFIG_INLINE_READ_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_WRITE_TRYLOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_BH is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
|
|
@ -168,8 +196,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
|
|||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
# CONFIG_KSM is not set
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
CONFIG_SUN_PM=y
|
||||
# CONFIG_SPARC_LED is not set
|
||||
|
|
@ -257,6 +284,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m
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|||
CONFIG_INET6_XFRM_MODE_BEET=m
|
||||
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
|
||||
CONFIG_IPV6_SIT=m
|
||||
# CONFIG_IPV6_SIT_6RD is not set
|
||||
CONFIG_IPV6_NDISC_NODETYPE=y
|
||||
CONFIG_IPV6_TUNNEL=m
|
||||
# CONFIG_IPV6_MULTIPLE_TABLES is not set
|
||||
|
|
@ -295,9 +323,6 @@ CONFIG_NET_PKTGEN=m
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|||
# CONFIG_AF_RXRPC is not set
|
||||
CONFIG_WIRELESS=y
|
||||
# CONFIG_CFG80211 is not set
|
||||
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
|
||||
CONFIG_WIRELESS_OLD_REGULATORY=y
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_LIB80211 is not set
|
||||
|
||||
#
|
||||
|
|
@ -335,6 +360,10 @@ CONFIG_BLK_DEV=y
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|||
# CONFIG_BLK_DEV_COW_COMMON is not set
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||||
CONFIG_BLK_DEV_LOOP=m
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||||
CONFIG_BLK_DEV_CRYPTOLOOP=m
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||||
|
||||
#
|
||||
# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
|
||||
#
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
# CONFIG_BLK_DEV_SX8 is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
|
|
@ -398,8 +427,11 @@ CONFIG_SCSI_LOWLEVEL=y
|
|||
# CONFIG_ISCSI_TCP is not set
|
||||
# CONFIG_SCSI_CXGB3_ISCSI is not set
|
||||
# CONFIG_SCSI_BNX2_ISCSI is not set
|
||||
# CONFIG_BE2ISCSI is not set
|
||||
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
|
||||
# CONFIG_SCSI_HPSA is not set
|
||||
# CONFIG_SCSI_3W_9XXX is not set
|
||||
# CONFIG_SCSI_3W_SAS is not set
|
||||
# CONFIG_SCSI_ACARD is not set
|
||||
# CONFIG_SCSI_AACRAID is not set
|
||||
# CONFIG_SCSI_AIC7XXX is not set
|
||||
|
|
@ -434,7 +466,9 @@ CONFIG_SCSI_QLOGICPTI=m
|
|||
# CONFIG_SCSI_DEBUG is not set
|
||||
CONFIG_SCSI_SUNESP=y
|
||||
# CONFIG_SCSI_PMCRAID is not set
|
||||
# CONFIG_SCSI_PM8001 is not set
|
||||
# CONFIG_SCSI_SRP is not set
|
||||
# CONFIG_SCSI_BFA_FC is not set
|
||||
# CONFIG_SCSI_DH is not set
|
||||
# CONFIG_SCSI_OSD_INITIATOR is not set
|
||||
# CONFIG_ATA is not set
|
||||
|
|
@ -450,7 +484,7 @@ CONFIG_SCSI_SUNESP=y
|
|||
#
|
||||
|
||||
#
|
||||
# See the help texts for more information.
|
||||
# The newer stack is recommended.
|
||||
#
|
||||
# CONFIG_FIREWIRE is not set
|
||||
# CONFIG_IEEE1394 is not set
|
||||
|
|
@ -487,6 +521,7 @@ CONFIG_SUNQE=m
|
|||
# CONFIG_NET_PCI is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
# CONFIG_KS8851_MLL is not set
|
||||
# CONFIG_ATL2 is not set
|
||||
CONFIG_NETDEV_1000=y
|
||||
# CONFIG_ACENIC is not set
|
||||
|
|
@ -546,6 +581,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
|
|||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_VMXNET3 is not set
|
||||
# CONFIG_ISDN is not set
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
|
|
@ -555,6 +591,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
|
|||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_FF_MEMLESS is not set
|
||||
# CONFIG_INPUT_POLLDEV is not set
|
||||
# CONFIG_INPUT_SPARSEKMAP is not set
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
|
|
@ -574,6 +611,7 @@ CONFIG_INPUT_KEYBOARD=y
|
|||
CONFIG_KEYBOARD_ATKBD=m
|
||||
# CONFIG_KEYBOARD_LKKBD is not set
|
||||
# CONFIG_KEYBOARD_NEWTON is not set
|
||||
# CONFIG_KEYBOARD_OPENCORES is not set
|
||||
# CONFIG_KEYBOARD_STOWAWAY is not set
|
||||
CONFIG_KEYBOARD_SUNKBD=m
|
||||
# CONFIG_KEYBOARD_XTKBD is not set
|
||||
|
|
@ -604,6 +642,7 @@ CONFIG_SERIO_SERPORT=m
|
|||
# CONFIG_SERIO_PCIPS2 is not set
|
||||
CONFIG_SERIO_LIBPS2=m
|
||||
# CONFIG_SERIO_RAW is not set
|
||||
# CONFIG_SERIO_ALTERA_PS2 is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
|
|
@ -636,6 +675,7 @@ CONFIG_SERIAL_CORE=y
|
|||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_CONSOLE_POLL=y
|
||||
# CONFIG_SERIAL_JSM is not set
|
||||
# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
|
|
@ -661,6 +701,11 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
|||
# CONFIG_POWER_SUPPLY is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Native drivers
|
||||
#
|
||||
# CONFIG_SENSORS_I5K_AMB is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_F71882FG is not set
|
||||
|
|
@ -675,9 +720,7 @@ CONFIG_HWMON=y
|
|||
# CONFIG_SENSORS_VT8231 is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
|
||||
|
|
@ -699,6 +742,7 @@ CONFIG_SSB_POSSIBLE=y
|
|||
#
|
||||
# Graphics support
|
||||
#
|
||||
CONFIG_VGA_ARB=y
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
|
||||
# CONFIG_FB is not set
|
||||
|
|
@ -776,7 +820,9 @@ CONFIG_RTC_INTF_DEV=y
|
|||
# CONFIG_RTC_DRV_M48T86 is not set
|
||||
# CONFIG_RTC_DRV_M48T35 is not set
|
||||
CONFIG_RTC_DRV_M48T59=y
|
||||
# CONFIG_RTC_DRV_MSM6242 is not set
|
||||
# CONFIG_RTC_DRV_BQ4802 is not set
|
||||
# CONFIG_RTC_DRV_RP5C01 is not set
|
||||
# CONFIG_RTC_DRV_V3020 is not set
|
||||
|
||||
#
|
||||
|
|
@ -955,6 +1001,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
|||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_FRAME_WARN=1024
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
|
|
@ -1003,9 +1050,9 @@ CONFIG_KGDB=y
|
|||
CONFIG_KGDB_SERIAL_CONSOLE=y
|
||||
CONFIG_KGDB_TESTS=y
|
||||
# CONFIG_KGDB_TESTS_ON_BOOT is not set
|
||||
# CONFIG_KMEMCHECK is not set
|
||||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
# CONFIG_STACK_DEBUG is not set
|
||||
# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
|
||||
|
||||
#
|
||||
# Security options
|
||||
|
|
@ -1013,7 +1060,11 @@ CONFIG_KGDB_TESTS=y
|
|||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SMACK is not set
|
||||
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
|
||||
CONFIG_DEFAULT_SECURITY_DAC=y
|
||||
CONFIG_DEFAULT_SECURITY=""
|
||||
CONFIG_CRYPTO=y
|
||||
|
||||
#
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.31
|
||||
# Tue Sep 15 17:06:03 2009
|
||||
# Linux kernel version: 2.6.33-rc2
|
||||
# Wed Jan 20 16:31:47 2010
|
||||
#
|
||||
CONFIG_64BIT=y
|
||||
CONFIG_SPARC=y
|
||||
|
|
@ -20,6 +20,7 @@ CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
|||
CONFIG_AUDIT_ARCH=y
|
||||
CONFIG_HAVE_SETUP_PER_CPU_AREA=y
|
||||
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
|
||||
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_ARCH_NO_VIRT_TO_BUS=y
|
||||
|
|
@ -50,6 +51,7 @@ CONFIG_POSIX_MQUEUE_SYSCTL=y
|
|||
#
|
||||
CONFIG_TREE_RCU=y
|
||||
# CONFIG_TREE_PREEMPT_RCU is not set
|
||||
# CONFIG_TINY_RCU is not set
|
||||
# CONFIG_RCU_TRACE is not set
|
||||
CONFIG_RCU_FANOUT=64
|
||||
# CONFIG_RCU_FANOUT_EXACT is not set
|
||||
|
|
@ -62,8 +64,7 @@ CONFIG_RT_GROUP_SCHED=y
|
|||
CONFIG_USER_SCHED=y
|
||||
# CONFIG_CGROUP_SCHED is not set
|
||||
# CONFIG_CGROUPS is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
# CONFIG_SYSFS_DEPRECATED_V2 is not set
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_NAMESPACES=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
|
|
@ -97,24 +98,25 @@ CONFIG_TIMERFD=y
|
|||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
CONFIG_HAVE_PERF_COUNTERS=y
|
||||
CONFIG_HAVE_PERF_EVENTS=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
|
||||
#
|
||||
# Performance Counters
|
||||
# Kernel Performance Events And Counters
|
||||
#
|
||||
CONFIG_PERF_COUNTERS=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
CONFIG_EVENT_PROFILE=y
|
||||
CONFIG_PERF_COUNTERS=y
|
||||
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_PCI_QUIRKS=y
|
||||
CONFIG_SLUB_DEBUG=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
# CONFIG_SLOB is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_TRACEPOINTS=y
|
||||
CONFIG_MARKERS=y
|
||||
CONFIG_OPROFILE=m
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_KPROBES=y
|
||||
|
|
@ -152,14 +154,41 @@ CONFIG_BLOCK_COMPAT=y
|
|||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
CONFIG_DEFAULT_AS=y
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
# CONFIG_DEFAULT_CFQ is not set
|
||||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="anticipatory"
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK is not set
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_SPIN_UNLOCK=y
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_READ_TRYLOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK_BH is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_READ_UNLOCK=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_READ_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_WRITE_TRYLOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_BH is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
|
||||
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
|
||||
CONFIG_MUTEX_SPIN_ON_OWNER=y
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
|
|
@ -179,6 +208,7 @@ CONFIG_GENERIC_HWEIGHT=y
|
|||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
|
||||
CONFIG_SPARC64_SMP=y
|
||||
CONFIG_EARLYFB=y
|
||||
CONFIG_SPARC64_PAGE_SIZE_8KB=y
|
||||
# CONFIG_SPARC64_PAGE_SIZE_64KB is not set
|
||||
CONFIG_SECCOMP=y
|
||||
|
|
@ -216,8 +246,7 @@ CONFIG_MIGRATION=y
|
|||
CONFIG_PHYS_ADDR_T_64BIT=y
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_NR_QUICK=1
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
# CONFIG_KSM is not set
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=8192
|
||||
CONFIG_SCHED_SMT=y
|
||||
CONFIG_SCHED_MC=y
|
||||
|
|
@ -315,6 +344,7 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=m
|
|||
CONFIG_INET6_XFRM_MODE_BEET=m
|
||||
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
|
||||
CONFIG_IPV6_SIT=m
|
||||
# CONFIG_IPV6_SIT_6RD is not set
|
||||
CONFIG_IPV6_NDISC_NODETYPE=y
|
||||
CONFIG_IPV6_TUNNEL=m
|
||||
# CONFIG_IPV6_MULTIPLE_TABLES is not set
|
||||
|
|
@ -356,9 +386,6 @@ CONFIG_NET_TCPPROBE=m
|
|||
# CONFIG_AF_RXRPC is not set
|
||||
CONFIG_WIRELESS=y
|
||||
# CONFIG_CFG80211 is not set
|
||||
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
|
||||
CONFIG_WIRELESS_OLD_REGULATORY=y
|
||||
# CONFIG_WIRELESS_EXT is not set
|
||||
# CONFIG_LIB80211 is not set
|
||||
|
||||
#
|
||||
|
|
@ -376,6 +403,7 @@ CONFIG_WIRELESS_OLD_REGULATORY=y
|
|||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
# CONFIG_DEVTMPFS is not set
|
||||
CONFIG_STANDALONE=y
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
CONFIG_FW_LOADER=y
|
||||
|
|
@ -397,6 +425,11 @@ CONFIG_BLK_DEV=y
|
|||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
CONFIG_BLK_DEV_LOOP=m
|
||||
CONFIG_BLK_DEV_CRYPTOLOOP=m
|
||||
|
||||
#
|
||||
# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
|
||||
#
|
||||
# CONFIG_BLK_DEV_DRBD is not set
|
||||
CONFIG_BLK_DEV_NBD=m
|
||||
# CONFIG_BLK_DEV_SX8 is not set
|
||||
# CONFIG_BLK_DEV_UB is not set
|
||||
|
|
@ -408,6 +441,7 @@ CONFIG_ATA_OVER_ETH=m
|
|||
CONFIG_SUNVDC=m
|
||||
# CONFIG_BLK_DEV_HD is not set
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_AD525X_DPOT is not set
|
||||
# CONFIG_PHANTOM is not set
|
||||
# CONFIG_SGI_IOC4 is not set
|
||||
# CONFIG_TIFM_CORE is not set
|
||||
|
|
@ -415,6 +449,7 @@ CONFIG_MISC_DEVICES=y
|
|||
# CONFIG_ENCLOSURE_SERVICES is not set
|
||||
# CONFIG_HP_ILO is not set
|
||||
# CONFIG_ISL29003 is not set
|
||||
# CONFIG_DS1682 is not set
|
||||
# CONFIG_C2PORT is not set
|
||||
|
||||
#
|
||||
|
|
@ -522,8 +557,11 @@ CONFIG_SCSI_LOWLEVEL=y
|
|||
# CONFIG_ISCSI_TCP is not set
|
||||
# CONFIG_SCSI_CXGB3_ISCSI is not set
|
||||
# CONFIG_SCSI_BNX2_ISCSI is not set
|
||||
# CONFIG_BE2ISCSI is not set
|
||||
# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
|
||||
# CONFIG_SCSI_HPSA is not set
|
||||
# CONFIG_SCSI_3W_9XXX is not set
|
||||
# CONFIG_SCSI_3W_SAS is not set
|
||||
# CONFIG_SCSI_ACARD is not set
|
||||
# CONFIG_SCSI_AACRAID is not set
|
||||
# CONFIG_SCSI_AIC7XXX is not set
|
||||
|
|
@ -557,7 +595,9 @@ CONFIG_SCSI_LOWLEVEL=y
|
|||
# CONFIG_SCSI_DEBUG is not set
|
||||
# CONFIG_SCSI_SUNESP is not set
|
||||
# CONFIG_SCSI_PMCRAID is not set
|
||||
# CONFIG_SCSI_PM8001 is not set
|
||||
# CONFIG_SCSI_SRP is not set
|
||||
# CONFIG_SCSI_BFA_FC is not set
|
||||
# CONFIG_SCSI_DH is not set
|
||||
# CONFIG_SCSI_OSD_INITIATOR is not set
|
||||
# CONFIG_ATA is not set
|
||||
|
|
@ -568,7 +608,9 @@ CONFIG_MD_RAID0=m
|
|||
CONFIG_MD_RAID1=m
|
||||
CONFIG_MD_RAID10=m
|
||||
CONFIG_MD_RAID456=m
|
||||
# CONFIG_MULTICORE_RAID456 is not set
|
||||
CONFIG_MD_RAID6_PQ=m
|
||||
# CONFIG_ASYNC_RAID6_TEST is not set
|
||||
CONFIG_MD_MULTIPATH=m
|
||||
# CONFIG_MD_FAULTY is not set
|
||||
CONFIG_BLK_DEV_DM=m
|
||||
|
|
@ -592,7 +634,7 @@ CONFIG_DM_ZERO=m
|
|||
#
|
||||
|
||||
#
|
||||
# See the help texts for more information.
|
||||
# The newer stack is recommended.
|
||||
#
|
||||
# CONFIG_FIREWIRE is not set
|
||||
# CONFIG_IEEE1394 is not set
|
||||
|
|
@ -664,6 +706,7 @@ CONFIG_NET_PCI=y
|
|||
# CONFIG_SUNDANCE is not set
|
||||
# CONFIG_TLAN is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
# CONFIG_KS8851_MLL is not set
|
||||
# CONFIG_VIA_RHINE is not set
|
||||
# CONFIG_SC92031 is not set
|
||||
# CONFIG_ATL2 is not set
|
||||
|
|
@ -745,6 +788,7 @@ CONFIG_SLHC=m
|
|||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
# CONFIG_VMXNET3 is not set
|
||||
# CONFIG_ISDN is not set
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
|
|
@ -754,6 +798,7 @@ CONFIG_SLHC=m
|
|||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_FF_MEMLESS is not set
|
||||
# CONFIG_INPUT_POLLDEV is not set
|
||||
# CONFIG_INPUT_SPARSEKMAP is not set
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
|
|
@ -770,9 +815,13 @@ CONFIG_INPUT_EVDEV=y
|
|||
# Input Device Drivers
|
||||
#
|
||||
CONFIG_INPUT_KEYBOARD=y
|
||||
# CONFIG_KEYBOARD_ADP5588 is not set
|
||||
CONFIG_KEYBOARD_ATKBD=y
|
||||
# CONFIG_QT2160 is not set
|
||||
CONFIG_KEYBOARD_LKKBD=m
|
||||
# CONFIG_KEYBOARD_MAX7359 is not set
|
||||
# CONFIG_KEYBOARD_NEWTON is not set
|
||||
# CONFIG_KEYBOARD_OPENCORES is not set
|
||||
# CONFIG_KEYBOARD_STOWAWAY is not set
|
||||
CONFIG_KEYBOARD_SUNKBD=y
|
||||
# CONFIG_KEYBOARD_XTKBD is not set
|
||||
|
|
@ -812,6 +861,7 @@ CONFIG_SERIO_I8042=y
|
|||
CONFIG_SERIO_PCIPS2=m
|
||||
CONFIG_SERIO_LIBPS2=y
|
||||
CONFIG_SERIO_RAW=m
|
||||
# CONFIG_SERIO_ALTERA_PS2 is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
|
|
@ -844,6 +894,7 @@ CONFIG_SERIAL_SUNHV=y
|
|||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_JSM is not set
|
||||
# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
|
|
@ -858,6 +909,7 @@ CONFIG_HW_RANDOM_N2RNG=m
|
|||
CONFIG_DEVPORT=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_COMPAT=y
|
||||
# CONFIG_I2C_CHARDEV is not set
|
||||
CONFIG_I2C_HELPER_AUTO=y
|
||||
CONFIG_I2C_ALGOBIT=y
|
||||
|
|
@ -897,11 +949,6 @@ CONFIG_I2C_ALGOBIT=y
|
|||
# CONFIG_I2C_TAOS_EVM is not set
|
||||
# CONFIG_I2C_TINY_USB is not set
|
||||
|
||||
#
|
||||
# Graphics adapter I2C/DDC channel drivers
|
||||
#
|
||||
# CONFIG_I2C_VOODOO3 is not set
|
||||
|
||||
#
|
||||
# Other I2C/SMBus bus drivers
|
||||
#
|
||||
|
|
@ -911,10 +958,6 @@ CONFIG_I2C_ALGOBIT=y
|
|||
#
|
||||
# Miscellaneous I2C Chip support
|
||||
#
|
||||
# CONFIG_DS1682 is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_PCF8575 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_TSL2550 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
|
|
@ -932,6 +975,11 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
|
|||
# CONFIG_POWER_SUPPLY is not set
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Native drivers
|
||||
#
|
||||
# CONFIG_SENSORS_AD7414 is not set
|
||||
# CONFIG_SENSORS_AD7418 is not set
|
||||
# CONFIG_SENSORS_ADM1021 is not set
|
||||
|
|
@ -955,6 +1003,7 @@ CONFIG_HWMON=y
|
|||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_LM63 is not set
|
||||
# CONFIG_SENSORS_LM73 is not set
|
||||
# CONFIG_SENSORS_LM75 is not set
|
||||
# CONFIG_SENSORS_LM77 is not set
|
||||
# CONFIG_SENSORS_LM78 is not set
|
||||
|
|
@ -981,6 +1030,7 @@ CONFIG_HWMON=y
|
|||
# CONFIG_SENSORS_ADS7828 is not set
|
||||
# CONFIG_SENSORS_THMC50 is not set
|
||||
# CONFIG_SENSORS_TMP401 is not set
|
||||
# CONFIG_SENSORS_TMP421 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_VT8231 is not set
|
||||
|
|
@ -993,9 +1043,8 @@ CONFIG_HWMON=y
|
|||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_SENSORS_ULTRA45 is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
# CONFIG_SENSORS_LIS3_I2C is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
|
||||
|
|
@ -1013,16 +1062,20 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_TWL4030_CORE is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_PMIC_DA903X is not set
|
||||
# CONFIG_PMIC_ADP5520 is not set
|
||||
# CONFIG_MFD_WM8400 is not set
|
||||
# CONFIG_MFD_WM831X is not set
|
||||
# CONFIG_MFD_WM8350_I2C is not set
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
# CONFIG_AB3100_CORE is not set
|
||||
# CONFIG_MFD_88PM8607 is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
# CONFIG_MEDIA_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
CONFIG_VGA_ARB=y
|
||||
# CONFIG_DRM is not set
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
|
||||
|
|
@ -1176,6 +1229,7 @@ CONFIG_SND_ALI5451=m
|
|||
# CONFIG_SND_OXYGEN is not set
|
||||
# CONFIG_SND_CS4281 is not set
|
||||
# CONFIG_SND_CS46XX is not set
|
||||
# CONFIG_SND_CS5535AUDIO is not set
|
||||
# CONFIG_SND_CTXFI is not set
|
||||
# CONFIG_SND_DARLA20 is not set
|
||||
# CONFIG_SND_GINA20 is not set
|
||||
|
|
@ -1311,6 +1365,7 @@ CONFIG_USB_EHCI_HCD=m
|
|||
# CONFIG_USB_OXU210HP_HCD is not set
|
||||
# CONFIG_USB_ISP116X_HCD is not set
|
||||
# CONFIG_USB_ISP1760_HCD is not set
|
||||
# CONFIG_USB_ISP1362_HCD is not set
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
|
||||
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
|
||||
|
|
@ -1426,6 +1481,7 @@ CONFIG_RTC_INTF_DEV=y
|
|||
# CONFIG_RTC_DRV_PCF8563 is not set
|
||||
# CONFIG_RTC_DRV_PCF8583 is not set
|
||||
# CONFIG_RTC_DRV_M41T80 is not set
|
||||
# CONFIG_RTC_DRV_BQ32K is not set
|
||||
# CONFIG_RTC_DRV_S35390A is not set
|
||||
# CONFIG_RTC_DRV_FM3130 is not set
|
||||
# CONFIG_RTC_DRV_RX8581 is not set
|
||||
|
|
@ -1447,7 +1503,9 @@ CONFIG_RTC_DRV_CMOS=y
|
|||
# CONFIG_RTC_DRV_M48T86 is not set
|
||||
# CONFIG_RTC_DRV_M48T35 is not set
|
||||
CONFIG_RTC_DRV_M48T59=y
|
||||
# CONFIG_RTC_DRV_MSM6242 is not set
|
||||
CONFIG_RTC_DRV_BQ4802=y
|
||||
# CONFIG_RTC_DRV_RP5C01 is not set
|
||||
# CONFIG_RTC_DRV_V3020 is not set
|
||||
|
||||
#
|
||||
|
|
@ -1625,6 +1683,7 @@ CONFIG_PRINTK_TIME=y
|
|||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
CONFIG_FRAME_WARN=2048
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
CONFIG_DEBUG_FS=y
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
|
|
@ -1678,9 +1737,11 @@ CONFIG_NOP_TRACER=y
|
|||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
|
||||
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
|
||||
CONFIG_RING_BUFFER=y
|
||||
CONFIG_EVENT_TRACING=y
|
||||
CONFIG_CONTEXT_SWITCH_TRACER=y
|
||||
CONFIG_RING_BUFFER_ALLOW_SWAP=y
|
||||
CONFIG_TRACING=y
|
||||
CONFIG_GENERIC_TRACER=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
|
|
@ -1688,6 +1749,7 @@ CONFIG_FTRACE=y
|
|||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_FTRACE_SYSCALLS is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
CONFIG_BRANCH_PROFILE_NONE=y
|
||||
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
|
||||
|
|
@ -1706,6 +1768,7 @@ CONFIG_HAVE_ARCH_KGDB=y
|
|||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
# CONFIG_DEBUG_DCFLUSH is not set
|
||||
# CONFIG_STACK_DEBUG is not set
|
||||
# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
|
||||
|
||||
#
|
||||
# Security options
|
||||
|
|
@ -1714,11 +1777,17 @@ CONFIG_KEYS=y
|
|||
# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SMACK is not set
|
||||
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
|
||||
CONFIG_DEFAULT_SECURITY_DAC=y
|
||||
CONFIG_DEFAULT_SECURITY=""
|
||||
CONFIG_XOR_BLOCKS=m
|
||||
CONFIG_ASYNC_CORE=m
|
||||
CONFIG_ASYNC_MEMCPY=m
|
||||
CONFIG_ASYNC_XOR=m
|
||||
CONFIG_ASYNC_PQ=m
|
||||
CONFIG_ASYNC_RAID6_RECOV=m
|
||||
CONFIG_CRYPTO=y
|
||||
|
||||
#
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@
|
|||
#include <asm/page.h> /* IO address mapping routines need this */
|
||||
#include <asm/system.h>
|
||||
|
||||
#define page_to_phys(page) (((page) - mem_map) << PAGE_SHIFT)
|
||||
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
|
||||
|
||||
static inline u32 flip_dword (u32 l)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ extern unsigned long pfn_base;
|
|||
#define phys_to_virt __va
|
||||
|
||||
#define ARCH_PFN_OFFSET (pfn_base)
|
||||
#define virt_to_page(kaddr) (mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT)))
|
||||
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
|
||||
|
||||
#define pfn_valid(pfn) (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr))
|
||||
#define virt_addr_valid(kaddr) ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr)
|
||||
|
|
|
|||
|
|
@ -1,22 +1,7 @@
|
|||
#ifndef _ASMSPARC_PARAM_H
|
||||
#define _ASMSPARC_PARAM_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
|
||||
# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
|
||||
# define CLOCKS_PER_SEC (USER_HZ)
|
||||
#endif
|
||||
|
||||
#ifndef HZ
|
||||
#define HZ 100
|
||||
#endif
|
||||
|
||||
#define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
|
||||
#include <asm-generic/param.h>
|
||||
|
||||
#ifndef NOGROUP
|
||||
#define NOGROUP (-1)
|
||||
#endif
|
||||
|
||||
#define MAXHOSTNAMELEN 64 /* max length of hostname */
|
||||
|
||||
#endif
|
||||
#endif /* _ASMSPARC_PARAM_H */
|
||||
|
|
|
|||
|
|
@ -12,4 +12,5 @@
|
|||
typedef unsigned long cycles_t;
|
||||
#define get_cycles() (0)
|
||||
|
||||
extern u32 (*do_arch_gettimeoffset)(void);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -12,7 +12,9 @@ static inline int cpu_to_node(int cpu)
|
|||
|
||||
#define parent_node(node) (node)
|
||||
|
||||
#define cpumask_of_node(node) (&numa_cpumask_lookup_table[node])
|
||||
#define cpumask_of_node(node) ((node) == -1 ? \
|
||||
cpu_all_mask : \
|
||||
&numa_cpumask_lookup_table[node])
|
||||
|
||||
struct pci_bus;
|
||||
#ifdef CONFIG_PCI
|
||||
|
|
|
|||
|
|
@ -274,7 +274,7 @@ static inline unsigned long copy_from_user(void *to, const void __user *from, un
|
|||
|
||||
if (unlikely(sz != -1 && sz < n)) {
|
||||
copy_from_user_overflow();
|
||||
return -EFAULT;
|
||||
return n;
|
||||
}
|
||||
|
||||
if (n && __access_ok((unsigned long) from, n))
|
||||
|
|
|
|||
|
|
@ -221,8 +221,8 @@ extern unsigned long copy_from_user_fixup(void *to, const void __user *from,
|
|||
static inline unsigned long __must_check
|
||||
copy_from_user(void *to, const void __user *from, unsigned long size)
|
||||
{
|
||||
unsigned long ret = (unsigned long) -EFAULT;
|
||||
int sz = __compiletime_object_size(to);
|
||||
unsigned long ret = size;
|
||||
|
||||
if (likely(sz == -1 || sz >= size)) {
|
||||
ret = ___copy_from_user(to, from, size);
|
||||
|
|
|
|||
|
|
@ -99,7 +99,7 @@ static int __devinit clock_board_probe(struct of_device *op,
|
|||
|
||||
p->leds_resource.start = (unsigned long)
|
||||
(p->clock_regs + CLOCK_CTRL);
|
||||
p->leds_resource.end = p->leds_resource.end;
|
||||
p->leds_resource.end = p->leds_resource.start;
|
||||
p->leds_resource.name = "leds";
|
||||
|
||||
p->leds_pdev.name = "sunfire-clockboard-leds";
|
||||
|
|
@ -194,7 +194,7 @@ static int __devinit fhc_probe(struct of_device *op,
|
|||
if (!p->central) {
|
||||
p->leds_resource.start = (unsigned long)
|
||||
(p->pregs + FHC_PREGS_CTRL);
|
||||
p->leds_resource.end = p->leds_resource.end;
|
||||
p->leds_resource.end = p->leds_resource.start;
|
||||
p->leds_resource.name = "leds";
|
||||
|
||||
p->leds_pdev.name = "sunfire-fhc-leds";
|
||||
|
|
|
|||
|
|
@ -250,12 +250,12 @@ struct irq_handler_data {
|
|||
};
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static int irq_choose_cpu(unsigned int virt_irq)
|
||||
static int irq_choose_cpu(unsigned int virt_irq, const struct cpumask *affinity)
|
||||
{
|
||||
cpumask_t mask;
|
||||
int cpuid;
|
||||
|
||||
cpumask_copy(&mask, irq_desc[virt_irq].affinity);
|
||||
cpumask_copy(&mask, affinity);
|
||||
if (cpus_equal(mask, cpu_online_map)) {
|
||||
cpuid = map_to_cpu(virt_irq);
|
||||
} else {
|
||||
|
|
@ -268,7 +268,7 @@ static int irq_choose_cpu(unsigned int virt_irq)
|
|||
return cpuid;
|
||||
}
|
||||
#else
|
||||
static int irq_choose_cpu(unsigned int virt_irq)
|
||||
static int irq_choose_cpu(unsigned int virt_irq, const struct cpumask *affinity)
|
||||
{
|
||||
return real_hard_smp_processor_id();
|
||||
}
|
||||
|
|
@ -282,7 +282,8 @@ static void sun4u_irq_enable(unsigned int virt_irq)
|
|||
unsigned long cpuid, imap, val;
|
||||
unsigned int tid;
|
||||
|
||||
cpuid = irq_choose_cpu(virt_irq);
|
||||
cpuid = irq_choose_cpu(virt_irq,
|
||||
irq_desc[virt_irq].affinity);
|
||||
imap = data->imap;
|
||||
|
||||
tid = sun4u_compute_tid(imap, cpuid);
|
||||
|
|
@ -299,7 +300,24 @@ static void sun4u_irq_enable(unsigned int virt_irq)
|
|||
static int sun4u_set_affinity(unsigned int virt_irq,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
sun4u_irq_enable(virt_irq);
|
||||
struct irq_handler_data *data = get_irq_chip_data(virt_irq);
|
||||
|
||||
if (likely(data)) {
|
||||
unsigned long cpuid, imap, val;
|
||||
unsigned int tid;
|
||||
|
||||
cpuid = irq_choose_cpu(virt_irq, mask);
|
||||
imap = data->imap;
|
||||
|
||||
tid = sun4u_compute_tid(imap, cpuid);
|
||||
|
||||
val = upa_readq(imap);
|
||||
val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
|
||||
IMAP_AID_SAFARI | IMAP_NID_SAFARI);
|
||||
val |= tid | IMAP_VALID;
|
||||
upa_writeq(val, imap);
|
||||
upa_writeq(ICLR_IDLE, data->iclr);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -340,7 +358,8 @@ static void sun4u_irq_eoi(unsigned int virt_irq)
|
|||
static void sun4v_irq_enable(unsigned int virt_irq)
|
||||
{
|
||||
unsigned int ino = virt_irq_table[virt_irq].dev_ino;
|
||||
unsigned long cpuid = irq_choose_cpu(virt_irq);
|
||||
unsigned long cpuid = irq_choose_cpu(virt_irq,
|
||||
irq_desc[virt_irq].affinity);
|
||||
int err;
|
||||
|
||||
err = sun4v_intr_settarget(ino, cpuid);
|
||||
|
|
@ -361,7 +380,7 @@ static int sun4v_set_affinity(unsigned int virt_irq,
|
|||
const struct cpumask *mask)
|
||||
{
|
||||
unsigned int ino = virt_irq_table[virt_irq].dev_ino;
|
||||
unsigned long cpuid = irq_choose_cpu(virt_irq);
|
||||
unsigned long cpuid = irq_choose_cpu(virt_irq, mask);
|
||||
int err;
|
||||
|
||||
err = sun4v_intr_settarget(ino, cpuid);
|
||||
|
|
@ -403,7 +422,7 @@ static void sun4v_virq_enable(unsigned int virt_irq)
|
|||
unsigned long cpuid, dev_handle, dev_ino;
|
||||
int err;
|
||||
|
||||
cpuid = irq_choose_cpu(virt_irq);
|
||||
cpuid = irq_choose_cpu(virt_irq, irq_desc[virt_irq].affinity);
|
||||
|
||||
dev_handle = virt_irq_table[virt_irq].dev_handle;
|
||||
dev_ino = virt_irq_table[virt_irq].dev_ino;
|
||||
|
|
@ -433,7 +452,7 @@ static int sun4v_virt_set_affinity(unsigned int virt_irq,
|
|||
unsigned long cpuid, dev_handle, dev_ino;
|
||||
int err;
|
||||
|
||||
cpuid = irq_choose_cpu(virt_irq);
|
||||
cpuid = irq_choose_cpu(virt_irq, mask);
|
||||
|
||||
dev_handle = virt_irq_table[virt_irq].dev_handle;
|
||||
dev_ino = virt_irq_table[virt_irq].dev_ino;
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@
|
|||
#include <asm/oplib.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/pcic.h>
|
||||
#include <asm/timex.h>
|
||||
#include <asm/timer.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/irq_regs.h>
|
||||
|
|
@ -163,8 +164,6 @@ void __iomem *pcic_regs;
|
|||
volatile int pcic_speculative;
|
||||
volatile int pcic_trapped;
|
||||
|
||||
static void pci_do_gettimeofday(struct timeval *tv);
|
||||
static int pci_do_settimeofday(struct timespec *tv);
|
||||
|
||||
#define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3))
|
||||
|
||||
|
|
@ -716,19 +715,27 @@ static irqreturn_t pcic_timer_handler (int irq, void *h)
|
|||
#define USECS_PER_JIFFY 10000 /* We have 100HZ "standard" timer for sparc */
|
||||
#define TICK_TIMER_LIMIT ((100*1000000/4)/100)
|
||||
|
||||
u32 pci_gettimeoffset(void)
|
||||
{
|
||||
/*
|
||||
* We divide all by 100
|
||||
* to have microsecond resolution and to avoid overflow
|
||||
*/
|
||||
unsigned long count =
|
||||
readl(pcic0.pcic_regs+PCI_SYS_COUNTER) & ~PCI_SYS_COUNTER_OVERFLOW;
|
||||
count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100);
|
||||
return count * 1000;
|
||||
}
|
||||
|
||||
|
||||
void __init pci_time_init(void)
|
||||
{
|
||||
struct linux_pcic *pcic = &pcic0;
|
||||
unsigned long v;
|
||||
int timer_irq, irq;
|
||||
|
||||
/* A hack until do_gettimeofday prototype is moved to arch specific headers
|
||||
and btfixupped. Patch do_gettimeofday with ba pci_do_gettimeofday; nop */
|
||||
((unsigned int *)do_gettimeofday)[0] =
|
||||
0x10800000 | ((((unsigned long)pci_do_gettimeofday -
|
||||
(unsigned long)do_gettimeofday) >> 2) & 0x003fffff);
|
||||
((unsigned int *)do_gettimeofday)[1] = 0x01000000;
|
||||
BTFIXUPSET_CALL(bus_do_settimeofday, pci_do_settimeofday, BTFIXUPCALL_NORM);
|
||||
do_arch_gettimeoffset = pci_gettimeoffset;
|
||||
|
||||
btfixup();
|
||||
|
||||
writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT);
|
||||
|
|
@ -746,84 +753,6 @@ void __init pci_time_init(void)
|
|||
local_irq_enable();
|
||||
}
|
||||
|
||||
static inline unsigned long do_gettimeoffset(void)
|
||||
{
|
||||
/*
|
||||
* We divide all by 100
|
||||
* to have microsecond resolution and to avoid overflow
|
||||
*/
|
||||
unsigned long count =
|
||||
readl(pcic0.pcic_regs+PCI_SYS_COUNTER) & ~PCI_SYS_COUNTER_OVERFLOW;
|
||||
count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100);
|
||||
return count;
|
||||
}
|
||||
|
||||
static void pci_do_gettimeofday(struct timeval *tv)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned long seq;
|
||||
unsigned long usec, sec;
|
||||
unsigned long max_ntp_tick = tick_usec - tickadj;
|
||||
|
||||
do {
|
||||
seq = read_seqbegin_irqsave(&xtime_lock, flags);
|
||||
usec = do_gettimeoffset();
|
||||
|
||||
/*
|
||||
* If time_adjust is negative then NTP is slowing the clock
|
||||
* so make sure not to go into next possible interval.
|
||||
* Better to lose some accuracy than have time go backwards..
|
||||
*/
|
||||
if (unlikely(time_adjust < 0))
|
||||
usec = min(usec, max_ntp_tick);
|
||||
|
||||
sec = xtime.tv_sec;
|
||||
usec += (xtime.tv_nsec / 1000);
|
||||
} while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
|
||||
|
||||
while (usec >= 1000000) {
|
||||
usec -= 1000000;
|
||||
sec++;
|
||||
}
|
||||
|
||||
tv->tv_sec = sec;
|
||||
tv->tv_usec = usec;
|
||||
}
|
||||
|
||||
static int pci_do_settimeofday(struct timespec *tv)
|
||||
{
|
||||
if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* This is revolting. We need to set "xtime" correctly. However, the
|
||||
* value in this location is the value at the most recent update of
|
||||
* wall time. Discover what correction gettimeofday() would have
|
||||
* made, and then undo it!
|
||||
*/
|
||||
tv->tv_nsec -= 1000 * do_gettimeoffset();
|
||||
while (tv->tv_nsec < 0) {
|
||||
tv->tv_nsec += NSEC_PER_SEC;
|
||||
tv->tv_sec--;
|
||||
}
|
||||
|
||||
wall_to_monotonic.tv_sec += xtime.tv_sec - tv->tv_sec;
|
||||
wall_to_monotonic.tv_nsec += xtime.tv_nsec - tv->tv_nsec;
|
||||
|
||||
if (wall_to_monotonic.tv_nsec > NSEC_PER_SEC) {
|
||||
wall_to_monotonic.tv_nsec -= NSEC_PER_SEC;
|
||||
wall_to_monotonic.tv_sec++;
|
||||
}
|
||||
if (wall_to_monotonic.tv_nsec < 0) {
|
||||
wall_to_monotonic.tv_nsec += NSEC_PER_SEC;
|
||||
wall_to_monotonic.tv_sec--;
|
||||
}
|
||||
|
||||
xtime.tv_sec = tv->tv_sec;
|
||||
xtime.tv_nsec = tv->tv_nsec;
|
||||
ntp_clear();
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if 0
|
||||
static void watchdog_reset() {
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/* Performance event support for sparc64.
|
||||
*
|
||||
* Copyright (C) 2009 David S. Miller <davem@davemloft.net>
|
||||
* Copyright (C) 2009, 2010 David S. Miller <davem@davemloft.net>
|
||||
*
|
||||
* This code is based almost entirely upon the x86 perf event
|
||||
* code, which is:
|
||||
|
|
@ -18,11 +18,15 @@
|
|||
#include <linux/kdebug.h>
|
||||
#include <linux/mutex.h>
|
||||
|
||||
#include <asm/stacktrace.h>
|
||||
#include <asm/cpudata.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/atomic.h>
|
||||
#include <asm/nmi.h>
|
||||
#include <asm/pcr.h>
|
||||
|
||||
#include "kstack.h"
|
||||
|
||||
/* Sparc64 chips have two performance counters, 32-bits each, with
|
||||
* overflow interrupts generated on transition from 0xffffffff to 0.
|
||||
* The counters are accessed in one go using a 64-bit register.
|
||||
|
|
@ -51,16 +55,49 @@
|
|||
|
||||
#define PIC_UPPER_INDEX 0
|
||||
#define PIC_LOWER_INDEX 1
|
||||
#define PIC_NO_INDEX -1
|
||||
|
||||
struct cpu_hw_events {
|
||||
struct perf_event *events[MAX_HWEVENTS];
|
||||
unsigned long used_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
|
||||
unsigned long active_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
|
||||
/* Number of events currently scheduled onto this cpu.
|
||||
* This tells how many entries in the arrays below
|
||||
* are valid.
|
||||
*/
|
||||
int n_events;
|
||||
|
||||
/* Number of new events added since the last hw_perf_disable().
|
||||
* This works because the perf event layer always adds new
|
||||
* events inside of a perf_{disable,enable}() sequence.
|
||||
*/
|
||||
int n_added;
|
||||
|
||||
/* Array of events current scheduled on this cpu. */
|
||||
struct perf_event *event[MAX_HWEVENTS];
|
||||
|
||||
/* Array of encoded longs, specifying the %pcr register
|
||||
* encoding and the mask of PIC counters this even can
|
||||
* be scheduled on. See perf_event_encode() et al.
|
||||
*/
|
||||
unsigned long events[MAX_HWEVENTS];
|
||||
|
||||
/* The current counter index assigned to an event. When the
|
||||
* event hasn't been programmed into the cpu yet, this will
|
||||
* hold PIC_NO_INDEX. The event->hw.idx value tells us where
|
||||
* we ought to schedule the event.
|
||||
*/
|
||||
int current_idx[MAX_HWEVENTS];
|
||||
|
||||
/* Software copy of %pcr register on this cpu. */
|
||||
u64 pcr;
|
||||
|
||||
/* Enabled/disable state. */
|
||||
int enabled;
|
||||
};
|
||||
DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = { .enabled = 1, };
|
||||
|
||||
/* An event map describes the characteristics of a performance
|
||||
* counter event. In particular it gives the encoding as well as
|
||||
* a mask telling which counters the event can be measured on.
|
||||
*/
|
||||
struct perf_event_map {
|
||||
u16 encoding;
|
||||
u8 pic_mask;
|
||||
|
|
@ -69,15 +106,20 @@ struct perf_event_map {
|
|||
#define PIC_LOWER 0x02
|
||||
};
|
||||
|
||||
/* Encode a perf_event_map entry into a long. */
|
||||
static unsigned long perf_event_encode(const struct perf_event_map *pmap)
|
||||
{
|
||||
return ((unsigned long) pmap->encoding << 16) | pmap->pic_mask;
|
||||
}
|
||||
|
||||
static void perf_event_decode(unsigned long val, u16 *enc, u8 *msk)
|
||||
static u8 perf_event_get_msk(unsigned long val)
|
||||
{
|
||||
*msk = val & 0xff;
|
||||
*enc = val >> 16;
|
||||
return val & 0xff;
|
||||
}
|
||||
|
||||
static u64 perf_event_get_enc(unsigned long val)
|
||||
{
|
||||
return val >> 16;
|
||||
}
|
||||
|
||||
#define C(x) PERF_COUNT_HW_CACHE_##x
|
||||
|
|
@ -491,53 +533,6 @@ static inline void sparc_pmu_disable_event(struct cpu_hw_events *cpuc, struct hw
|
|||
pcr_ops->write(cpuc->pcr);
|
||||
}
|
||||
|
||||
void hw_perf_enable(void)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
u64 val;
|
||||
int i;
|
||||
|
||||
if (cpuc->enabled)
|
||||
return;
|
||||
|
||||
cpuc->enabled = 1;
|
||||
barrier();
|
||||
|
||||
val = cpuc->pcr;
|
||||
|
||||
for (i = 0; i < MAX_HWEVENTS; i++) {
|
||||
struct perf_event *cp = cpuc->events[i];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
if (!cp)
|
||||
continue;
|
||||
hwc = &cp->hw;
|
||||
val |= hwc->config_base;
|
||||
}
|
||||
|
||||
cpuc->pcr = val;
|
||||
|
||||
pcr_ops->write(cpuc->pcr);
|
||||
}
|
||||
|
||||
void hw_perf_disable(void)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
u64 val;
|
||||
|
||||
if (!cpuc->enabled)
|
||||
return;
|
||||
|
||||
cpuc->enabled = 0;
|
||||
|
||||
val = cpuc->pcr;
|
||||
val &= ~(PCR_UTRACE | PCR_STRACE |
|
||||
sparc_pmu->hv_bit | sparc_pmu->irq_bit);
|
||||
cpuc->pcr = val;
|
||||
|
||||
pcr_ops->write(cpuc->pcr);
|
||||
}
|
||||
|
||||
static u32 read_pmc(int idx)
|
||||
{
|
||||
u64 val;
|
||||
|
|
@ -566,6 +561,30 @@ static void write_pmc(int idx, u64 val)
|
|||
write_pic(pic);
|
||||
}
|
||||
|
||||
static u64 sparc_perf_event_update(struct perf_event *event,
|
||||
struct hw_perf_event *hwc, int idx)
|
||||
{
|
||||
int shift = 64 - 32;
|
||||
u64 prev_raw_count, new_raw_count;
|
||||
s64 delta;
|
||||
|
||||
again:
|
||||
prev_raw_count = atomic64_read(&hwc->prev_count);
|
||||
new_raw_count = read_pmc(idx);
|
||||
|
||||
if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
|
||||
new_raw_count) != prev_raw_count)
|
||||
goto again;
|
||||
|
||||
delta = (new_raw_count << shift) - (prev_raw_count << shift);
|
||||
delta >>= shift;
|
||||
|
||||
atomic64_add(delta, &event->count);
|
||||
atomic64_sub(delta, &hwc->period_left);
|
||||
|
||||
return new_raw_count;
|
||||
}
|
||||
|
||||
static int sparc_perf_event_set_period(struct perf_event *event,
|
||||
struct hw_perf_event *hwc, int idx)
|
||||
{
|
||||
|
|
@ -598,81 +617,166 @@ static int sparc_perf_event_set_period(struct perf_event *event,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int sparc_pmu_enable(struct perf_event *event)
|
||||
/* If performance event entries have been added, move existing
|
||||
* events around (if necessary) and then assign new entries to
|
||||
* counters.
|
||||
*/
|
||||
static u64 maybe_change_configuration(struct cpu_hw_events *cpuc, u64 pcr)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
int idx = hwc->idx;
|
||||
int i;
|
||||
|
||||
if (test_and_set_bit(idx, cpuc->used_mask))
|
||||
return -EAGAIN;
|
||||
if (!cpuc->n_added)
|
||||
goto out;
|
||||
|
||||
sparc_pmu_disable_event(cpuc, hwc, idx);
|
||||
/* Read in the counters which are moving. */
|
||||
for (i = 0; i < cpuc->n_events; i++) {
|
||||
struct perf_event *cp = cpuc->event[i];
|
||||
|
||||
cpuc->events[idx] = event;
|
||||
set_bit(idx, cpuc->active_mask);
|
||||
if (cpuc->current_idx[i] != PIC_NO_INDEX &&
|
||||
cpuc->current_idx[i] != cp->hw.idx) {
|
||||
sparc_perf_event_update(cp, &cp->hw,
|
||||
cpuc->current_idx[i]);
|
||||
cpuc->current_idx[i] = PIC_NO_INDEX;
|
||||
}
|
||||
}
|
||||
|
||||
sparc_perf_event_set_period(event, hwc, idx);
|
||||
sparc_pmu_enable_event(cpuc, hwc, idx);
|
||||
perf_event_update_userpage(event);
|
||||
return 0;
|
||||
/* Assign to counters all unassigned events. */
|
||||
for (i = 0; i < cpuc->n_events; i++) {
|
||||
struct perf_event *cp = cpuc->event[i];
|
||||
struct hw_perf_event *hwc = &cp->hw;
|
||||
int idx = hwc->idx;
|
||||
u64 enc;
|
||||
|
||||
if (cpuc->current_idx[i] != PIC_NO_INDEX)
|
||||
continue;
|
||||
|
||||
sparc_perf_event_set_period(cp, hwc, idx);
|
||||
cpuc->current_idx[i] = idx;
|
||||
|
||||
enc = perf_event_get_enc(cpuc->events[i]);
|
||||
pcr |= event_encoding(enc, idx);
|
||||
}
|
||||
out:
|
||||
return pcr;
|
||||
}
|
||||
|
||||
static u64 sparc_perf_event_update(struct perf_event *event,
|
||||
struct hw_perf_event *hwc, int idx)
|
||||
void hw_perf_enable(void)
|
||||
{
|
||||
int shift = 64 - 32;
|
||||
u64 prev_raw_count, new_raw_count;
|
||||
s64 delta;
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
u64 pcr;
|
||||
|
||||
again:
|
||||
prev_raw_count = atomic64_read(&hwc->prev_count);
|
||||
new_raw_count = read_pmc(idx);
|
||||
if (cpuc->enabled)
|
||||
return;
|
||||
|
||||
if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
|
||||
new_raw_count) != prev_raw_count)
|
||||
goto again;
|
||||
cpuc->enabled = 1;
|
||||
barrier();
|
||||
|
||||
delta = (new_raw_count << shift) - (prev_raw_count << shift);
|
||||
delta >>= shift;
|
||||
pcr = cpuc->pcr;
|
||||
if (!cpuc->n_events) {
|
||||
pcr = 0;
|
||||
} else {
|
||||
pcr = maybe_change_configuration(cpuc, pcr);
|
||||
|
||||
atomic64_add(delta, &event->count);
|
||||
atomic64_sub(delta, &hwc->period_left);
|
||||
/* We require that all of the events have the same
|
||||
* configuration, so just fetch the settings from the
|
||||
* first entry.
|
||||
*/
|
||||
cpuc->pcr = pcr | cpuc->event[0]->hw.config_base;
|
||||
}
|
||||
|
||||
return new_raw_count;
|
||||
pcr_ops->write(cpuc->pcr);
|
||||
}
|
||||
|
||||
void hw_perf_disable(void)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
u64 val;
|
||||
|
||||
if (!cpuc->enabled)
|
||||
return;
|
||||
|
||||
cpuc->enabled = 0;
|
||||
cpuc->n_added = 0;
|
||||
|
||||
val = cpuc->pcr;
|
||||
val &= ~(PCR_UTRACE | PCR_STRACE |
|
||||
sparc_pmu->hv_bit | sparc_pmu->irq_bit);
|
||||
cpuc->pcr = val;
|
||||
|
||||
pcr_ops->write(cpuc->pcr);
|
||||
}
|
||||
|
||||
static void sparc_pmu_disable(struct perf_event *event)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
int idx = hwc->idx;
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
clear_bit(idx, cpuc->active_mask);
|
||||
sparc_pmu_disable_event(cpuc, hwc, idx);
|
||||
local_irq_save(flags);
|
||||
perf_disable();
|
||||
|
||||
barrier();
|
||||
for (i = 0; i < cpuc->n_events; i++) {
|
||||
if (event == cpuc->event[i]) {
|
||||
int idx = cpuc->current_idx[i];
|
||||
|
||||
sparc_perf_event_update(event, hwc, idx);
|
||||
cpuc->events[idx] = NULL;
|
||||
clear_bit(idx, cpuc->used_mask);
|
||||
/* Shift remaining entries down into
|
||||
* the existing slot.
|
||||
*/
|
||||
while (++i < cpuc->n_events) {
|
||||
cpuc->event[i - 1] = cpuc->event[i];
|
||||
cpuc->events[i - 1] = cpuc->events[i];
|
||||
cpuc->current_idx[i - 1] =
|
||||
cpuc->current_idx[i];
|
||||
}
|
||||
|
||||
perf_event_update_userpage(event);
|
||||
/* Absorb the final count and turn off the
|
||||
* event.
|
||||
*/
|
||||
sparc_pmu_disable_event(cpuc, hwc, idx);
|
||||
barrier();
|
||||
sparc_perf_event_update(event, hwc, idx);
|
||||
|
||||
perf_event_update_userpage(event);
|
||||
|
||||
cpuc->n_events--;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
perf_enable();
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
static int active_event_index(struct cpu_hw_events *cpuc,
|
||||
struct perf_event *event)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < cpuc->n_events; i++) {
|
||||
if (cpuc->event[i] == event)
|
||||
break;
|
||||
}
|
||||
BUG_ON(i == cpuc->n_events);
|
||||
return cpuc->current_idx[i];
|
||||
}
|
||||
|
||||
static void sparc_pmu_read(struct perf_event *event)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
int idx = active_event_index(cpuc, event);
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
|
||||
sparc_perf_event_update(event, hwc, hwc->idx);
|
||||
sparc_perf_event_update(event, hwc, idx);
|
||||
}
|
||||
|
||||
static void sparc_pmu_unthrottle(struct perf_event *event)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
int idx = active_event_index(cpuc, event);
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
|
||||
sparc_pmu_enable_event(cpuc, hwc, hwc->idx);
|
||||
sparc_pmu_enable_event(cpuc, hwc, idx);
|
||||
}
|
||||
|
||||
static atomic_t active_events = ATOMIC_INIT(0);
|
||||
|
|
@ -750,43 +854,75 @@ static void hw_perf_event_destroy(struct perf_event *event)
|
|||
/* Make sure all events can be scheduled into the hardware at
|
||||
* the same time. This is simplified by the fact that we only
|
||||
* need to support 2 simultaneous HW events.
|
||||
*
|
||||
* As a side effect, the evts[]->hw.idx values will be assigned
|
||||
* on success. These are pending indexes. When the events are
|
||||
* actually programmed into the chip, these values will propagate
|
||||
* to the per-cpu cpuc->current_idx[] slots, see the code in
|
||||
* maybe_change_configuration() for details.
|
||||
*/
|
||||
static int sparc_check_constraints(unsigned long *events, int n_ev)
|
||||
static int sparc_check_constraints(struct perf_event **evts,
|
||||
unsigned long *events, int n_ev)
|
||||
{
|
||||
if (n_ev <= perf_max_events) {
|
||||
u8 msk1, msk2;
|
||||
u16 dummy;
|
||||
u8 msk0 = 0, msk1 = 0;
|
||||
int idx0 = 0;
|
||||
|
||||
if (n_ev == 1)
|
||||
return 0;
|
||||
BUG_ON(n_ev != 2);
|
||||
perf_event_decode(events[0], &dummy, &msk1);
|
||||
perf_event_decode(events[1], &dummy, &msk2);
|
||||
/* This case is possible when we are invoked from
|
||||
* hw_perf_group_sched_in().
|
||||
*/
|
||||
if (!n_ev)
|
||||
return 0;
|
||||
|
||||
/* If both events can go on any counter, OK. */
|
||||
if (msk1 == (PIC_UPPER | PIC_LOWER) &&
|
||||
msk2 == (PIC_UPPER | PIC_LOWER))
|
||||
return 0;
|
||||
if (n_ev > perf_max_events)
|
||||
return -1;
|
||||
|
||||
/* If one event is limited to a specific counter,
|
||||
* and the other can go on both, OK.
|
||||
*/
|
||||
if ((msk1 == PIC_UPPER || msk1 == PIC_LOWER) &&
|
||||
msk2 == (PIC_UPPER | PIC_LOWER))
|
||||
return 0;
|
||||
if ((msk2 == PIC_UPPER || msk2 == PIC_LOWER) &&
|
||||
msk1 == (PIC_UPPER | PIC_LOWER))
|
||||
return 0;
|
||||
msk0 = perf_event_get_msk(events[0]);
|
||||
if (n_ev == 1) {
|
||||
if (msk0 & PIC_LOWER)
|
||||
idx0 = 1;
|
||||
goto success;
|
||||
}
|
||||
BUG_ON(n_ev != 2);
|
||||
msk1 = perf_event_get_msk(events[1]);
|
||||
|
||||
/* If the events are fixed to different counters, OK. */
|
||||
if ((msk1 == PIC_UPPER && msk2 == PIC_LOWER) ||
|
||||
(msk1 == PIC_LOWER && msk2 == PIC_UPPER))
|
||||
return 0;
|
||||
/* If both events can go on any counter, OK. */
|
||||
if (msk0 == (PIC_UPPER | PIC_LOWER) &&
|
||||
msk1 == (PIC_UPPER | PIC_LOWER))
|
||||
goto success;
|
||||
|
||||
/* Otherwise, there is a conflict. */
|
||||
/* If one event is limited to a specific counter,
|
||||
* and the other can go on both, OK.
|
||||
*/
|
||||
if ((msk0 == PIC_UPPER || msk0 == PIC_LOWER) &&
|
||||
msk1 == (PIC_UPPER | PIC_LOWER)) {
|
||||
if (msk0 & PIC_LOWER)
|
||||
idx0 = 1;
|
||||
goto success;
|
||||
}
|
||||
|
||||
if ((msk1 == PIC_UPPER || msk1 == PIC_LOWER) &&
|
||||
msk0 == (PIC_UPPER | PIC_LOWER)) {
|
||||
if (msk1 & PIC_UPPER)
|
||||
idx0 = 1;
|
||||
goto success;
|
||||
}
|
||||
|
||||
/* If the events are fixed to different counters, OK. */
|
||||
if ((msk0 == PIC_UPPER && msk1 == PIC_LOWER) ||
|
||||
(msk0 == PIC_LOWER && msk1 == PIC_UPPER)) {
|
||||
if (msk0 & PIC_LOWER)
|
||||
idx0 = 1;
|
||||
goto success;
|
||||
}
|
||||
|
||||
/* Otherwise, there is a conflict. */
|
||||
return -1;
|
||||
|
||||
success:
|
||||
evts[0]->hw.idx = idx0;
|
||||
if (n_ev == 2)
|
||||
evts[1]->hw.idx = idx0 ^ 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int check_excludes(struct perf_event **evts, int n_prev, int n_new)
|
||||
|
|
@ -818,7 +954,8 @@ static int check_excludes(struct perf_event **evts, int n_prev, int n_new)
|
|||
}
|
||||
|
||||
static int collect_events(struct perf_event *group, int max_count,
|
||||
struct perf_event *evts[], unsigned long *events)
|
||||
struct perf_event *evts[], unsigned long *events,
|
||||
int *current_idx)
|
||||
{
|
||||
struct perf_event *event;
|
||||
int n = 0;
|
||||
|
|
@ -827,7 +964,8 @@ static int collect_events(struct perf_event *group, int max_count,
|
|||
if (n >= max_count)
|
||||
return -1;
|
||||
evts[n] = group;
|
||||
events[n++] = group->hw.event_base;
|
||||
events[n] = group->hw.event_base;
|
||||
current_idx[n++] = PIC_NO_INDEX;
|
||||
}
|
||||
list_for_each_entry(event, &group->sibling_list, group_entry) {
|
||||
if (!is_software_event(event) &&
|
||||
|
|
@ -835,20 +973,100 @@ static int collect_events(struct perf_event *group, int max_count,
|
|||
if (n >= max_count)
|
||||
return -1;
|
||||
evts[n] = event;
|
||||
events[n++] = event->hw.event_base;
|
||||
events[n] = event->hw.event_base;
|
||||
current_idx[n++] = PIC_NO_INDEX;
|
||||
}
|
||||
}
|
||||
return n;
|
||||
}
|
||||
|
||||
static void event_sched_in(struct perf_event *event, int cpu)
|
||||
{
|
||||
event->state = PERF_EVENT_STATE_ACTIVE;
|
||||
event->oncpu = cpu;
|
||||
event->tstamp_running += event->ctx->time - event->tstamp_stopped;
|
||||
if (is_software_event(event))
|
||||
event->pmu->enable(event);
|
||||
}
|
||||
|
||||
int hw_perf_group_sched_in(struct perf_event *group_leader,
|
||||
struct perf_cpu_context *cpuctx,
|
||||
struct perf_event_context *ctx, int cpu)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
struct perf_event *sub;
|
||||
int n0, n;
|
||||
|
||||
if (!sparc_pmu)
|
||||
return 0;
|
||||
|
||||
n0 = cpuc->n_events;
|
||||
n = collect_events(group_leader, perf_max_events - n0,
|
||||
&cpuc->event[n0], &cpuc->events[n0],
|
||||
&cpuc->current_idx[n0]);
|
||||
if (n < 0)
|
||||
return -EAGAIN;
|
||||
if (check_excludes(cpuc->event, n0, n))
|
||||
return -EINVAL;
|
||||
if (sparc_check_constraints(cpuc->event, cpuc->events, n + n0))
|
||||
return -EAGAIN;
|
||||
cpuc->n_events = n0 + n;
|
||||
cpuc->n_added += n;
|
||||
|
||||
cpuctx->active_oncpu += n;
|
||||
n = 1;
|
||||
event_sched_in(group_leader, cpu);
|
||||
list_for_each_entry(sub, &group_leader->sibling_list, group_entry) {
|
||||
if (sub->state != PERF_EVENT_STATE_OFF) {
|
||||
event_sched_in(sub, cpu);
|
||||
n++;
|
||||
}
|
||||
}
|
||||
ctx->nr_active += n;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int sparc_pmu_enable(struct perf_event *event)
|
||||
{
|
||||
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
|
||||
int n0, ret = -EAGAIN;
|
||||
unsigned long flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
perf_disable();
|
||||
|
||||
n0 = cpuc->n_events;
|
||||
if (n0 >= perf_max_events)
|
||||
goto out;
|
||||
|
||||
cpuc->event[n0] = event;
|
||||
cpuc->events[n0] = event->hw.event_base;
|
||||
cpuc->current_idx[n0] = PIC_NO_INDEX;
|
||||
|
||||
if (check_excludes(cpuc->event, n0, 1))
|
||||
goto out;
|
||||
if (sparc_check_constraints(cpuc->event, cpuc->events, n0 + 1))
|
||||
goto out;
|
||||
|
||||
cpuc->n_events++;
|
||||
cpuc->n_added++;
|
||||
|
||||
ret = 0;
|
||||
out:
|
||||
perf_enable();
|
||||
local_irq_restore(flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __hw_perf_event_init(struct perf_event *event)
|
||||
{
|
||||
struct perf_event_attr *attr = &event->attr;
|
||||
struct perf_event *evts[MAX_HWEVENTS];
|
||||
struct hw_perf_event *hwc = &event->hw;
|
||||
unsigned long events[MAX_HWEVENTS];
|
||||
int current_idx_dmy[MAX_HWEVENTS];
|
||||
const struct perf_event_map *pmap;
|
||||
u64 enc;
|
||||
int n;
|
||||
|
||||
if (atomic_read(&nmi_active) < 0)
|
||||
|
|
@ -865,10 +1083,7 @@ static int __hw_perf_event_init(struct perf_event *event)
|
|||
} else
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
/* We save the enable bits in the config_base. So to
|
||||
* turn off sampling just write 'config', and to enable
|
||||
* things write 'config | config_base'.
|
||||
*/
|
||||
/* We save the enable bits in the config_base. */
|
||||
hwc->config_base = sparc_pmu->irq_bit;
|
||||
if (!attr->exclude_user)
|
||||
hwc->config_base |= PCR_UTRACE;
|
||||
|
|
@ -879,13 +1094,11 @@ static int __hw_perf_event_init(struct perf_event *event)
|
|||
|
||||
hwc->event_base = perf_event_encode(pmap);
|
||||
|
||||
enc = pmap->encoding;
|
||||
|
||||
n = 0;
|
||||
if (event->group_leader != event) {
|
||||
n = collect_events(event->group_leader,
|
||||
perf_max_events - 1,
|
||||
evts, events);
|
||||
evts, events, current_idx_dmy);
|
||||
if (n < 0)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
|
@ -895,9 +1108,11 @@ static int __hw_perf_event_init(struct perf_event *event)
|
|||
if (check_excludes(evts, n, 1))
|
||||
return -EINVAL;
|
||||
|
||||
if (sparc_check_constraints(events, n + 1))
|
||||
if (sparc_check_constraints(evts, events, n + 1))
|
||||
return -EINVAL;
|
||||
|
||||
hwc->idx = PIC_NO_INDEX;
|
||||
|
||||
/* Try to do all error checking before this point, as unwinding
|
||||
* state after grabbing the PMC is difficult.
|
||||
*/
|
||||
|
|
@ -910,15 +1125,6 @@ static int __hw_perf_event_init(struct perf_event *event)
|
|||
atomic64_set(&hwc->period_left, hwc->sample_period);
|
||||
}
|
||||
|
||||
if (pmap->pic_mask & PIC_UPPER) {
|
||||
hwc->idx = PIC_UPPER_INDEX;
|
||||
enc <<= sparc_pmu->upper_shift;
|
||||
} else {
|
||||
hwc->idx = PIC_LOWER_INDEX;
|
||||
enc <<= sparc_pmu->lower_shift;
|
||||
}
|
||||
|
||||
hwc->config |= enc;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -968,7 +1174,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,
|
|||
struct perf_sample_data data;
|
||||
struct cpu_hw_events *cpuc;
|
||||
struct pt_regs *regs;
|
||||
int idx;
|
||||
int i;
|
||||
|
||||
if (!atomic_read(&active_events))
|
||||
return NOTIFY_DONE;
|
||||
|
|
@ -997,13 +1203,12 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,
|
|||
if (sparc_pmu->irq_bit)
|
||||
pcr_ops->write(cpuc->pcr);
|
||||
|
||||
for (idx = 0; idx < MAX_HWEVENTS; idx++) {
|
||||
struct perf_event *event = cpuc->events[idx];
|
||||
for (i = 0; i < cpuc->n_events; i++) {
|
||||
struct perf_event *event = cpuc->event[i];
|
||||
int idx = cpuc->current_idx[i];
|
||||
struct hw_perf_event *hwc;
|
||||
u64 val;
|
||||
|
||||
if (!test_bit(idx, cpuc->active_mask))
|
||||
continue;
|
||||
hwc = &event->hw;
|
||||
val = sparc_perf_event_update(event, hwc, idx);
|
||||
if (val & (1ULL << 31))
|
||||
|
|
@ -1055,10 +1260,122 @@ void __init init_hw_perf_events(void)
|
|||
|
||||
pr_cont("Supported PMU type is '%s'\n", sparc_pmu_type);
|
||||
|
||||
/* All sparc64 PMUs currently have 2 events. But this simple
|
||||
* driver only supports one active event at a time.
|
||||
*/
|
||||
perf_max_events = 1;
|
||||
/* All sparc64 PMUs currently have 2 events. */
|
||||
perf_max_events = 2;
|
||||
|
||||
register_die_notifier(&perf_event_nmi_notifier);
|
||||
}
|
||||
|
||||
static inline void callchain_store(struct perf_callchain_entry *entry, u64 ip)
|
||||
{
|
||||
if (entry->nr < PERF_MAX_STACK_DEPTH)
|
||||
entry->ip[entry->nr++] = ip;
|
||||
}
|
||||
|
||||
static void perf_callchain_kernel(struct pt_regs *regs,
|
||||
struct perf_callchain_entry *entry)
|
||||
{
|
||||
unsigned long ksp, fp;
|
||||
|
||||
callchain_store(entry, PERF_CONTEXT_KERNEL);
|
||||
callchain_store(entry, regs->tpc);
|
||||
|
||||
ksp = regs->u_regs[UREG_I6];
|
||||
fp = ksp + STACK_BIAS;
|
||||
do {
|
||||
struct sparc_stackf *sf;
|
||||
struct pt_regs *regs;
|
||||
unsigned long pc;
|
||||
|
||||
if (!kstack_valid(current_thread_info(), fp))
|
||||
break;
|
||||
|
||||
sf = (struct sparc_stackf *) fp;
|
||||
regs = (struct pt_regs *) (sf + 1);
|
||||
|
||||
if (kstack_is_trap_frame(current_thread_info(), regs)) {
|
||||
if (user_mode(regs))
|
||||
break;
|
||||
pc = regs->tpc;
|
||||
fp = regs->u_regs[UREG_I6] + STACK_BIAS;
|
||||
} else {
|
||||
pc = sf->callers_pc;
|
||||
fp = (unsigned long)sf->fp + STACK_BIAS;
|
||||
}
|
||||
callchain_store(entry, pc);
|
||||
} while (entry->nr < PERF_MAX_STACK_DEPTH);
|
||||
}
|
||||
|
||||
static void perf_callchain_user_64(struct pt_regs *regs,
|
||||
struct perf_callchain_entry *entry)
|
||||
{
|
||||
unsigned long ufp;
|
||||
|
||||
callchain_store(entry, PERF_CONTEXT_USER);
|
||||
callchain_store(entry, regs->tpc);
|
||||
|
||||
ufp = regs->u_regs[UREG_I6] + STACK_BIAS;
|
||||
do {
|
||||
struct sparc_stackf *usf, sf;
|
||||
unsigned long pc;
|
||||
|
||||
usf = (struct sparc_stackf *) ufp;
|
||||
if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
|
||||
break;
|
||||
|
||||
pc = sf.callers_pc;
|
||||
ufp = (unsigned long)sf.fp + STACK_BIAS;
|
||||
callchain_store(entry, pc);
|
||||
} while (entry->nr < PERF_MAX_STACK_DEPTH);
|
||||
}
|
||||
|
||||
static void perf_callchain_user_32(struct pt_regs *regs,
|
||||
struct perf_callchain_entry *entry)
|
||||
{
|
||||
unsigned long ufp;
|
||||
|
||||
callchain_store(entry, PERF_CONTEXT_USER);
|
||||
callchain_store(entry, regs->tpc);
|
||||
|
||||
ufp = regs->u_regs[UREG_I6];
|
||||
do {
|
||||
struct sparc_stackf32 *usf, sf;
|
||||
unsigned long pc;
|
||||
|
||||
usf = (struct sparc_stackf32 *) ufp;
|
||||
if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
|
||||
break;
|
||||
|
||||
pc = sf.callers_pc;
|
||||
ufp = (unsigned long)sf.fp;
|
||||
callchain_store(entry, pc);
|
||||
} while (entry->nr < PERF_MAX_STACK_DEPTH);
|
||||
}
|
||||
|
||||
/* Like powerpc we can't get PMU interrupts within the PMU handler,
|
||||
* so no need for seperate NMI and IRQ chains as on x86.
|
||||
*/
|
||||
static DEFINE_PER_CPU(struct perf_callchain_entry, callchain);
|
||||
|
||||
struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
|
||||
{
|
||||
struct perf_callchain_entry *entry = &__get_cpu_var(callchain);
|
||||
|
||||
entry->nr = 0;
|
||||
if (!user_mode(regs)) {
|
||||
stack_trace_flush();
|
||||
perf_callchain_kernel(regs, entry);
|
||||
if (current->mm)
|
||||
regs = task_pt_regs(current);
|
||||
else
|
||||
regs = NULL;
|
||||
}
|
||||
if (regs) {
|
||||
flushw_user();
|
||||
if (test_thread_flag(TIF_32BIT))
|
||||
perf_callchain_user_32(regs, entry);
|
||||
else
|
||||
perf_callchain_user_64(regs, entry);
|
||||
}
|
||||
return entry;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -365,6 +365,7 @@ EXPORT_SYMBOL(get_fb_unmapped_area);
|
|||
void arch_pick_mmap_layout(struct mm_struct *mm)
|
||||
{
|
||||
unsigned long random_factor = 0UL;
|
||||
unsigned long gap;
|
||||
|
||||
if (current->flags & PF_RANDOMIZE) {
|
||||
random_factor = get_random_int();
|
||||
|
|
@ -379,9 +380,10 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
|
|||
* Fall back to the standard layout if the personality
|
||||
* bit is set, or if the expected stack growth is unlimited:
|
||||
*/
|
||||
gap = rlimit(RLIMIT_STACK);
|
||||
if (!test_thread_flag(TIF_32BIT) ||
|
||||
(current->personality & ADDR_COMPAT_LAYOUT) ||
|
||||
current->signal->rlim[RLIMIT_STACK].rlim_cur == RLIM_INFINITY ||
|
||||
gap == RLIM_INFINITY ||
|
||||
sysctl_legacy_va_layout) {
|
||||
mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
|
||||
mm->get_unmapped_area = arch_get_unmapped_area;
|
||||
|
|
@ -389,9 +391,7 @@ void arch_pick_mmap_layout(struct mm_struct *mm)
|
|||
} else {
|
||||
/* We know it's 32-bit */
|
||||
unsigned long task_size = STACK_TOP32;
|
||||
unsigned long gap;
|
||||
|
||||
gap = current->signal->rlim[RLIMIT_STACK].rlim_cur;
|
||||
if (gap < 128 * 1024 * 1024)
|
||||
gap = 128 * 1024 * 1024;
|
||||
if (gap > (task_size / 6 * 5))
|
||||
|
|
|
|||
|
|
@ -35,6 +35,7 @@
|
|||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/oplib.h>
|
||||
#include <asm/timex.h>
|
||||
#include <asm/timer.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/irq.h>
|
||||
|
|
@ -51,7 +52,6 @@ DEFINE_SPINLOCK(rtc_lock);
|
|||
EXPORT_SYMBOL(rtc_lock);
|
||||
|
||||
static int set_rtc_mmss(unsigned long);
|
||||
static int sbus_do_settimeofday(struct timespec *tv);
|
||||
|
||||
unsigned long profile_pc(struct pt_regs *regs)
|
||||
{
|
||||
|
|
@ -76,6 +76,8 @@ EXPORT_SYMBOL(profile_pc);
|
|||
|
||||
__volatile__ unsigned int *master_l10_counter;
|
||||
|
||||
u32 (*do_arch_gettimeoffset)(void);
|
||||
|
||||
/*
|
||||
* timer_interrupt() needs to keep up the real-time clock,
|
||||
* as well as call the "do_timer()" routine every clocktick
|
||||
|
|
@ -196,17 +198,37 @@ static int __init clock_init(void)
|
|||
{
|
||||
return of_register_driver(&clock_driver, &of_platform_bus_type);
|
||||
}
|
||||
|
||||
/* Must be after subsys_initcall() so that busses are probed. Must
|
||||
* be before device_initcall() because things like the RTC driver
|
||||
* need to see the clock registers.
|
||||
*/
|
||||
fs_initcall(clock_init);
|
||||
|
||||
|
||||
u32 sbus_do_gettimeoffset(void)
|
||||
{
|
||||
unsigned long val = *master_l10_counter;
|
||||
unsigned long usec = (val >> 10) & 0x1fffff;
|
||||
|
||||
/* Limit hit? */
|
||||
if (val & 0x80000000)
|
||||
usec += 1000000 / HZ;
|
||||
|
||||
return usec * 1000;
|
||||
}
|
||||
|
||||
|
||||
u32 arch_gettimeoffset(void)
|
||||
{
|
||||
if (unlikely(!do_arch_gettimeoffset))
|
||||
return 0;
|
||||
return do_arch_gettimeoffset();
|
||||
}
|
||||
|
||||
static void __init sbus_time_init(void)
|
||||
{
|
||||
do_arch_gettimeoffset = sbus_do_gettimeoffset;
|
||||
|
||||
BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
|
||||
btfixup();
|
||||
|
||||
sparc_init_timers(timer_interrupt);
|
||||
|
|
@ -224,94 +246,6 @@ void __init time_init(void)
|
|||
sbus_time_init();
|
||||
}
|
||||
|
||||
static inline unsigned long do_gettimeoffset(void)
|
||||
{
|
||||
unsigned long val = *master_l10_counter;
|
||||
unsigned long usec = (val >> 10) & 0x1fffff;
|
||||
|
||||
/* Limit hit? */
|
||||
if (val & 0x80000000)
|
||||
usec += 1000000 / HZ;
|
||||
|
||||
return usec;
|
||||
}
|
||||
|
||||
/* Ok, my cute asm atomicity trick doesn't work anymore.
|
||||
* There are just too many variables that need to be protected
|
||||
* now (both members of xtime, et al.)
|
||||
*/
|
||||
void do_gettimeofday(struct timeval *tv)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned long seq;
|
||||
unsigned long usec, sec;
|
||||
unsigned long max_ntp_tick = tick_usec - tickadj;
|
||||
|
||||
do {
|
||||
seq = read_seqbegin_irqsave(&xtime_lock, flags);
|
||||
usec = do_gettimeoffset();
|
||||
|
||||
/*
|
||||
* If time_adjust is negative then NTP is slowing the clock
|
||||
* so make sure not to go into next possible interval.
|
||||
* Better to lose some accuracy than have time go backwards..
|
||||
*/
|
||||
if (unlikely(time_adjust < 0))
|
||||
usec = min(usec, max_ntp_tick);
|
||||
|
||||
sec = xtime.tv_sec;
|
||||
usec += (xtime.tv_nsec / 1000);
|
||||
} while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
|
||||
|
||||
while (usec >= 1000000) {
|
||||
usec -= 1000000;
|
||||
sec++;
|
||||
}
|
||||
|
||||
tv->tv_sec = sec;
|
||||
tv->tv_usec = usec;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(do_gettimeofday);
|
||||
|
||||
int do_settimeofday(struct timespec *tv)
|
||||
{
|
||||
int ret;
|
||||
|
||||
write_seqlock_irq(&xtime_lock);
|
||||
ret = bus_do_settimeofday(tv);
|
||||
write_sequnlock_irq(&xtime_lock);
|
||||
clock_was_set();
|
||||
return ret;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(do_settimeofday);
|
||||
|
||||
static int sbus_do_settimeofday(struct timespec *tv)
|
||||
{
|
||||
time_t wtm_sec, sec = tv->tv_sec;
|
||||
long wtm_nsec, nsec = tv->tv_nsec;
|
||||
|
||||
if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* This is revolting. We need to set "xtime" correctly. However, the
|
||||
* value in this location is the value at the most recent update of
|
||||
* wall time. Discover what correction gettimeofday() would have
|
||||
* made, and then undo it!
|
||||
*/
|
||||
nsec -= 1000 * do_gettimeoffset();
|
||||
|
||||
wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
|
||||
wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
|
||||
|
||||
set_normalized_timespec(&xtime, sec, nsec);
|
||||
set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
|
||||
|
||||
ntp_clear();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int set_rtc_mmss(unsigned long secs)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
#include <linux/signal.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/smp.h>
|
||||
#include <linux/perf_event.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/kdebug.h>
|
||||
|
|
@ -203,6 +204,8 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,
|
|||
if (in_atomic() || !mm)
|
||||
goto no_context;
|
||||
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
|
||||
|
||||
down_read(&mm->mmap_sem);
|
||||
|
||||
/*
|
||||
|
|
@ -249,10 +252,15 @@ asmlinkage void do_sparc_fault(struct pt_regs *regs, int text_fault, int write,
|
|||
goto do_sigbus;
|
||||
BUG();
|
||||
}
|
||||
if (fault & VM_FAULT_MAJOR)
|
||||
if (fault & VM_FAULT_MAJOR) {
|
||||
current->maj_flt++;
|
||||
else
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
|
||||
regs, address);
|
||||
} else {
|
||||
current->min_flt++;
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
|
||||
regs, address);
|
||||
}
|
||||
up_read(&mm->mmap_sem);
|
||||
return;
|
||||
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/perf_event.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/kprobes.h>
|
||||
#include <linux/kdebug.h>
|
||||
|
|
@ -296,6 +297,8 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
|
|||
if (in_atomic() || !mm)
|
||||
goto intr_or_no_mm;
|
||||
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
|
||||
|
||||
if (!down_read_trylock(&mm->mmap_sem)) {
|
||||
if ((regs->tstate & TSTATE_PRIV) &&
|
||||
!search_exception_tables(regs->tpc)) {
|
||||
|
|
@ -400,11 +403,15 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
|
|||
goto do_sigbus;
|
||||
BUG();
|
||||
}
|
||||
if (fault & VM_FAULT_MAJOR)
|
||||
if (fault & VM_FAULT_MAJOR) {
|
||||
current->maj_flt++;
|
||||
else
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
|
||||
regs, address);
|
||||
} else {
|
||||
current->min_flt++;
|
||||
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
|
||||
regs, address);
|
||||
}
|
||||
up_read(&mm->mmap_sem);
|
||||
|
||||
mm_rss = get_mm_rss(mm);
|
||||
|
|
|
|||
Loading…
Reference in New Issue