mirror of https://gitee.com/openkylin/linux.git
MIPS: dts: Add initial DTS for the PIC32MZDA Starter Kit
This adds basic DTS configuration for the PIC32MZDA chip and in turn the PIC32MZDA Starter Kit. Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12104/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Joshua Henderson
Ralf Baechle
parent
2572f00db8
commit
842b6b16f5
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@ -4,6 +4,7 @@ dts-dirs += ingenic
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dts-dirs += lantiq
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dts-dirs += mti
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dts-dirs += netlogic
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dts-dirs += pic32
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dts-dirs += qca
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dts-dirs += ralink
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dts-dirs += xilfpga
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@ -0,0 +1,12 @@
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dtb-$(CONFIG_DTB_PIC32_MZDA_SK) += pic32mzda_sk.dtb
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dtb-$(CONFIG_DTB_PIC32_NONE) += \
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pic32mzda_sk.dtb
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obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
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# Force kbuild to make empty built-in.o if necessary
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obj- += dummy.o
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always := $(dtb-y)
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clean-files := *.dtb *.dtb.S
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@ -0,0 +1,236 @@
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/*
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* Device Tree Source for PIC32MZDA clock data
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*
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* Purna Chandra Mandal <purna.mandal@microchip.com>
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* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
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*
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* Licensed under GPLv2 or later.
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*/
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/* all fixed rate clocks */
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/ {
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POSC:posc_clk { /* On-chip primary oscillator */
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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FRC:frc_clk { /* internal FRC oscillator */
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <8000000>;
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};
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BFRC:bfrc_clk { /* internal backup FRC oscillator */
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <8000000>;
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};
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LPRC:lprc_clk { /* internal low-power FRC oscillator */
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32000>;
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};
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/* UPLL provides clock to USBCORE */
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UPLL:usb_phy_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "usbphy_clk";
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};
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TxCKI:txcki_clk { /* external clock input on TxCLKI pin */
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <4000000>;
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status = "disabled";
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};
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/* external clock input on REFCLKIx pin */
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REFIx:refix_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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status = "disabled";
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};
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/* PIC32 specific clks */
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pic32_clktree {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x1f801200 0x200>;
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compatible = "microchip,pic32mzda-clk";
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ranges = <0 0x1f801200 0x200>;
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/* secondary oscillator; external input on SOSCI pin */
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SOSC:sosc_clk@0 {
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-sosc";
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clock-frequency = <32768>;
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reg = <0x000 0x10>, /* enable reg */
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<0x1d0 0x10>; /* status reg */
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microchip,bit-mask = <0x02>; /* enable mask */
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microchip,status-bit-mask = <0x10>; /* status-mask*/
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};
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FRCDIV:frcdiv_clk {
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-frcdivclk";
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clocks = <&FRC>;
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clock-output-names = "frcdiv_clk";
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};
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/* System PLL clock */
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SYSPLL:spll_clk@020 {
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-syspll";
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reg = <0x020 0x10>, /* SPLL register */
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<0x1d0 0x10>; /* CLKSTAT register */
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clocks = <&POSC>, <&FRC>;
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clock-output-names = "sys_pll";
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microchip,status-bit-mask = <0x80>; /* SPLLRDY */
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};
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/* system clock; mux with postdiv & slew */
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SYSCLK:sys_clk@1c0 {
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-sysclk-v2";
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reg = <0x1c0 0x04>; /* SLEWCON */
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clocks = <&FRCDIV>, <&SYSPLL>, <&POSC>, <&SOSC>,
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<&LPRC>, <&FRCDIV>;
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microchip,clock-indices = <0>, <1>, <2>, <4>,
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<5>, <7>;
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clock-output-names = "sys_clk";
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};
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/* Peripheral bus1 clock */
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PBCLK1:pb1_clk@140 {
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reg = <0x140 0x10>;
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-pbclk";
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clocks = <&SYSCLK>;
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clock-output-names = "pb1_clk";
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/* used by system modules, not gateable */
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microchip,ignore-unused;
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};
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/* Peripheral bus2 clock */
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PBCLK2:pb2_clk@150 {
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reg = <0x150 0x10>;
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-pbclk";
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clocks = <&SYSCLK>;
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clock-output-names = "pb2_clk";
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/* avoid gating even if unused */
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microchip,ignore-unused;
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};
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/* Peripheral bus3 clock */
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PBCLK3:pb3_clk@160 {
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reg = <0x160 0x10>;
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-pbclk";
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clocks = <&SYSCLK>;
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clock-output-names = "pb3_clk";
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};
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/* Peripheral bus4 clock(I/O ports, GPIO) */
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PBCLK4:pb4_clk@170 {
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reg = <0x170 0x10>;
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-pbclk";
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clocks = <&SYSCLK>;
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clock-output-names = "pb4_clk";
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};
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/* Peripheral bus clock */
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PBCLK5:pb5_clk@180 {
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reg = <0x180 0x10>;
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-pbclk";
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clocks = <&SYSCLK>;
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clock-output-names = "pb5_clk";
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};
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/* Peripheral Bus6 clock; */
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PBCLK6:pb6_clk@190 {
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reg = <0x190 0x10>;
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compatible = "microchip,pic32mzda-pbclk";
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clocks = <&SYSCLK>;
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#clock-cells = <0>;
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};
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/* Peripheral bus7 clock */
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PBCLK7:pb7_clk@1a0 {
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reg = <0x1a0 0x10>;
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-pbclk";
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/* CPU is driven by this clock; so named */
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clock-output-names = "cpu_clk";
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clocks = <&SYSCLK>;
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};
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/* Reference Oscillator clock for SPI/I2S */
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REFCLKO1:refo1_clk@80 {
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reg = <0x080 0x20>;
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-refoclk";
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clocks = <&SYSCLK>, <&PBCLK1>, <&POSC>, <&FRC>, <&LPRC>,
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<&SOSC>, <&SYSPLL>, <&REFIx>, <&BFRC>;
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microchip,clock-indices = <0>, <1>, <2>, <3>, <4>,
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<5>, <7>, <8>, <9>;
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clock-output-names = "refo1_clk";
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};
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/* Reference Oscillator clock for SQI */
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REFCLKO2:refo2_clk@a0 {
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reg = <0x0a0 0x20>;
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#clock-cells = <0>;
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compatible = "microchip,pic32mzda-refoclk";
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clocks = <&SYSCLK>, <&PBCLK1>, <&POSC>, <&FRC>, <&LPRC>,
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<&SOSC>, <&SYSPLL>, <&REFIx>, <&BFRC>;
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microchip,clock-indices = <0>, <1>, <2>, <3>, <4>,
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<5>, <7>, <8>, <9>;
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clock-output-names = "refo2_clk";
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};
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/* Reference Oscillator clock, ADC */
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REFCLKO3:refo3_clk@c0 {
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reg = <0x0c0 0x20>;
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compatible = "microchip,pic32mzda-refoclk";
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clocks = <&SYSCLK>, <&PBCLK1>, <&POSC>, <&FRC>, <&LPRC>,
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<&SOSC>, <&SYSPLL>, <&REFIx>, <&BFRC>;
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microchip,clock-indices = <0>, <1>, <2>, <3>, <4>,
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<5>, <7>, <8>, <9>;
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#clock-cells = <0>;
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clock-output-names = "refo3_clk";
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};
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/* Reference Oscillator clock */
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REFCLKO4:refo4_clk@e0 {
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reg = <0x0e0 0x20>;
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compatible = "microchip,pic32mzda-refoclk";
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clocks = <&SYSCLK>, <&PBCLK1>, <&POSC>, <&FRC>, <&LPRC>,
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<&SOSC>, <&SYSPLL>, <&REFIx>, <&BFRC>;
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microchip,clock-indices = <0>, <1>, <2>, <3>, <4>,
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<5>, <7>, <8>, <9>;
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#clock-cells = <0>;
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clock-output-names = "refo4_clk";
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};
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/* Reference Oscillator clock, LCD */
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REFCLKO5:refo5_clk@100 {
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reg = <0x100 0x20>;
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compatible = "microchip,pic32mzda-refoclk";
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clocks = <&SYSCLK>,<&PBCLK1>,<&POSC>,<&FRC>,<&LPRC>,
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<&SOSC>,<&SYSPLL>,<&REFIx>,<&BFRC>;
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microchip,clock-indices = <0>, <1>, <2>, <3>, <4>,
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<5>, <7>, <8>, <9>;
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#clock-cells = <0>;
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clock-output-names = "refo5_clk";
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};
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};
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};
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@ -0,0 +1,281 @@
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/*
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* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "pic32mzda-clk.dtsi"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&evic>;
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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gpio3 = &gpio3;
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gpio4 = &gpio4;
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gpio5 = &gpio5;
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gpio6 = &gpio6;
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gpio7 = &gpio7;
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gpio8 = &gpio8;
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gpio9 = &gpio9;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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serial5 = &uart6;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "mti,mips14KEc";
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device_type = "cpu";
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};
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};
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soc {
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compatible = "microchip,pic32mzda-infra";
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interrupts = <0 IRQ_TYPE_EDGE_RISING>;
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};
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evic: interrupt-controller@1f810000 {
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compatible = "microchip,pic32mzda-evic";
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x1f810000 0x1000>;
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microchip,external-irqs = <3 8 13 18 23>;
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};
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pic32_pinctrl: pinctrl@1f801400{
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "microchip,pic32mzda-pinctrl";
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reg = <0x1f801400 0x400>;
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clocks = <&PBCLK1>;
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};
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/* PORTA */
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gpio0: gpio0@1f860000 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x1f860000 0x100>;
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interrupts = <118 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&PBCLK4>;
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microchip,gpio-bank = <0>;
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gpio-ranges = <&pic32_pinctrl 0 0 16>;
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};
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/* PORTB */
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gpio1: gpio1@1f860100 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x1f860100 0x100>;
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interrupts = <119 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&PBCLK4>;
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microchip,gpio-bank = <1>;
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gpio-ranges = <&pic32_pinctrl 0 16 16>;
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};
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/* PORTC */
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gpio2: gpio2@1f860200 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x1f860200 0x100>;
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interrupts = <120 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&PBCLK4>;
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microchip,gpio-bank = <2>;
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gpio-ranges = <&pic32_pinctrl 0 32 16>;
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};
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/* PORTD */
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gpio3: gpio3@1f860300 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x1f860300 0x100>;
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interrupts = <121 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&PBCLK4>;
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microchip,gpio-bank = <3>;
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gpio-ranges = <&pic32_pinctrl 0 48 16>;
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};
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/* PORTE */
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gpio4: gpio4@1f860400 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x1f860400 0x100>;
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interrupts = <122 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&PBCLK4>;
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microchip,gpio-bank = <4>;
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gpio-ranges = <&pic32_pinctrl 0 64 16>;
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};
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/* PORTF */
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gpio5: gpio5@1f860500 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x1f860500 0x100>;
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interrupts = <123 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&PBCLK4>;
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microchip,gpio-bank = <5>;
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gpio-ranges = <&pic32_pinctrl 0 80 16>;
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};
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/* PORTG */
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gpio6: gpio6@1f860600 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x1f860600 0x100>;
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interrupts = <124 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&PBCLK4>;
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microchip,gpio-bank = <6>;
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gpio-ranges = <&pic32_pinctrl 0 96 16>;
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};
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/* PORTH */
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gpio7: gpio7@1f860700 {
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compatible = "microchip,pic32mzda-gpio";
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reg = <0x1f860700 0x100>;
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interrupts = <125 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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clocks = <&PBCLK4>;
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microchip,gpio-bank = <7>;
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gpio-ranges = <&pic32_pinctrl 0 112 16>;
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};
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/* PORTI does not exist */
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/* PORTJ */
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gpio8: gpio8@1f860800 {
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compatible = "microchip,pic32mzda-gpio";
|
||||
reg = <0x1f860800 0x100>;
|
||||
interrupts = <126 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&PBCLK4>;
|
||||
microchip,gpio-bank = <8>;
|
||||
gpio-ranges = <&pic32_pinctrl 0 128 16>;
|
||||
};
|
||||
|
||||
/* PORTK */
|
||||
gpio9: gpio9@1f860900 {
|
||||
compatible = "microchip,pic32mzda-gpio";
|
||||
reg = <0x1f860900 0x100>;
|
||||
interrupts = <127 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&PBCLK4>;
|
||||
microchip,gpio-bank = <9>;
|
||||
gpio-ranges = <&pic32_pinctrl 0 144 16>;
|
||||
};
|
||||
|
||||
sdhci: sdhci@1f8ec000 {
|
||||
compatible = "microchip,pic32mzda-sdhci";
|
||||
reg = <0x1f8ec000 0x100>;
|
||||
interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&REFCLKO4>, <&PBCLK5>;
|
||||
clock-names = "base_clk", "sys_clk";
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@1f822000 {
|
||||
compatible = "microchip,pic32mzda-uart";
|
||||
reg = <0x1f822000 0x50>;
|
||||
interrupts = <112 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&PBCLK2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@1f822200 {
|
||||
compatible = "microchip,pic32mzda-uart";
|
||||
reg = <0x1f822200 0x50>;
|
||||
interrupts = <145 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<146 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<147 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&PBCLK2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: serial@1f822400 {
|
||||
compatible = "microchip,pic32mzda-uart";
|
||||
reg = <0x1f822400 0x50>;
|
||||
interrupts = <157 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<158 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<159 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&PBCLK2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart4: serial@1f822600 {
|
||||
compatible = "microchip,pic32mzda-uart";
|
||||
reg = <0x1f822600 0x50>;
|
||||
interrupts = <170 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<171 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<172 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&PBCLK2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart5: serial@1f822800 {
|
||||
compatible = "microchip,pic32mzda-uart";
|
||||
reg = <0x1f822800 0x50>;
|
||||
interrupts = <179 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<180 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<181 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&PBCLK2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart6: serial@1f822A00 {
|
||||
compatible = "microchip,pic32mzda-uart";
|
||||
reg = <0x1f822A00 0x50>;
|
||||
interrupts = <188 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<189 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&PBCLK2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,151 @@
|
|||
/*
|
||||
* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
#include "pic32mzda.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "microchip,pic32mzda-sk", "microchip,pic32mzda";
|
||||
model = "Microchip PIC32MZDA Starter Kit";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x08000000 0x08000000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "earlyprintk=ttyPIC1,115200n8r console=ttyPIC1,115200n8";
|
||||
};
|
||||
|
||||
leds0 {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds_s0>;
|
||||
|
||||
led@1 {
|
||||
label = "pic32mzda_sk:red:led1";
|
||||
gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "pic32mzda_sk:yellow:led2";
|
||||
gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
label = "pic32mzda_sk:green:led3";
|
||||
gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
keys0 {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&user_buttons_s0>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button@sw1 {
|
||||
label = "ESC";
|
||||
linux,code = <1>;
|
||||
gpios = <&gpio1 12 0>;
|
||||
};
|
||||
|
||||
button@sw2 {
|
||||
label = "Home";
|
||||
linux,code = <102>;
|
||||
gpios = <&gpio1 13 0>;
|
||||
};
|
||||
|
||||
button@sw3 {
|
||||
label = "Menu";
|
||||
linux,code = <139>;
|
||||
gpios = <&gpio1 14 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdhc1>;
|
||||
status = "okay";
|
||||
assigned-clocks = <&REFCLKO2>,<&REFCLKO4>,<&REFCLKO5>;
|
||||
assigned-clock-rates = <50000000>,<25000000>,<40000000>;
|
||||
};
|
||||
|
||||
&pic32_pinctrl {
|
||||
|
||||
pinctrl_sdhc1: sdhc1_pins0 {
|
||||
pins = "A6", "D4", "G13", "G12", "G14", "A7", "A0";
|
||||
microchip,digital;
|
||||
};
|
||||
|
||||
user_leds_s0: user_leds_s0 {
|
||||
pins = "H0", "H1", "H2";
|
||||
output-low;
|
||||
microchip,digital;
|
||||
};
|
||||
|
||||
user_buttons_s0: user_buttons_s0 {
|
||||
pins = "B12", "B13", "B14";
|
||||
microchip,digital;
|
||||
input-enable;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
pinctrl_uart2: pinctrl_uart2 {
|
||||
uart2-tx {
|
||||
pins = "G9";
|
||||
function = "U2TX";
|
||||
microchip,digital;
|
||||
output-high;
|
||||
};
|
||||
uart2-rx {
|
||||
pins = "B0";
|
||||
function = "U2RX";
|
||||
microchip,digital;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_uart4: uart4-0 {
|
||||
uart4-tx {
|
||||
pins = "C3";
|
||||
function = "U4TX";
|
||||
microchip,digital;
|
||||
output-high;
|
||||
};
|
||||
uart4-rx {
|
||||
pins = "E8";
|
||||
function = "U4RX";
|
||||
microchip,digital;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -32,4 +32,20 @@ config PIC32MZDA
|
|||
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "Devicetree selection"
|
||||
default DTB_PIC32_NONE
|
||||
help
|
||||
Select the devicetree.
|
||||
|
||||
config DTB_PIC32_NONE
|
||||
bool "None"
|
||||
|
||||
config DTB_PIC32_MZDA_SK
|
||||
bool "PIC32MZDA Starter Kit"
|
||||
depends on PIC32MZDA
|
||||
select BUILTIN_DTB
|
||||
|
||||
endchoice
|
||||
|
||||
endif # MACH_PIC32
|
||||
|
|
|
|||
Loading…
Reference in New Issue