mirror of https://gitee.com/openkylin/linux.git
Staging: comedi: fix space coding style issue in adl_pci9111.c
This is a patch to the adl_pci9111.c file that fixes up multiple please, no space for starting a line warnings, found by the checkpatch.pl tool Signed-off-by: Maurice Dawson <mauricedawson2699@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -1,26 +1,26 @@
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/*
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comedi/drivers/adl_pci9111.c
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comedi/drivers/adl_pci9111.c
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Hardware driver for PCI9111 ADLink cards:
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Hardware driver for PCI9111 ADLink cards:
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PCI-9111HR
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PCI-9111HR
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Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
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Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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@ -32,46 +32,46 @@ Status: experimental
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Supports:
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- ai_insn read
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- ao_insn read/write
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- di_insn read
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- do_insn read/write
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- ai_do_cmd mode with the following sources:
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- ai_insn read
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- ao_insn read/write
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- di_insn read
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- do_insn read/write
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- ai_do_cmd mode with the following sources:
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- start_src TRIG_NOW
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- scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT
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- convert_src TRIG_TIMER TRIG_EXT
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- scan_end_src TRIG_COUNT
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- stop_src TRIG_COUNT TRIG_NONE
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- start_src TRIG_NOW
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- scan_begin_src TRIG_FOLLOW TRIG_TIMER TRIG_EXT
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- convert_src TRIG_TIMER TRIG_EXT
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- scan_end_src TRIG_COUNT
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- stop_src TRIG_COUNT TRIG_NONE
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The scanned channels must be consecutive and start from 0. They must
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all have the same range and aref.
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The scanned channels must be consecutive and start from 0. They must
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all have the same range and aref.
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Configuration options:
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[0] - PCI bus number (optional)
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[1] - PCI slot number (optional)
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[0] - PCI bus number (optional)
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[1] - PCI slot number (optional)
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If bus/slot is not specified, the first available PCI
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device will be used.
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If bus/slot is not specified, the first available PCI
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device will be used.
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*/
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/*
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CHANGELOG:
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2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
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a multiple of chanlist_len*convert_arg.
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2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
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2002/02/18 Added external trigger support for analog input.
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2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
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a multiple of chanlist_len*convert_arg.
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2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
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2002/02/18 Added external trigger support for analog input.
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TODO:
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- Really test implemented functionality.
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- Add support for the PCI-9111DG with a probe routine to identify the card
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type (perhaps with the help of the channel number readback of the A/D Data
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register).
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- Add external multiplexer support.
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- Really test implemented functionality.
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- Add support for the PCI-9111DG with a probe routine to identify
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the card type (perhaps with the help of the channel number readback
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of the A/D Data register).
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- Add external multiplexer support.
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*/
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@ -187,95 +187,98 @@ Configuration options:
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*/
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#define pci9111_trigger_and_autoscan_get() \
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(inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
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(inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK)&0x0F)
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#define pci9111_trigger_and_autoscan_set(flags) \
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outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
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outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_TRIGGER_MODE_CONTROL)
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#define pci9111_interrupt_and_fifo_get() \
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((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) >> 4) \
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&0x03)
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#define pci9111_interrupt_and_fifo_get() \
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((inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_MODE_INTERRUPT_READBACK) \
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>> 4) & 0x03)
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#define pci9111_interrupt_and_fifo_set(flags) \
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outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL)
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outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL)
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#define pci9111_interrupt_clear() \
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outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR)
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outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CLEAR)
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#define pci9111_software_trigger() \
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outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER)
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outb(0, PCI9111_IO_BASE+PCI9111_REGISTER_SOFTWARE_TRIGGER)
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#define pci9111_fifo_reset() do { \
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outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
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PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
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outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
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PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
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outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
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PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
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} while (0)
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#define pci9111_fifo_reset() do { \
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outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
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PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
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outb(PCI9111_FFEN_SET_FIFO_DISABLE, \
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PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
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outb(PCI9111_FFEN_SET_FIFO_ENABLE, \
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PCI9111_IO_BASE+PCI9111_REGISTER_INTERRUPT_CONTROL); \
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} while (0)
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#define pci9111_is_fifo_full() \
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((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
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PCI9111_FIFO_FULL_MASK) == 0)
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((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
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PCI9111_FIFO_FULL_MASK) == 0)
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#define pci9111_is_fifo_half_full() \
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((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
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PCI9111_FIFO_HALF_FULL_MASK) == 0)
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((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
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PCI9111_FIFO_HALF_FULL_MASK) == 0)
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#define pci9111_is_fifo_empty() \
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((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
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PCI9111_FIFO_EMPTY_MASK) == 0)
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((inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK)& \
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PCI9111_FIFO_EMPTY_MASK) == 0)
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#define pci9111_ai_channel_set(channel) \
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outb((channel)&PCI9111_CHANNEL_MASK, \
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PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL)
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#define pci9111_ai_channel_set(channel) \
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outb((channel)&PCI9111_CHANNEL_MASK, \
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PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_CONTROL)
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#define pci9111_ai_channel_get() \
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(inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK) \
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&PCI9111_CHANNEL_MASK)
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#define pci9111_ai_channel_get() \
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(inb(PCI9111_IO_BASE+PCI9111_REGISTER_AD_CHANNEL_READBACK) \
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&PCI9111_CHANNEL_MASK)
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#define pci9111_ai_range_set(range) \
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outb((range)&PCI9111_RANGE_MASK, \
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PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE)
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#define pci9111_ai_range_set(range) \
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outb((range)&PCI9111_RANGE_MASK, \
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PCI9111_IO_BASE+PCI9111_REGISTER_INPUT_SIGNAL_RANGE)
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#define pci9111_ai_range_get() \
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(inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK) \
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&PCI9111_RANGE_MASK)
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#define pci9111_ai_range_get() \
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(inb(PCI9111_IO_BASE+PCI9111_REGISTER_RANGE_STATUS_READBACK) \
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&PCI9111_RANGE_MASK)
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#define pci9111_ai_get_data() \
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(((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4) \
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&PCI9111_AI_RESOLUTION_MASK) \
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^ PCI9111_AI_RESOLUTION_2_CMP_BIT)
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#define pci9111_ai_get_data() \
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(((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE)>>4) \
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&PCI9111_AI_RESOLUTION_MASK) \
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^ PCI9111_AI_RESOLUTION_2_CMP_BIT)
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#define pci9111_hr_ai_get_data() \
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((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) \
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& PCI9111_HR_AI_RESOLUTION_MASK) \
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^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT)
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#define pci9111_hr_ai_get_data() \
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((inw(PCI9111_IO_BASE+PCI9111_REGISTER_AD_FIFO_VALUE) \
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&PCI9111_HR_AI_RESOLUTION_MASK) \
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^ PCI9111_HR_AI_RESOLUTION_2_CMP_BIT)
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#define pci9111_ao_set_data(data) \
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outw(data&PCI9111_AO_RESOLUTION_MASK, \
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PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT)
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#define pci9111_ao_set_data(data) \
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outw(data&PCI9111_AO_RESOLUTION_MASK, \
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PCI9111_IO_BASE+PCI9111_REGISTER_DA_OUTPUT)
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#define pci9111_di_get_bits() \
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inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
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inw(PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
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#define pci9111_do_set_bits(bits) \
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outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
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outw(bits, PCI9111_IO_BASE+PCI9111_REGISTER_DIGITAL_IO)
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#define pci9111_8254_control_set(flags) \
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outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL)
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outb(flags, PCI9111_IO_BASE+PCI9111_REGISTER_8254_CONTROL)
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#define pci9111_8254_counter_0_set(data) \
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outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
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outb((data >> 8) & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0)
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outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0); \
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outb((data >> 8) & 0xFF, \
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PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_0)
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#define pci9111_8254_counter_1_set(data) \
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outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
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outb((data >> 8) & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1)
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outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1); \
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outb((data >> 8) & 0xFF, \
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PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_1)
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#define pci9111_8254_counter_2_set(data) \
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outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
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outb((data >> 8) & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2)
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outb(data & 0xFF, PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2); \
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outb((data >> 8) & 0xFF, \
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PCI9111_IO_BASE+PCI9111_REGISTER_8254_COUNTER_2)
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/* Function prototypes */
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@ -342,7 +345,7 @@ static const struct pci9111_board pci9111_boards[] = {
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};
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#define pci9111_board_nbr \
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(sizeof(pci9111_boards)/sizeof(struct pci9111_board))
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(sizeof(pci9111_boards)/sizeof(struct pci9111_board))
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static struct comedi_driver pci9111_driver = {
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.driver_name = PCI9111_DRIVER_NAME,
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