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Merge tag 'tegra-cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/cleanups 

Minor fixes that weren't urgent enough to go into 3.3. The two paz00
patches are in mainline already but got merged after the branch point
for this branch, so they're duplicated. I also ended up merging in
rmk/for-armsoc into this later on to fix a bug introduced by it, so it's
included but it's not the base of this branch.

* tag 'tegra-cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
  ARM: tegra: Enable CPUIdle on Tegra20
  ARM: tegra: export usb phy symbols
  ARM: tegra: build localtimer support only when needed
  ARM: tegra: select CPU_FREQ_TABLE
  ARM: tegra: select required CPU and L2 errata options
  ARM: tegra: paz00: fix wrong UART port on mini-pcie plug
  ARM: tegra: paz00: fix wrong SD1 power gpio

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2012-03-04 20:48:42 +00:00
parent 61b80086a5 f6a1ba6736
commit 849ad9d819
7 changed files with 35 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/boot/dts/tegra-paz00.dts
View File

@ -46,11 +46,11 @@ serial@70006040 {
};
serial@70006200 {
status = "disable";
clock-frequency = <216000000>;
};
serial@70006300 {
clock-frequency = <216000000>;
status = "disable";
};
serial@70006400 {
@ -60,7 +60,7 @@ serial@70006400 {
sdhci@c8000000 {
cd-gpios = <&gpio 173 0>; /* gpio PV5 */
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
power-gpios = <&gpio 155 0>; /* gpio PT3 */
power-gpios = <&gpio 169 0>; /* gpio PV1 */
};
sdhci@c8000200 {

14
arch/arm/mach-tegra/Kconfig
View File

@ -10,6 +10,14 @@ config ARCH_TEGRA_2x_SOC
select USB_ARCH_HAS_EHCI if USB_SUPPORT
select USB_ULPI if USB_SUPPORT
select USB_ULPI_VIEWPORT if USB_SUPPORT
select ARM_ERRATA_720789
select ARM_ERRATA_742230
select ARM_ERRATA_751472
select ARM_ERRATA_754327
select ARM_ERRATA_764369
select PL310_ERRATA_727915 if CACHE_L2X0
select PL310_ERRATA_769419 if CACHE_L2X0
select CPU_FREQ_TABLE if CPU_FREQ
help
Support for NVIDIA Tegra AP20 and T20 processors, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@ -23,6 +31,12 @@ config ARCH_TEGRA_3x_SOC
select USB_ULPI if USB_SUPPORT
select USB_ULPI_VIEWPORT if USB_SUPPORT
select USE_OF
select ARM_ERRATA_743622
select ARM_ERRATA_751472
select ARM_ERRATA_754322
select ARM_ERRATA_764369
select PL310_ERRATA_769419 if CACHE_L2X0
select CPU_FREQ_TABLE if CPU_FREQ
help
Support for NVIDIA Tegra T30 processor family, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

3
arch/arm/mach-tegra/Makefile
View File

@ -13,7 +13,8 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o
obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-tegra20-tables.o
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pinmux-tegra30-tables.o
obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o
obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o
obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o

8
arch/arm/mach-tegra/board-paz00.c
View File

@ -60,9 +60,9 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
.uartclk = 216000000,
}, {
/* serial port on mini-pcie */
.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
.mapbase = TEGRA_UARTD_BASE,
.irq = INT_UARTD,
.membase = IO_ADDRESS(TEGRA_UARTC_BASE),
.mapbase = TEGRA_UARTC_BASE,
.irq = INT_UARTC,
.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
.type = PORT_TEGRA,
.iotype = UPIO_MEM,
@ -174,7 +174,7 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline,
static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
/* name parent rate enabled */
{ "uarta", "pll_p", 216000000, true },
{ "uartd", "pll_p", 216000000, true },
{ "uartc", "pll_p", 216000000, true },
{ "pll_p_out4", "pll_p", 24000000, true },
{ "usbd", "clk_m", 12000000, false },

2
arch/arm/mach-tegra/board-paz00.h
View File

@ -22,7 +22,7 @@
/* SDCARD */
#define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5
#define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1
#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3
#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PV1
/* ULPI */
#define TEGRA_ULPI_RST TEGRA_GPIO_PV0

2
arch/arm/mach-tegra/common.c
View File

@ -95,8 +95,6 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
void __init tegra20_init_early(void)
{
disable_hlt(); /* idle WFI usage needs to be confirmed */
tegra_init_fuse();
tegra2_init_clocks();
tegra_clk_init_from_table(tegra20_clk_init_table);

11
arch/arm/mach-tegra/usb_phy.c
View File

@ -22,6 +22,7 @@
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio.h>
@ -730,6 +731,7 @@ struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs,
kfree(phy);
return ERR_PTR(err);
}
EXPORT_SYMBOL_GPL(tegra_usb_phy_open);
int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
{
@ -738,6 +740,7 @@ int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
else
return utmi_phy_power_on(phy);
}
EXPORT_SYMBOL_GPL(tegra_usb_phy_power_on);
void tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
{
@ -746,18 +749,21 @@ void tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
else
utmi_phy_power_off(phy);
}
EXPORT_SYMBOL_GPL(tegra_usb_phy_power_off);
void tegra_usb_phy_preresume(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_preresume(phy);
}
EXPORT_SYMBOL_GPL(tegra_usb_phy_preresume);
void tegra_usb_phy_postresume(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_postresume(phy);
}
EXPORT_SYMBOL_GPL(tegra_usb_phy_postresume);
void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
enum tegra_usb_phy_port_speed port_speed)
@ -765,24 +771,28 @@ void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy,
if (!phy_is_ulpi(phy))
utmi_phy_restore_start(phy, port_speed);
}
EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_start);
void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_restore_end(phy);
}
EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_end);
void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_clk_disable(phy);
}
EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_disable);
void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy)
{
if (!phy_is_ulpi(phy))
utmi_phy_clk_enable(phy);
}
EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_enable);
void tegra_usb_phy_close(struct tegra_usb_phy *phy)
{
@ -794,3 +804,4 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy)
clk_put(phy->pll_u);
kfree(phy);
}
EXPORT_SYMBOL_GPL(tegra_usb_phy_close);