mirror of https://gitee.com/openkylin/linux.git
drm/amd/display: Add monitor patch for AUO dpcd issue
[Why] dpcd cap mismatch in 2200 vs base [How] Add monitor patch which using based caps to overwrite 2200 Signed-off-by: Lewis Huang <Lewis.Huang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -3371,3 +3371,10 @@ const struct dc_link_settings *dc_link_get_link_cap(
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return &link->preferred_link_setting;
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return &link->preferred_link_setting;
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return &link->verified_link_cap;
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return &link->verified_link_cap;
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}
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}
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void dc_link_overwrite_extended_receiver_cap(
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struct dc_link *link)
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{
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dp_overwrite_extended_receiver_cap(link);
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}
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@ -3446,6 +3446,68 @@ static bool retrieve_link_cap(struct dc_link *link)
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return true;
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return true;
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}
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}
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bool dp_overwrite_extended_receiver_cap(struct dc_link *link)
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{
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uint8_t dpcd_data[16];
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uint32_t read_dpcd_retry_cnt = 3;
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enum dc_status status = DC_ERROR_UNEXPECTED;
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union dp_downstream_port_present ds_port = { 0 };
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union down_stream_port_count down_strm_port_count;
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union edp_configuration_cap edp_config_cap;
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int i;
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for (i = 0; i < read_dpcd_retry_cnt; i++) {
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status = core_link_read_dpcd(
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link,
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DP_DPCD_REV,
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dpcd_data,
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sizeof(dpcd_data));
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if (status == DC_OK)
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break;
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}
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link->dpcd_caps.dpcd_rev.raw =
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dpcd_data[DP_DPCD_REV - DP_DPCD_REV];
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if (dpcd_data[DP_MAX_LANE_COUNT - DP_DPCD_REV] == 0)
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return false;
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ds_port.byte = dpcd_data[DP_DOWNSTREAMPORT_PRESENT -
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DP_DPCD_REV];
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get_active_converter_info(ds_port.byte, link);
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down_strm_port_count.raw = dpcd_data[DP_DOWN_STREAM_PORT_COUNT -
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DP_DPCD_REV];
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link->dpcd_caps.allow_invalid_MSA_timing_param =
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down_strm_port_count.bits.IGNORE_MSA_TIMING_PARAM;
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link->dpcd_caps.max_ln_count.raw = dpcd_data[
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DP_MAX_LANE_COUNT - DP_DPCD_REV];
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link->dpcd_caps.max_down_spread.raw = dpcd_data[
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DP_MAX_DOWNSPREAD - DP_DPCD_REV];
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link->reported_link_cap.lane_count =
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link->dpcd_caps.max_ln_count.bits.MAX_LANE_COUNT;
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link->reported_link_cap.link_rate = dpcd_data[
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DP_MAX_LINK_RATE - DP_DPCD_REV];
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link->reported_link_cap.link_spread =
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link->dpcd_caps.max_down_spread.bits.MAX_DOWN_SPREAD ?
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LINK_SPREAD_05_DOWNSPREAD_30KHZ : LINK_SPREAD_DISABLED;
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edp_config_cap.raw = dpcd_data[
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DP_EDP_CONFIGURATION_CAP - DP_DPCD_REV];
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link->dpcd_caps.panel_mode_edp =
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edp_config_cap.bits.ALT_SCRAMBLER_RESET;
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link->dpcd_caps.dpcd_display_control_capable =
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edp_config_cap.bits.DPCD_DISPLAY_CONTROL_CAPABLE;
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return true;
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}
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bool detect_dp_sink_caps(struct dc_link *link)
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bool detect_dp_sink_caps(struct dc_link *link)
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{
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{
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return retrieve_link_cap(link);
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return retrieve_link_cap(link);
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@ -301,6 +301,9 @@ uint32_t dc_link_bandwidth_kbps(
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const struct dc_link_settings *dc_link_get_link_cap(
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const struct dc_link_settings *dc_link_get_link_cap(
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const struct dc_link *link);
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const struct dc_link *link);
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void dc_link_overwrite_extended_receiver_cap(
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struct dc_link *link);
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bool dc_submit_i2c(
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bool dc_submit_i2c(
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struct dc *dc,
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struct dc *dc,
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uint32_t link_index,
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uint32_t link_index,
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@ -76,6 +76,8 @@ void dp_enable_mst_on_sink(struct dc_link *link, bool enable);
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enum dp_panel_mode dp_get_panel_mode(struct dc_link *link);
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enum dp_panel_mode dp_get_panel_mode(struct dc_link *link);
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void dp_set_panel_mode(struct dc_link *link, enum dp_panel_mode panel_mode);
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void dp_set_panel_mode(struct dc_link *link, enum dp_panel_mode panel_mode);
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bool dp_overwrite_extended_receiver_cap(struct dc_link *link);
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void dp_set_fec_ready(struct dc_link *link, bool ready);
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void dp_set_fec_ready(struct dc_link *link, bool ready);
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void dp_set_fec_enable(struct dc_link *link, bool enable);
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void dp_set_fec_enable(struct dc_link *link, bool enable);
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bool dp_set_dsc_enable(struct pipe_ctx *pipe_ctx, bool enable);
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bool dp_set_dsc_enable(struct pipe_ctx *pipe_ctx, bool enable);
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