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ARM: shmobile: r8a7790 SoC 64-bit DT support 

The r8a7790 SoC supports LPAE and has memory window up to
0x2ffffffff. Convert to 64-bit addresses by enlarging
#addr-cells and #size-cells to 2.

Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Takashi Yoshii 2013-03-29 16:49:17 +09:00 committed by Simon Horman
parent 26a0d2d47f
commit 8585deb185
1 changed files with 7 additions and 7 deletions
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14
arch/arm/boot/dts/r8a7790.dtsi
View File

@ -8,11 +8,11 @@
* kind, whether express or implied.
*/
/include/ "skeleton.dtsi"
/ {
compatible = "renesas,r8a7790";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
@ -31,10 +31,10 @@ gic: interrupt-controller@f1001000 {
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0xf1001000 0x1000>,
<0xf1002000 0x1000>,
<0xf1004000 0x2000>,
<0xf1006000 0x2000>;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x1000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <1 9 0xf04>;
gic-cpuif@4 {
@ -56,7 +56,7 @@ irqc0: interrupt-controller@e61c0000 {
compatible = "renesas,irqc";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0xe61c0000 0x200>;
reg = <0 0xe61c0000 0 0x200>;
interrupt-parent = <&gic>;
interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
};