mirror of https://gitee.com/openkylin/linux.git
serial: 8250_dw: Fix clk-notifier/port suspend deadlock
It has been discovered that there is a potential deadlock between
the clock-change-notifier thread and the UART port suspending one:
CPU0 (suspend CPU/UART) CPU1 (update clock)
---- ----
lock(&port->mutex);
lock((work_completion)(&data->clk_work));
lock(&port->mutex);
lock((work_completion)(&data->clk_work));
*** DEADLOCK ***
The best way to fix this is to eliminate the CPU0
port->mutex/work-completion scenario. So we suggest to register and
unregister the clock-notifier during the DW APB UART port probe/remove
procedures, instead of doing that at the points of the port
startup/shutdown.
Link: https://lore.kernel.org/linux-serial/f1cd5c75-9cda-6896-a4e2-42c5bfc3f5c3@redhat.com
Fixes: cc816969d7
("serial: 8250_dw: Fix common clocks usage race condition")
Reported-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20200923161950.6237-4-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
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@ -373,39 +373,6 @@ static void dw8250_set_ldisc(struct uart_port *p, struct ktermios *termios)
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serial8250_do_set_ldisc(p, termios);
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serial8250_do_set_ldisc(p, termios);
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}
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}
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static int dw8250_startup(struct uart_port *p)
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{
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struct dw8250_data *d = to_dw8250_data(p->private_data);
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int ret;
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/*
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* Some platforms may provide a reference clock shared between several
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* devices. In this case before using the serial port first we have to
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* make sure that any clock state change is known to the UART port at
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* least post factum.
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*/
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if (d->clk) {
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ret = clk_notifier_register(d->clk, &d->clk_notifier);
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if (ret)
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dev_warn(p->dev, "Failed to set the clock notifier\n");
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}
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return serial8250_do_startup(p);
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}
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static void dw8250_shutdown(struct uart_port *p)
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{
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struct dw8250_data *d = to_dw8250_data(p->private_data);
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serial8250_do_shutdown(p);
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if (d->clk) {
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clk_notifier_unregister(d->clk, &d->clk_notifier);
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flush_work(&d->clk_work);
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}
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}
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/*
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/*
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* dw8250_fallback_dma_filter will prevent the UART from getting just any free
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* dw8250_fallback_dma_filter will prevent the UART from getting just any free
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* channel on platforms that have DMA engines, but don't have any channels
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* channel on platforms that have DMA engines, but don't have any channels
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@ -501,8 +468,6 @@ static int dw8250_probe(struct platform_device *pdev)
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p->serial_out = dw8250_serial_out;
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p->serial_out = dw8250_serial_out;
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p->set_ldisc = dw8250_set_ldisc;
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p->set_ldisc = dw8250_set_ldisc;
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p->set_termios = dw8250_set_termios;
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p->set_termios = dw8250_set_termios;
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p->startup = dw8250_startup;
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p->shutdown = dw8250_shutdown;
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p->membase = devm_ioremap(dev, regs->start, resource_size(regs));
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p->membase = devm_ioremap(dev, regs->start, resource_size(regs));
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if (!p->membase)
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if (!p->membase)
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@ -622,6 +587,19 @@ static int dw8250_probe(struct platform_device *pdev)
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goto err_reset;
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goto err_reset;
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}
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}
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/*
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* Some platforms may provide a reference clock shared between several
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* devices. In this case any clock state change must be known to the
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* UART port at least post factum.
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*/
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if (data->clk) {
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err = clk_notifier_register(data->clk, &data->clk_notifier);
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if (err)
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dev_warn(p->dev, "Failed to set the clock notifier\n");
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else
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queue_work(system_unbound_wq, &data->clk_work);
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}
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platform_set_drvdata(pdev, data);
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platform_set_drvdata(pdev, data);
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pm_runtime_set_active(dev);
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pm_runtime_set_active(dev);
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@ -648,6 +626,12 @@ static int dw8250_remove(struct platform_device *pdev)
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pm_runtime_get_sync(dev);
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pm_runtime_get_sync(dev);
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if (data->clk) {
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clk_notifier_unregister(data->clk, &data->clk_notifier);
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flush_work(&data->clk_work);
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}
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serial8250_unregister_port(data->data.line);
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serial8250_unregister_port(data->data.line);
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reset_control_assert(data->rst);
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reset_control_assert(data->rst);
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