mirror of https://gitee.com/openkylin/linux.git
Merge branch 'topic/hda' into for-next
This commit is contained in:
commit
85abf3ec5f
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@ -74,6 +74,7 @@ struct hdac_device {
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/* misc flags */
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atomic_t in_pm; /* suspend/resume being performed */
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bool link_power_control:1;
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/* sysfs */
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struct hdac_widget_tree *widgets;
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@ -184,6 +185,8 @@ struct hdac_bus_ops {
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/* get a response from the last command */
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int (*get_response)(struct hdac_bus *bus, unsigned int addr,
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unsigned int *res);
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/* control the link power */
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int (*link_power)(struct hdac_bus *bus, bool enable);
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};
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/*
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@ -311,6 +314,7 @@ static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
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int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
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int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
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unsigned int *res);
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int snd_hdac_link_power(struct hdac_device *codec, bool enable);
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bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
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void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
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@ -552,6 +552,21 @@ void snd_hdac_power_down_pm(struct hdac_device *codec)
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EXPORT_SYMBOL_GPL(snd_hdac_power_down_pm);
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#endif
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/*
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* Enable/disable the link power for a codec.
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*/
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int snd_hdac_link_power(struct hdac_device *codec, bool enable)
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{
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if (!codec->link_power_control)
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return 0;
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if (codec->bus->ops->link_power)
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return codec->bus->ops->link_power(codec->bus, enable);
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else
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return -EINVAL;
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}
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EXPORT_SYMBOL_GPL(snd_hdac_link_power);
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/* codec vendor labels */
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struct hda_vendor_id {
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unsigned int id;
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@ -858,6 +858,7 @@ void snd_hda_codec_register(struct hda_codec *codec)
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return;
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if (device_is_registered(hda_codec_dev(codec))) {
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snd_hda_register_beep_device(codec);
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snd_hdac_link_power(&codec->core, true);
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pm_runtime_enable(hda_codec_dev(codec));
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/* it was powered up in snd_hda_codec_new(), now all done */
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snd_hda_power_down(codec);
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@ -884,6 +885,7 @@ static int snd_hda_codec_dev_free(struct snd_device *device)
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struct hda_codec *codec = device->device_data;
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codec->in_freeing = 1;
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snd_hdac_link_power(&codec->core, false);
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snd_hdac_device_unregister(&codec->core);
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put_device(hda_codec_dev(codec));
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return 0;
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@ -3106,6 +3108,7 @@ static int hda_codec_runtime_suspend(struct device *dev)
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if (codec_has_clkstop(codec) && codec_has_epss(codec) &&
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(state & AC_PWRST_CLK_STOP_OK))
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snd_hdac_codec_link_down(&codec->core);
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snd_hdac_link_power(&codec->core, false);
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return 0;
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}
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@ -3113,6 +3116,7 @@ static int hda_codec_runtime_resume(struct device *dev)
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{
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struct hda_codec *codec = dev_to_hda_codec(dev);
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snd_hdac_link_power(&codec->core, true);
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snd_hdac_codec_link_up(&codec->core);
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hda_call_codec_resume(codec);
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pm_runtime_mark_last_busy(dev);
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@ -775,9 +775,20 @@ static int azx_get_response(struct hdac_bus *bus, unsigned int addr,
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return azx_rirb_get_response(bus, addr, res);
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}
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static int azx_link_power(struct hdac_bus *bus, bool enable)
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{
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struct azx *chip = bus_to_azx(bus);
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if (chip->ops->link_power)
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return chip->ops->link_power(chip, enable);
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else
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return -EINVAL;
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}
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static const struct hdac_bus_ops bus_core_ops = {
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.command = azx_send_cmd,
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.get_response = azx_get_response,
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.link_power = azx_link_power,
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};
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#ifdef CONFIG_SND_HDA_DSP_LOADER
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@ -89,6 +89,8 @@ struct hda_controller_ops {
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struct vm_area_struct *area);
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/* Check if current position is acceptable */
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int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
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/* enable/disable the link power */
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int (*link_power)(struct azx *chip, bool enable);
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};
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struct azx_pcm {
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@ -42,10 +42,15 @@ int hda_display_power(struct hda_intel *hda, bool enable)
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dev_dbg(&hda->chip.pci->dev, "display power %s\n",
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enable ? "enable" : "disable");
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if (enable)
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acomp->ops->get_power(acomp->dev);
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else
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acomp->ops->put_power(acomp->dev);
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if (enable) {
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if (!hda->i915_power_refcount++)
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acomp->ops->get_power(acomp->dev);
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} else {
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WARN_ON(!hda->i915_power_refcount);
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if (!--hda->i915_power_refcount)
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acomp->ops->put_power(acomp->dev);
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}
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return 0;
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}
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@ -189,6 +194,11 @@ int hda_i915_init(struct hda_intel *hda)
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int hda_i915_exit(struct hda_intel *hda)
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{
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struct device *dev = &hda->chip.pci->dev;
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struct i915_audio_component *acomp = &hda->audio_component;
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WARN_ON(hda->i915_power_refcount);
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if (hda->i915_power_refcount > 0 && acomp->ops)
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acomp->ops->put_power(acomp->dev);
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component_master_del(dev, &hda_component_master_ops);
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@ -543,6 +543,14 @@ static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
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return 0;
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}
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/* Enable/disable i915 display power for the link */
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static int azx_intel_link_power(struct azx *chip, bool enable)
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{
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struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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return hda_display_power(hda, enable);
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}
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/*
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* Check whether the current DMA position is acceptable for updating
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* periods. Returns non-zero if it's OK.
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@ -809,7 +817,8 @@ static int azx_suspend(struct device *dev)
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if (chip->msi)
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pci_disable_msi(chip->pci);
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
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&& hda->need_i915_power)
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hda_display_power(hda, false);
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return 0;
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}
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@ -829,7 +838,8 @@ static int azx_resume(struct device *dev)
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if (chip->disabled || hda->init_failed)
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return 0;
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
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&& hda->need_i915_power) {
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hda_display_power(hda, true);
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haswell_set_bclk(hda);
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}
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@ -872,7 +882,8 @@ static int azx_runtime_suspend(struct device *dev)
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azx_stop_chip(chip);
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azx_enter_link_reset(chip);
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azx_clear_irq_pending(chip);
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
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&& hda->need_i915_power)
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hda_display_power(hda, false);
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return 0;
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@ -897,7 +908,8 @@ static int azx_runtime_resume(struct device *dev)
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if (!azx_has_pm_runtime(chip))
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return 0;
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
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&& hda->need_i915_power) {
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hda_display_power(hda, true);
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haswell_set_bclk(hda);
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}
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@ -1118,7 +1130,8 @@ static int azx_free(struct azx *chip)
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release_firmware(chip->fw);
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#endif
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
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hda_display_power(hda, false);
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if (hda->need_i915_power)
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hda_display_power(hda, false);
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hda_i915_exit(hda);
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}
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kfree(hda);
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@ -1789,6 +1802,7 @@ static const struct hda_controller_ops pci_hda_ops = {
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.substream_free_pages = substream_free_pages,
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.pcm_mmap_prepare = pcm_mmap_prepare,
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.position_check = azx_position_check,
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.link_power = azx_intel_link_power,
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};
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static int azx_probe(struct pci_dev *pci,
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@ -1882,17 +1896,28 @@ static int azx_probe_continue(struct azx *chip)
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int err;
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hda->probe_continued = 1;
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/* Request power well for Haswell HDA controller and codec */
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/* Request display power well for the HDA controller or codec. For
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* Haswell/Broadwell, both the display HDA controller and codec need
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* this power. For other platforms, like Baytrail/Braswell, only the
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* display codec needs the power and it can be released after probe.
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*/
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
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/* Baytral/Braswell controllers don't need this power */
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if (pci->device != 0x0f04 && pci->device != 0x2284)
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hda->need_i915_power = 1;
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#ifdef CONFIG_SND_HDA_I915
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err = hda_i915_init(hda);
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if (err < 0)
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goto out_free;
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goto i915_power_fail;
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err = hda_display_power(hda, true);
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if (err < 0) {
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dev_err(chip->card->dev,
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"Cannot turn on display power on i915\n");
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goto out_free;
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goto i915_power_fail;
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}
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#endif
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}
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@ -1939,6 +1964,11 @@ static int azx_probe_continue(struct azx *chip)
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pm_runtime_put_noidle(&pci->dev);
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out_free:
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if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
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&& !hda->need_i915_power)
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hda_display_power(hda, false);
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i915_power_fail:
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if (err < 0)
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hda->init_failed = 1;
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complete_all(&hda->probe_wait);
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@ -45,7 +45,9 @@ struct hda_intel {
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struct dev_pm_domain hdmi_pm_domain;
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/* i915 component interface */
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bool need_i915_power:1; /* the hda controller needs i915 power */
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struct i915_audio_component audio_component;
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int i915_power_refcount;
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};
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#ifdef CONFIG_SND_HDA_I915
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@ -2335,6 +2335,15 @@ static int patch_generic_hdmi(struct hda_codec *codec)
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intel_haswell_fixup_enable_dp12(codec);
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}
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/* For Valleyview/Cherryview, only the display codec is in the display
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* power well and can use link_power ops to request/release the power.
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* For Haswell/Broadwell, the controller is also in the power well and
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* can cover the codec power request, and so need not set this flag.
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* For previous platforms, there is no such power well feature.
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*/
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if (is_valleyview_plus(codec))
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codec->core.link_power_control = 1;
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if (is_haswell_plus(codec) || is_valleyview_plus(codec))
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codec->depop_delay = 0;
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