mirror of https://gitee.com/openkylin/linux.git
[TG3]: Minor 5752 fixes
Some minor 5752 fixes mostly for correctness and add 5752 PHY ID. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1094,7 +1094,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
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CLOCK_CTRL_ALTCLK |
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CLOCK_CTRL_PWRDOWN_PLL133);
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udelay(40);
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} else if (!((GET_ASIC_REV(tp->pci_chip_rev_id) == 5750) &&
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} else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
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(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) {
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u32 newbits1, newbits2;
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@ -5237,8 +5237,11 @@ static int tg3_reset_hw(struct tg3 *tp)
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RDMAC_MODE_LNGREAD_ENAB);
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if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE)
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rdmac_mode |= RDMAC_MODE_SPLIT_ENABLE;
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if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
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tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) {
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/* If statement applies to 5705 and 5750 PCI devices only */
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
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tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) ||
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(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)) {
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if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE &&
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(tp->pci_chip_rev_id == CHIPREV_ID_5705_A1 ||
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tp->pci_chip_rev_id == CHIPREV_ID_5705_A2)) {
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@ -5249,6 +5252,9 @@ static int tg3_reset_hw(struct tg3 *tp)
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}
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}
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if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)
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rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST;
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#if TG3_TSO_SUPPORT != 0
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if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
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rdmac_mode |= (1 << 27);
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@ -5351,8 +5357,10 @@ static int tg3_reset_hw(struct tg3 *tp)
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WDMAC_MODE_FIFOURUN_ENAB | WDMAC_MODE_FIFOOREAD_ENAB |
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WDMAC_MODE_LNGREAD_ENAB);
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if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
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tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) {
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/* If statement applies to 5705 and 5750 PCI devices only */
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
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tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) {
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if ((tp->tg3_flags & TG3_FLG2_TSO_CAPABLE) &&
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(tp->pci_chip_rev_id == CHIPREV_ID_5705_A1 ||
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tp->pci_chip_rev_id == CHIPREV_ID_5705_A2)) {
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@ -7025,7 +7033,7 @@ static void __devinit tg3_get_nvram_info(struct tg3 *tp)
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tw32(NVRAM_CFG1, nvcfg1);
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}
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) {
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switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) {
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case FLASH_VENDOR_ATMEL_FLASH_BUFFERED:
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tp->nvram_jedecnum = JEDEC_ATMEL;
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@ -8462,7 +8470,8 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
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/* DMA read watermark not used on PCIE */
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tp->dma_rwctrl |= 0x00180000;
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} else if (!(tp->tg3_flags & TG3_FLAG_PCIX_MODE)) {
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if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)
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tp->dma_rwctrl |= 0x003f0000;
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else
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tp->dma_rwctrl |= 0x003f000f;
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@ -8628,6 +8637,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
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case PHY_ID_BCM5704: return "5704";
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case PHY_ID_BCM5705: return "5705";
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case PHY_ID_BCM5750: return "5750";
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case PHY_ID_BCM5752: return "5752";
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case PHY_ID_BCM8002: return "8002/serdes";
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case 0: return "serdes";
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default: return "unknown";
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@ -2150,6 +2150,7 @@ struct tg3 {
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#define PHY_ID_BCM5704 0x60008190
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#define PHY_ID_BCM5705 0x600081a0
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#define PHY_ID_BCM5750 0x60008180
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#define PHY_ID_BCM5752 0x60008100
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#define PHY_ID_BCM8002 0x60010140
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#define PHY_ID_INVALID 0xffffffff
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#define PHY_ID_REV_MASK 0x0000000f
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