mirror of https://gitee.com/openkylin/linux.git
drm/amd/pp: Remove duplicate code in vega12_hwmgr.c
use smu_helper function smu_set_watermarks_for_clocks_ranges in vega12_set_watermarks_for_clocks_ranges. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1786,52 +1786,11 @@ static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
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struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
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Watermarks_t *table = &(data->smc_state_table.water_marks_table);
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struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges;
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uint32_t i;
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if (!data->registry_data.disable_water_mark &&
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data->smu_features[GNLD_DPM_DCEFCLK].supported &&
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data->smu_features[GNLD_DPM_SOCCLK].supported) {
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for (i = 0; i < wm_with_clock_ranges->num_wm_sets_dmif; i++) {
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table->WatermarkRow[WM_DCEFCLK][i].MinClock =
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cpu_to_le16((uint16_t)
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(wm_with_clock_ranges->wm_sets_dmif[i].wm_min_dcefclk_in_khz) /
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100);
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table->WatermarkRow[WM_DCEFCLK][i].MaxClock =
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cpu_to_le16((uint16_t)
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(wm_with_clock_ranges->wm_sets_dmif[i].wm_max_dcefclk_in_khz) /
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100);
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table->WatermarkRow[WM_DCEFCLK][i].MinUclk =
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cpu_to_le16((uint16_t)
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(wm_with_clock_ranges->wm_sets_dmif[i].wm_min_memclk_in_khz) /
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100);
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table->WatermarkRow[WM_DCEFCLK][i].MaxUclk =
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cpu_to_le16((uint16_t)
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(wm_with_clock_ranges->wm_sets_dmif[i].wm_max_memclk_in_khz) /
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100);
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table->WatermarkRow[WM_DCEFCLK][i].WmSetting = (uint8_t)
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wm_with_clock_ranges->wm_sets_dmif[i].wm_set_id;
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}
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for (i = 0; i < wm_with_clock_ranges->num_wm_sets_mcif; i++) {
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table->WatermarkRow[WM_SOCCLK][i].MinClock =
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cpu_to_le16((uint16_t)
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(wm_with_clock_ranges->wm_sets_mcif[i].wm_min_socclk_in_khz) /
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100);
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table->WatermarkRow[WM_SOCCLK][i].MaxClock =
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cpu_to_le16((uint16_t)
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(wm_with_clock_ranges->wm_sets_mcif[i].wm_max_socclk_in_khz) /
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100);
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table->WatermarkRow[WM_SOCCLK][i].MinUclk =
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cpu_to_le16((uint16_t)
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(wm_with_clock_ranges->wm_sets_mcif[i].wm_min_memclk_in_khz) /
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100);
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table->WatermarkRow[WM_SOCCLK][i].MaxUclk =
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cpu_to_le16((uint16_t)
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(wm_with_clock_ranges->wm_sets_mcif[i].wm_max_memclk_in_khz) /
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100);
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table->WatermarkRow[WM_SOCCLK][i].WmSetting = (uint8_t)
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wm_with_clock_ranges->wm_sets_mcif[i].wm_set_id;
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}
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smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges);
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data->water_marks_bitmap |= WaterMarksExist;
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data->water_marks_bitmap &= ~WaterMarksLoaded;
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}
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