openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

staging: rtl8192e: fix 2 byte alignment of register BSSIDR. 

BSSIDR has two byte alignment on PCI ioremap correct the write
by swapping to 16 bits first.

This fixes a problem that the device associates fail because
the filter is not set correctly.

Signed-off-by: Malcolm Priestley <tvboxspy@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Malcolm Priestley 2017-05-11 18:57:44 +01:00 committed by Greg Kroah-Hartman
parent baabd567f8
commit 867510bde1
1 changed files with 5 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c
View File

@ -97,8 +97,9 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
switch (variable) { switch (variable) {
case HW_VAR_BSSID: case HW_VAR_BSSID:
rtl92e_writel(dev, BSSIDR, ((u32 *)(val))[0]); /* BSSIDR 2 byte alignment */
rtl92e_writew(dev, BSSIDR+2, ((u16 *)(val+2))[0]); rtl92e_writew(dev, BSSIDR, *(u16 *)val);
rtl92e_writel(dev, BSSIDR + 2, *(u32 *)(val + 2));
break; break;
case HW_VAR_MEDIA_STATUS: case HW_VAR_MEDIA_STATUS:
@ -961,8 +962,8 @@ static void _rtl92e_net_update(struct net_device *dev)
rtl92e_config_rate(dev, &rate_config); rtl92e_config_rate(dev, &rate_config);
priv->dot11CurrentPreambleMode = PREAMBLE_AUTO; priv->dot11CurrentPreambleMode = PREAMBLE_AUTO;
priv->basic_rate = rate_config &= 0x15f; priv->basic_rate = rate_config &= 0x15f;
rtl92e_writel(dev, BSSIDR, ((u32 *)net->bssid)[0]); rtl92e_writew(dev, BSSIDR, *(u16 *)net->bssid);
rtl92e_writew(dev, BSSIDR+4, ((u16 *)net->bssid)[2]); rtl92e_writel(dev, BSSIDR + 2, *(u32 *)(net->bssid + 2));
if (priv->rtllib->iw_mode == IW_MODE_ADHOC) { if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
rtl92e_writew(dev, ATIMWND, 2); rtl92e_writew(dev, ATIMWND, 2);