mirror of https://gitee.com/openkylin/linux.git
drm/i915/bxt: add GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ workaround
Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Nick Hoath <nicholas.hoath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -6104,6 +6104,7 @@ enum skl_disp_power_wells {
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#define GEN8_UCGCTL6 0x9430
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#define GEN8_GAPSUNIT_CLOCK_GATE_DISABLE (1<<24)
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#define GEN8_SDEUNIT_CLOCK_GATE_DISABLE (1<<14)
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#define GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ (1<<28)
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#define GEN6_GFXPAUSE 0xA000
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#define GEN6_RPNSWREQ 0xA008
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@ -103,10 +103,12 @@ static void bxt_init_clock_gating(struct drm_device *dev)
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/*
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* FIXME:
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* GEN8_SDEUNIT_CLOCK_GATE_DISABLE applies on A0 only.
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* GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ applies on 3x6 GT SKUs only.
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*/
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/* WaDisableSDEUnitClockGating:bxt */
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I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
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GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
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GEN8_SDEUNIT_CLOCK_GATE_DISABLE |
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GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
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}
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