mirror of https://gitee.com/openkylin/linux.git
UniPhier ARM64 SoC DT updates for v5.1
- Add PCI Express controller nodes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcZgK+AAoJED2LAQed4NsGnkAP/3ky1bx1+vDYgJ8yQFlUP/A/ RZZ1XixwzcPPNNhsIQBaxvXfjLdH0VdCFI01NAeOpi5EJKe7NhuRah3ILav5t80g Dq8LQNdUEaoDBnnN53UP2HjCQeaVDhKNCzMtcTrNy4mGX1uyzr+e7E/I4NIQ7IT8 JXn8D93T32JX1gLEqXkr06yOkykjxMEYH3SjCceGjZrkNCJIzW/LDL9NcLQ5amXs cp3+0dIqFUjMX1GB+Q+KRsmS3NKFNJ1zRht73hRyj4Q7G3ZMh22Vr9sBjCNuPWDs LDiDAkQ+X2g6OzUjQ4Yo8fGAPSXswiDYet9TxHtZ1nmlLFU/VfaKYk47drrHUzp8 Pbyv3ZRmulheh7zyMybtqPtrnN6ZFMZSoROXFeLYcWJdKWyWpoOxjf4+jcZd/+KY EslnzJ/asbDyUFbs85Mt94v3Zm3tABwjhUqCuUZYElNSV31I4RaNHPYVO5SNnYBP YZTU13edGWTjaQoL6zL75YMXAcv9F9M1gYGo6vB/LsXQf/rZU+S/rExID/Jddd0B 6r1CyDYouiHILYPVwPeDhh0zW1QOW0Q9yxyuUPtOjGD7l2W3DXPimBriLuHfKmxc s4BFWXgFZUKGd3/YjNg9R3dZmFHUbfqU4fS2w8pzb8nmJ74hYNQYyiH5xs8VPgVH Q2YhCkU7tZizdKR/6sDq =bPrQ -----END PGP SIGNATURE----- Merge tag 'uniphier-dt64-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into arm/dt UniPhier ARM64 SoC DT updates for v5.1 - Add PCI Express controller nodes * tag 'uniphier-dt64-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: arm64: dts: uniphier: sort labels in the same order as in dtsi arm64: dts: uniphier: Add PCIe host controller and PHY nodes Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
87503c012a
|
@ -145,10 +145,10 @@ ethphy: ethphy@1 {
|
|||
};
|
||||
};
|
||||
|
||||
&nand {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&nand {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -869,6 +869,53 @@ usb_ssphy1: ss-phy@310 {
|
|||
};
|
||||
};
|
||||
|
||||
pcie: pcie@66000000 {
|
||||
compatible = "socionext,uniphier-pcie", "snps,dw-pcie";
|
||||
status = "disabled";
|
||||
reg-names = "dbi", "link", "config";
|
||||
reg = <0x66000000 0x1000>, <0x66010000 0x10000>,
|
||||
<0x2fff0000 0x10000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
clocks = <&sys_clk 24>;
|
||||
resets = <&sys_rst 24>;
|
||||
num-lanes = <1>;
|
||||
num-viewport = <1>;
|
||||
bus-range = <0x0 0xff>;
|
||||
device_type = "pci";
|
||||
ranges =
|
||||
/* downstream I/O */
|
||||
<0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>,
|
||||
/* non-prefetchable memory */
|
||||
<0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-names = "dma", "msi";
|
||||
interrupts = <0 224 4>, <0 225 4>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */
|
||||
<0 0 0 2 &pcie_intc 1>, /* INTB */
|
||||
<0 0 0 3 &pcie_intc 2>, /* INTC */
|
||||
<0 0 0 4 &pcie_intc 3>; /* INTD */
|
||||
phy-names = "pcie-phy";
|
||||
phys = <&pcie_phy>;
|
||||
|
||||
pcie_intc: legacy-interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 226 4>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie_phy: phy@66038000 {
|
||||
compatible = "socionext,uniphier-ld20-pcie-phy";
|
||||
reg = <0x66038000 0x4000>;
|
||||
#phy-cells = <0>;
|
||||
clocks = <&sys_clk 24>;
|
||||
resets = <&sys_rst 24>;
|
||||
socionext,syscon = <&soc_glue>;
|
||||
};
|
||||
|
||||
nand: nand@68000000 {
|
||||
compatible = "socionext,uniphier-denali-nand-v5b";
|
||||
status = "disabled";
|
||||
|
|
|
@ -101,10 +101,6 @@ ethphy1: ethphy@0 {
|
|||
};
|
||||
};
|
||||
|
||||
&nand {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -112,3 +108,11 @@ &usb0 {
|
|||
&usb1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&nand {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -727,6 +727,53 @@ usb1_ssphy0: ss-phy@300 {
|
|||
};
|
||||
};
|
||||
|
||||
pcie: pcie@66000000 {
|
||||
compatible = "socionext,uniphier-pcie", "snps,dw-pcie";
|
||||
status = "disabled";
|
||||
reg-names = "dbi", "link", "config";
|
||||
reg = <0x66000000 0x1000>, <0x66010000 0x10000>,
|
||||
<0x2fff0000 0x10000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
clocks = <&sys_clk 24>;
|
||||
resets = <&sys_rst 24>;
|
||||
num-lanes = <1>;
|
||||
num-viewport = <1>;
|
||||
bus-range = <0x0 0xff>;
|
||||
device_type = "pci";
|
||||
ranges =
|
||||
/* downstream I/O */
|
||||
<0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>,
|
||||
/* non-prefetchable memory */
|
||||
<0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-names = "dma", "msi";
|
||||
interrupts = <0 224 4>, <0 225 4>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */
|
||||
<0 0 0 2 &pcie_intc 1>, /* INTB */
|
||||
<0 0 0 3 &pcie_intc 2>, /* INTC */
|
||||
<0 0 0 4 &pcie_intc 3>; /* INTD */
|
||||
phy-names = "pcie-phy";
|
||||
phys = <&pcie_phy>;
|
||||
|
||||
pcie_intc: legacy-interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 226 4>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie_phy: phy@66038000 {
|
||||
compatible = "socionext,uniphier-pxs3-pcie-phy";
|
||||
reg = <0x66038000 0x4000>;
|
||||
#phy-cells = <0>;
|
||||
clocks = <&sys_clk 24>;
|
||||
resets = <&sys_rst 24>;
|
||||
socionext,syscon = <&soc_glue>;
|
||||
};
|
||||
|
||||
nand: nand@68000000 {
|
||||
compatible = "socionext,uniphier-denali-nand-v5b";
|
||||
status = "disabled";
|
||||
|
|
Loading…
Reference in New Issue