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ARM: tegra: second set of device tree changes 

This branch contains changes to Tegra's device tree that came in after
 I sent the previous pull-request/tag tegra-for-3.14-dt. Changes are:
 
 * Set up aliases for RTCs, so that the correct RTC is chosen to
   initialize the system date/time.
 * Venice2 pinctrl and regulator configuration.
 * Built-in panel enablement for Harmony, Cardhu, Dalmore.
 * HDMI enablement for Dalmore.
 * USB2 port enablement for Beaver.
 * Keyboard and power key enablement for Venice2.
 
 This branch is based on tag tegra-for-3.14-dt, for which I sent a
 previous pull request.
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Merge tag 'tegra-for-3.14-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

From Stephen Warren:
ARM: tegra: second set of device tree changes

This branch contains changes to Tegra's device tree that came in after
I sent the previous pull-request/tag tegra-for-3.14-dt. Changes are:

* Set up aliases for RTCs, so that the correct RTC is chosen to
  initialize the system date/time.
* Venice2 pinctrl and regulator configuration.
* Built-in panel enablement for Harmony, Cardhu, Dalmore.
* HDMI enablement for Dalmore.
* USB2 port enablement for Beaver.
* Keyboard and power key enablement for Venice2.

* tag 'tegra-for-3.14-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Enable power key on Venice2
  ARM: tegra: Enable Venice2 keyboard
  ARM: tegra: enable USB2 on Tegra30 Beaver
  ARM: tegra: modify Tegra30 USB2 default phy_type to UTMI
  ARM: tegra: Enable HDMI support on Dalmore
  ARM: tegra: Enable DSI support on Dalmore
  ARM: tegra: Add Tegra114 gr3d support
  ARM: tegra: Add Tegra114 gr2d support
  ARM: tegra: Add Tegra114 DSI support
  ARM: tegra: Add host1x, DC and HDMI to Tegra114 device tree
  ARM: tegra: Add MIPI calibration DT entries for Tegra114
  ARM: tegra: Enable LVDS on Cardhu
  ARM: tegra: Enable LVDS on Harmony
  ARM: tegra: set up /aliases for RTCs on Venice2
  ARM: tegra: add ams AS3722 device to Venice2 DT
  ARM: tegra: fix missing pincontrol configuration for Venice2
  ARM: tegra: set up /aliases entries for RTCs

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-12-27 13:09:58 -08:00
parent 5aceaab397 3f748d4450
commit 8761f3b3f0
14 changed files with 993 additions and 72 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

64
arch/arm/boot/dts/tegra114-dalmore.dts
View File

@ -7,10 +7,41 @@ / {
model = "NVIDIA Tegra114 Dalmore evaluation board";
compatible = "nvidia,dalmore", "nvidia,tegra114";
aliases {
rtc0 = "/i2c@7000d000/tps65913@58";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x80000000 0x40000000>;
};
host1x@50000000 {
hdmi@54280000 {
status = "okay";
vdd-supply = <&vdd_hdmi_reg>;
pll-supply = <&palmas_smps3_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
nvidia,hpd-gpio =
<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
};
dsi@54300000 {
status = "okay";
panel@0 {
compatible = "panasonic,vvx10f004b00",
"simple-panel";
reg = <0>;
power-supply = <&avdd_lcd_reg>;
backlight = <&backlight>;
};
};
};
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@ -718,6 +749,10 @@ serial@70006300 {
status = "okay";
};
pwm@7000a000 {
status = "okay";
};
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
@ -749,6 +784,10 @@ temperature-sensor@4c {
};
};
hdmi_ddc: i2c@7000c700 {
status = "okay";
};
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;
@ -806,7 +845,7 @@ tps65090_dcdc3_reg: dcdc3 {
regulator-boot-on;
};
fet1 {
vdd_bl_reg: fet1 {
regulator-name = "vdd-lcd-bl";
};
@ -814,7 +853,7 @@ fet3 {
regulator-name = "vdd-modem-3v3";
};
fet4 {
avdd_lcd_reg: fet4 {
regulator-name = "avdd-lcd";
};
@ -1084,6 +1123,17 @@ usb-phy@7d008000 {
vbus-supply = <&usb3_vbus_reg>;
};
backlight: backlight {
compatible = "pwm-backlight";
enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
power-supply = <&vdd_bl_reg>;
pwms = <&pwm 1 1000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
@ -1150,16 +1200,6 @@ dvdd_ts_reg: regulator@1 {
gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
};
lcd_bl_en_reg: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "lcd_bl_en";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
};
usb1_vbus_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;

113
arch/arm/boot/dts/tegra114.dtsi
View File

@ -16,6 +16,112 @@ aliases {
serial3 = &uartd;
};
host1x@50000000 {
compatible = "nvidia,tegra114-host1x", "simple-bus";
reg = <0x50000000 0x00028000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
clocks = <&tegra_car TEGRA114_CLK_HOST1X>;
resets = <&tegra_car 28>;
reset-names = "host1x";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x54000000 0x54000000 0x01000000>;
gr2d@54140000 {
compatible = "nvidia,tegra114-gr2d", "nvidia,tegra20-gr2d";
reg = <0x54140000 0x00040000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_GR2D>;
resets = <&tegra_car 21>;
reset-names = "2d";
};
gr3d@54180000 {
compatible = "nvidia,tegra114-gr3d", "nvidia,tegra20-gr3d";
reg = <0x54180000 0x00040000>;
clocks = <&tegra_car TEGRA114_CLK_GR3D>;
resets = <&tegra_car 24>;
reset-names = "3d";
};
dc@54200000 {
compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_DISP1>,
<&tegra_car TEGRA114_CLK_PLL_P>;
clock-names = "dc", "parent";
resets = <&tegra_car 27>;
reset-names = "dc";
rgb {
status = "disabled";
};
};
dc@54240000 {
compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
reg = <0x54240000 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_DISP2>,
<&tegra_car TEGRA114_CLK_PLL_P>;
clock-names = "dc", "parent";
resets = <&tegra_car 26>;
reset-names = "dc";
rgb {
status = "disabled";
};
};
hdmi@54280000 {
compatible = "nvidia,tegra114-hdmi";
reg = <0x54280000 0x00040000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_HDMI>,
<&tegra_car TEGRA114_CLK_PLL_D2_OUT0>;
clock-names = "hdmi", "parent";
resets = <&tegra_car 51>;
reset-names = "hdmi";
status = "disabled";
};
dsi@54300000 {
compatible = "nvidia,tegra114-dsi";
reg = <0x54300000 0x00040000>;
clocks = <&tegra_car TEGRA114_CLK_DSIA>,
<&tegra_car TEGRA114_CLK_DSIALP>,
<&tegra_car TEGRA114_CLK_PLL_D_OUT0>;
clock-names = "dsi", "lp", "parent";
resets = <&tegra_car 48>;
reset-names = "dsi";
nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
dsi@54400000 {
compatible = "nvidia,tegra114-dsi";
reg = <0x54400000 0x00040000>;
clocks = <&tegra_car TEGRA114_CLK_DSIB>,
<&tegra_car TEGRA114_CLK_DSIBLP>,
<&tegra_car TEGRA114_CLK_PLL_D2_OUT0>;
clock-names = "dsi", "lp", "parent";
resets = <&tegra_car 82>;
reset-names = "dsi";
nvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID pads */
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
gic: interrupt-controller@50041000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
@ -480,6 +586,13 @@ tegra_i2s4: i2s@70080700 {
};
};
mipi: mipi@700e3000 {
compatible = "nvidia,tegra114-mipi";
reg = <0x700e3000 0x100>;
clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;
#nvidia,mipi-calibrate-cells = <1>;
};
sdhci@78000000 {
compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
reg = <0x78000000 0x200>;

735
arch/arm/boot/dts/tegra124-venice2.dts
View File

@ -1,11 +1,17 @@
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "tegra124.dtsi"
/ {
model = "NVIDIA Tegra124 Venice2";
compatible = "nvidia,venice2", "nvidia,tegra124";
aliases {
rtc0 = "/i2c@7000d000/as3722@40";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x80000000 0x80000000>;
};
@ -23,34 +29,40 @@ dap_mclk1_pw4 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
dap1_din_pn1 {
nvidia,pins = "dap1_din_pn1",
"dap1_dout_pn2",
"dap1_fs_pn0",
"dap1_sclk_pn3";
nvidia,pins = "dap1_din_pn1";
nvidia,function = "i2s0";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
dap1_dout_pn2 {
nvidia,pins = "dap1_dout_pn2",
"dap1_fs_pn0",
"dap1_sclk_pn3";
nvidia,function = "i2s0";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
dap2_din_pa4 {
nvidia,pins = "dap2_din_pa4",
"dap2_dout_pa5",
"dap2_fs_pa2",
"dap2_sclk_pa3";
nvidia,pins = "dap2_din_pa4";
nvidia,function = "i2s1";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
dvfs_pwm_px0 {
nvidia,pins = "dvfs_pwm_px0";
nvidia,function = "cldvfs";
dap2_dout_pa5 {
nvidia,pins = "dap2_dout_pa5",
"dap2_fs_pa2",
"dap2_sclk_pa3";
nvidia,function = "i2s1";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
dvfs_clk_px2 {
nvidia,pins = "dvfs_clk_px2";
dvfs_pwm_px0 {
nvidia,pins = "dvfs_pwm_px0",
"dvfs_clk_px2";
nvidia,function = "cldvfs";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
@ -58,12 +70,18 @@ dvfs_clk_px2 {
};
ulpi_clk_py0 {
nvidia,pins = "ulpi_clk_py0",
"ulpi_dir_py1",
"ulpi_nxt_py2",
"ulpi_stp_py3";
nvidia,function = "spi1";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
ulpi_dir_py1 {
nvidia,pins = "ulpi_dir_py1";
nvidia,function = "spi1";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
cam_i2c_scl_pbb1 {
@ -90,19 +108,18 @@ pg4 {
nvidia,pins = "pg4",
"pg5",
"pg6",
"pg7",
"pi3";
nvidia,function = "spi4";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
ph0 {
nvidia,pins = "ph0";
nvidia,function = "pwm0";
pg7 {
nvidia,pins = "pg7";
nvidia,function = "spi4";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
ph1 {
nvidia,pins = "ph1";
@ -111,12 +128,14 @@ ph1 {
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
ph2 {
nvidia,pins = "ph2";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
pk0 {
nvidia,pins = "pk0",
"kb_row15_ps7",
"clk_32k_out_pa0";
nvidia,function = "soc";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
sdmmc1_clk_pz0 {
nvidia,pins = "sdmmc1_clk_pz0",
@ -130,6 +149,17 @@ sdmmc1_clk_pz0 {
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
sdmmc1_cmd_pz1 {
nvidia,pins = "sdmmc1_cmd_pz1",
"sdmmc1_dat0_py7",
"sdmmc1_dat1_py6",
"sdmmc1_dat2_py5",
"sdmmc1_dat3_py4";
nvidia,function = "sdmmc1";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
sdmmc3_clk_pa6 {
nvidia,pins = "sdmmc3_clk_pa6";
nvidia,function = "sdmmc3";
@ -179,6 +209,7 @@ pwr_i2c_scl_pz6 {
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,lock = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
};
jtag_rtck {
@ -231,12 +262,18 @@ clk3_out_pee0 {
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
dap4_din_pp5 {
nvidia,pins = "dap4_din_pp5",
"dap4_dout_pp6",
nvidia,pins = "dap4_din_pp5";
nvidia,function = "i2s3";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
dap4_dout_pp6 {
nvidia,pins = "dap4_dout_pp6",
"dap4_fs_pp4",
"dap4_sclk_pp7";
nvidia,function = "i2s3";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
@ -248,51 +285,67 @@ gen1_i2c_sda_pc5 {
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,lock = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
pu0 {
nvidia,pins = "pu0",
"pu1",
"pu2",
"pu3";
nvidia,function = "uarta";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
};
uart2_cts_n_pj5 {
nvidia,pins = "uart2_cts_n_pj5",
"uart2_rts_n_pj6";
nvidia,pins = "uart2_cts_n_pj5";
nvidia,function = "uartb";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart2_rts_n_pj6 {
nvidia,pins = "uart2_rts_n_pj6";
nvidia,function = "uartb";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart2_rxd_pc3 {
nvidia,pins = "uart2_rxd_pc3",
"uart2_txd_pc2";
nvidia,pins = "uart2_rxd_pc3";
nvidia,function = "irda";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart2_txd_pc2 {
nvidia,pins = "uart2_txd_pc2";
nvidia,function = "irda";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart3_cts_n_pa1 {
nvidia,pins = "uart3_cts_n_pa1",
"uart3_rts_n_pc0",
"uart3_rxd_pw7",
"uart3_txd_pw6";
"uart3_rxd_pw7";
nvidia,function = "uartc";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
uart3_rts_n_pc0 {
nvidia,pins = "uart3_rts_n_pc0",
"uart3_txd_pw6";
nvidia,function = "uartc";
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
hdmi_cec_pee3 {
nvidia,pins = "hdmi_cec_pee3";
nvidia,function = "cec";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
nvidia,lock = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
};
hdmi_int_pn7 {
nvidia,pins = "hdmi_int_pn7";
nvidia,function = "rsvd1";
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
ddc_scl_pv4 {
nvidia,pins = "ddc_scl_pv4",
@ -301,6 +354,52 @@ ddc_scl_pv4 {
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,lock = <TEGRA_PIN_DISABLE>;
nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
};
pj7 {
nvidia,pins = "pj7",
"pk7";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
pb0 {
nvidia,pins = "pb0",
"pb1";
nvidia,function = "uartd";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
ph0 {
nvidia,pins = "ph0";
nvidia,function = "pwm0";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
kb_row10_ps2 {
nvidia,pins = "kb_row10_ps2";
nvidia,function = "uarta";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
kb_row9_ps1 {
nvidia,pins = "kb_row9_ps1";
nvidia,function = "uarta";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
kb_row6_pr6 {
nvidia,pins = "kb_row6_pr6";
nvidia,function = "displaya_alt";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
usb_vbus_en0_pn4 {
nvidia,pins = "usb_vbus_en0_pn4";
@ -309,7 +408,7 @@ usb_vbus_en0_pn4 {
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,lock = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
};
usb_vbus_en1_pn5 {
nvidia,pins = "usb_vbus_en1_pn5";
@ -318,7 +417,7 @@ usb_vbus_en1_pn5 {
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,lock = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
};
drive_sdio1 {
nvidia,pins = "drive_sdio1";
@ -351,6 +450,125 @@ drive_gma {
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
nvidia,drive-type = <1>;
};
als_irq_l {
nvidia,pins = "gpio_x3_aud_px3";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
codec_irq_l {
nvidia,pins = "ph4";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
lcd_bl_en {
nvidia,pins = "ph2";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
touch_irq_l {
nvidia,pins = "gpio_w3_aud_pw3";
nvidia,function = "spi6";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
tpm_davint_l {
nvidia,pins = "ph6";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
ts_irq_l {
nvidia,pins = "pk2";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
ts_reset_l {
nvidia,pins = "pk4";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
ts_shdn_l {
nvidia,pins = "pk1";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
ph7 {
nvidia,pins = "ph7";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
kb_col0_ap {
nvidia,pins = "kb_col0_pq0";
nvidia,function = "rsvd4";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
lid_open {
nvidia,pins = "kb_row4_pr4";
nvidia,function = "rsvd3";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
en_vdd_sd {
nvidia,pins = "kb_row0_pr0";
nvidia,function = "rsvd4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
ac_ok {
nvidia,pins = "pj0";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
sensor_irq_l {
nvidia,pins = "pi6";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
wifi_en {
nvidia,pins = "gpio_x7_aud_px7";
nvidia,function = "rsvd4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
wifi_rst_l {
nvidia,pins = "clk2_req_pcc5";
nvidia,function = "dap";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
hp_det_l {
nvidia,pins = "ulpi_data1_po2";
nvidia,function = "spi3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
};
};
@ -391,7 +609,307 @@ i2c@7000c700 {
i2c@7000d000 {
status = "okay";
clock-frequency = <100000>;
clock-frequency = <400000>;
as3722: as3722@40 {
compatible = "ams,as3722";
reg = <0x40>;
interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
gpio-controller;
#gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&as3722_default>;
as3722_default: pinmux {
gpio0 {
pins = "gpio0";
function = "gpio";
bias-pull-down;
};
gpio1_2_4_7 {
pins = "gpio1", "gpio2", "gpio4", "gpio7";
function = "gpio";
bias-pull-up;
};
gpio3_6 {
pins = "gpio3", "gpio6";
bias-high-impedance;
};
gpio5 {
pins = "gpio5";
function = "clk32k-out";
};
};
regulators {
vsup-sd2-supply = <&vdd_ac_bat_reg>;
vsup-sd3-supply = <&vdd_ac_bat_reg>;
vsup-sd4-supply = <&vdd_ac_bat_reg>;
vsup-sd5-supply = <&vdd_ac_bat_reg>;
vin-ldo0-supply = <&as3722_sd2>;
vin-ldo1-6-supply = <&vdd_ac_bat_reg>;
vin-ldo2-5-7-supply = <&as3722_sd5>;
vin-ldo3-4-supply = <&vdd_ac_bat_reg>;
vin-ldo9-10-supply = <&vdd_ac_bat_reg>;
vin-ldo11-supply = <&vdd_ac_bat_reg>;
sd0 {
regulator-name = "vdd-cpu";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1400000>;
regulator-min-microamp = <3500000>;
regulator-max-microamp = <3500000>;
regulator-always-on;
regulator-boot-on;
ams,external-control = <2>;
};
sd1 {
regulator-name = "vdd-core";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1350000>;
regulator-min-microamp = <2500000>;
regulator-max-microamp = <2500000>;
regulator-always-on;
regulator-boot-on;
ams,external-control = <1>;
};
as3722_sd2: sd2 {
regulator-name = "vddio-ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
sd3 {
regulator-name = "vddio-ddr-2phase";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
sd4 {
regulator-name = "avdd-pex-sata";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
regulator-boot-on;
regulator-always-on;
};
as3722_sd5: sd5 {
regulator-name = "vddio-sys";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
sd6 {
regulator-name = "vdd-gpu";
regulator-min-microvolt = <650000>;
regulator-max-microvolt = <1200000>;
regulator-min-microamp = <3500000>;
regulator-max-microamp = <3500000>;
regulator-boot-on;
regulator-always-on;
};
ldo0 {
regulator-name = "avdd_pll";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
regulator-boot-on;
regulator-always-on;
ams,external-control = <1>;
};
ldo1 {
regulator-name = "run-cam-1.8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo2 {
regulator-name = "gen-avdd,vddio-hsic";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on;
regulator-always-on;
};
ldo3 {
regulator-name = "vdd-rtc";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-boot-on;
regulator-always-on;
ams,enable-tracking;
};
ldo4 {
regulator-name = "vdd-cam";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-boot-on;
regulator-always-on;
};
ldo5 {
regulator-name = "vdd-cam-front";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo6 {
regulator-name = "vddio-sdmmc3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
ldo7 {
regulator-name = "vdd-cam-rear";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
};
ldo9 {
regulator-name = "vdd-touch";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
ldo10 {
regulator-name = "vdd-cam-af";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
ldo11 {
regulator-name = "vpp-fuse";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
};
};
spi@7000d400 {
status = "okay";
cros-ec@0 {
compatible = "google,cros-ec-spi";
spi-max-frequency = <4000000>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
reg = <0>;
google,cros-ec-spi-msg-delay = <2000>;
cros-ec-keyb {
compatible = "google,cros-ec-keyb";
keypad,num-rows = <8>;
keypad,num-columns = <13>;
google,needs-ghost-filter;
linux,keymap = <
MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA)
MATRIX_KEY(0x00, 0x02, KEY_F1)
MATRIX_KEY(0x00, 0x03, KEY_B)
MATRIX_KEY(0x00, 0x04, KEY_F10)
MATRIX_KEY(0x00, 0x06, KEY_N)
MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
MATRIX_KEY(0x01, 0x01, KEY_ESC)
MATRIX_KEY(0x01, 0x02, KEY_F4)
MATRIX_KEY(0x01, 0x03, KEY_G)
MATRIX_KEY(0x01, 0x04, KEY_F7)
MATRIX_KEY(0x01, 0x06, KEY_H)
MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
MATRIX_KEY(0x01, 0x09, KEY_F9)
MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
MATRIX_KEY(0x02, 0x01, KEY_TAB)
MATRIX_KEY(0x02, 0x02, KEY_F3)
MATRIX_KEY(0x02, 0x03, KEY_T)
MATRIX_KEY(0x02, 0x04, KEY_F6)
MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE)
MATRIX_KEY(0x02, 0x06, KEY_Y)
MATRIX_KEY(0x02, 0x07, KEY_102ND)
MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
MATRIX_KEY(0x02, 0x09, KEY_F8)
MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
MATRIX_KEY(0x03, 0x02, KEY_F2)
MATRIX_KEY(0x03, 0x03, KEY_5)
MATRIX_KEY(0x03, 0x04, KEY_F5)
MATRIX_KEY(0x03, 0x06, KEY_6)
MATRIX_KEY(0x03, 0x08, KEY_MINUS)
MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
MATRIX_KEY(0x04, 0x01, KEY_A)
MATRIX_KEY(0x04, 0x02, KEY_D)
MATRIX_KEY(0x04, 0x03, KEY_F)
MATRIX_KEY(0x04, 0x04, KEY_S)
MATRIX_KEY(0x04, 0x05, KEY_K)
MATRIX_KEY(0x04, 0x06, KEY_J)
MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON)
MATRIX_KEY(0x04, 0x09, KEY_L)
MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH)
MATRIX_KEY(0x04, 0x0b, KEY_ENTER)
MATRIX_KEY(0x05, 0x01, KEY_Z)
MATRIX_KEY(0x05, 0x02, KEY_C)
MATRIX_KEY(0x05, 0x03, KEY_V)
MATRIX_KEY(0x05, 0x04, KEY_X)
MATRIX_KEY(0x05, 0x05, KEY_COMMA)
MATRIX_KEY(0x05, 0x06, KEY_M)
MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT)
MATRIX_KEY(0x05, 0x08, KEY_SLASH)
MATRIX_KEY(0x05, 0x09, KEY_DOT)
MATRIX_KEY(0x05, 0x0b, KEY_SPACE)
MATRIX_KEY(0x06, 0x01, KEY_1)
MATRIX_KEY(0x06, 0x02, KEY_3)
MATRIX_KEY(0x06, 0x03, KEY_4)
MATRIX_KEY(0x06, 0x04, KEY_2)
MATRIX_KEY(0x06, 0x05, KEY_8)
MATRIX_KEY(0x06, 0x06, KEY_7)
MATRIX_KEY(0x06, 0x08, KEY_0)
MATRIX_KEY(0x06, 0x09, KEY_9)
MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT)
MATRIX_KEY(0x06, 0x0b, KEY_DOWN)
MATRIX_KEY(0x06, 0x0c, KEY_RIGHT)
MATRIX_KEY(0x07, 0x01, KEY_Q)
MATRIX_KEY(0x07, 0x02, KEY_E)
MATRIX_KEY(0x07, 0x03, KEY_R)
MATRIX_KEY(0x07, 0x04, KEY_W)
MATRIX_KEY(0x07, 0x05, KEY_I)
MATRIX_KEY(0x07, 0x06, KEY_U)
MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT)
MATRIX_KEY(0x07, 0x08, KEY_P)
MATRIX_KEY(0x07, 0x09, KEY_O)
MATRIX_KEY(0x07, 0x0b, KEY_UP)
MATRIX_KEY(0x07, 0x0c, KEY_LEFT)
>;
};
};
};
pmc@7000e400 {
@ -436,6 +954,119 @@ clk32k_in: clock@0 {
};
};
gpio-keys {
compatible = "gpio-keys";
power {
label = "Power";
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <10>;
gpio-key,wakeup;
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_ac_bat_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_ac_bat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
vdd_3v3_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
};
vdd_3v3_modem_reg: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "vdd-modem-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&as3722 2 GPIO_ACTIVE_HIGH>;
};
vdd_hdmi_5v0_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd-hdmi-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
};
vdd_bl_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "vdd-bl";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_LOW>;
};
vdd_ts_sw_5v0: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "vdd_ts_sw";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_LOW>;
};
usb1_vbus_reg: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "usb1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
};
usb3_vbus_reg: regulator@7 {
compatible = "regulator-fixed";
reg = <7>;
regulator-name = "usb3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
};
panel_3v3_reg: regulator@8 {
compatible = "regulator-fixed";
reg = <8>;
regulator-name = "panel_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
};
};
sound {
compatible = "nvidia,tegra-audio-max98090-venice2",
"nvidia,tegra-audio-max98090";

5
arch/arm/boot/dts/tegra20-colibri-512.dtsi
View File

@ -4,6 +4,11 @@ / {
model = "Toradex Colibri T20 512MB";
compatible = "toradex,colibri_t20-512", "nvidia,tegra20";
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x00000000 0x20000000>;
};

41
arch/arm/boot/dts/tegra20-harmony.dts
View File

@ -7,11 +7,24 @@ / {
model = "NVIDIA Tegra20 Harmony evaluation board";
compatible = "nvidia,harmony", "nvidia,tegra20";
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x00000000 0x40000000>;
};
host1x@50000000 {
dc@54200000 {
rgb {
status = "okay";
nvidia,panel = <&panel>;
};
};
hdmi@54280000 {
status = "okay";
@ -256,6 +269,10 @@ serial@70006300 {
status = "okay";
};
pwm: pwm@7000a000 {
status = "okay";
};
i2c@7000c000 {
status = "okay";
clock-frequency = <400000>;
@ -601,6 +618,17 @@ sdhci@c8000600 {
bus-width = <8>;
};
backlight: backlight {
compatible = "pwm-backlight";
enable-gpios = <&gpio TEGRA_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
power-supply = <&vdd_bl_reg>;
pwms = <&pwm 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
@ -625,6 +653,15 @@ power {
};
};
panel: panel {
compatible = "auo,b101aw03", "simple-panel";
power-supply = <&vdd_pnl_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
@ -668,7 +705,7 @@ pci_vdd_reg: regulator@3 {
enable-active-high;
};
regulator@4 {
vdd_pnl_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "vdd_pnl";
@ -678,7 +715,7 @@ regulator@4 {
enable-active-high;
};
regulator@5 {
vdd_bl_reg: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "vdd_bl";

5
arch/arm/boot/dts/tegra20-paz00.dts
View File

@ -7,6 +7,11 @@ / {
model = "Toshiba AC100 / Dynabook AZ";
compatible = "compal,paz00", "nvidia,tegra20";
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x00000000 0x20000000>;
};

5
arch/arm/boot/dts/tegra20-seaboard.dts
View File

@ -7,6 +7,11 @@ / {
model = "NVIDIA Seaboard";
compatible = "nvidia,seaboard", "nvidia,tegra20";
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x00000000 0x40000000>;
};

5
arch/arm/boot/dts/tegra20-tamonten.dtsi
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@ -4,6 +4,11 @@ / {
model = "Avionic Design Tamonten SOM";
compatible = "ad,tamonten", "nvidia,tegra20";
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x00000000 0x20000000>;
};

5
arch/arm/boot/dts/tegra20-trimslice.dts
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@ -7,6 +7,11 @@ / {
model = "Compulab TrimSlice board";
compatible = "compulab,trimslice", "nvidia,tegra20";
aliases {
rtc0 = "/i2c@7000c500/rtc@56";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x00000000 0x40000000>;
};

5
arch/arm/boot/dts/tegra20-ventana.dts
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@ -7,6 +7,11 @@ / {
model = "NVIDIA Tegra20 Ventana evaluation board";
compatible = "nvidia,ventana", "nvidia,tegra20";
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x00000000 0x40000000>;
};

5
arch/arm/boot/dts/tegra20-whistler.dts
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@ -7,6 +7,11 @@ / {
model = "NVIDIA Tegra20 Whistler evaluation board";
compatible = "nvidia,whistler", "nvidia,tegra20";
aliases {
rtc0 = "/i2c@7000d000/max8907@3c";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x00000000 0x20000000>;
};

14
arch/arm/boot/dts/tegra30-beaver.dts
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@ -6,6 +6,11 @@ / {
model = "NVIDIA Tegra30 Beaver evaluation board";
compatible = "nvidia,beaver", "nvidia,tegra30";
aliases {
rtc0 = "/i2c@7000d000/tps65911@2d";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x80000000 0x7ff00000>;
};
@ -328,6 +333,15 @@ sdhci@78000600 {
non-removable;
};
usb@7d004000 {
status = "okay";
};
phy2: usb-phy@7d004000 {
vbus-supply = <&sys_3v3_reg>;
status = "okay";
};
usb@7d008000 {
status = "okay";
};

42
arch/arm/boot/dts/tegra30-cardhu.dtsi
View File

@ -27,6 +27,11 @@ / {
model = "NVIDIA Tegra30 Cardhu evaluation board";
compatible = "nvidia,cardhu", "nvidia,tegra30";
aliases {
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
};
memory {
reg = <0x80000000 0x40000000>;
};
@ -51,6 +56,16 @@ pci@3,0 {
};
};
host1x@50000000 {
dc@54200000 {
rgb {
status = "okay";
nvidia,panel = <&panel>;
};
};
};
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@ -147,7 +162,11 @@ serial@70006200 {
status = "okay";
};
i2c@7000c000 {
pwm@7000a000 {
status = "okay";
};
panelddc: i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
};
@ -367,6 +386,17 @@ usb-phy@7d008000 {
status = "okay";
};
backlight: backlight {
compatible = "pwm-backlight";
enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
power-supply = <&vdd_bl_reg>;
pwms = <&pwm 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
@ -380,6 +410,16 @@ clk32k_in: clock@0 {
};
};
panel: panel {
compatible = "chunghwa,claa101wb01", "simple-panel";
ddc-i2c-bus = <&panelddc>;
power-supply = <&vdd_pnl1_reg>;
enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;

21
arch/arm/boot/dts/tegra30.dtsi
View File

@ -785,7 +785,7 @@ usb@7d004000 {
compatible = "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x7d004000 0x4000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "ulpi";
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB2>;
resets = <&tegra_car 58>;
reset-names = "usb";
@ -795,12 +795,23 @@ usb@7d004000 {
phy2: usb-phy@7d004000 {
compatible = "nvidia,tegra30-usb-phy";
reg = <0x7d004000 0x4000>;
phy_type = "ulpi";
reg = <0x7d004000 0x4000 0x7d000000 0x4000>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB2>,
<&tegra_car TEGRA30_CLK_PLL_U>,
<&tegra_car TEGRA30_CLK_CDEV2>;
clock-names = "reg", "pll_u", "ulpi-link";
<&tegra_car TEGRA30_CLK_USBD>;
clock-names = "reg", "pll_u", "utmi-pads";
nvidia,hssync-start-delay = <9>;
nvidia,idle-wait-delay = <17>;
nvidia,elastic-limit = <16>;
nvidia,term-range-adj = <6>;
nvidia,xcvr-setup = <51>;
nvidia.xcvr-setup-use-fuses;
nvidia,xcvr-lsfslew = <2>;
nvidia,xcvr-lsrslew = <2>;
nvidia,xcvr-hsslew = <32>;
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
status = "disabled";
};