mirror of https://gitee.com/openkylin/linux.git
ARM: S5PV310: Add FOUT APLL get rate function
FOUT APLL clock is used as a source of ARM core clock. So we need that the clock source can be changed dynamically by using CPUFREQ driver. This patch can give correct frequency when calling clk_get_rate() function. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Sangwook Ju <sw.ju@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -990,6 +990,17 @@ static struct clksrc_clk *sysclks[] = {
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&clk_dout_mmc4,
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&clk_dout_mmc4,
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};
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};
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static int xtal_rate;
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static unsigned long s5pv310_fout_apll_get_rate(struct clk *clk)
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{
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return s5p_get_pll45xx(xtal_rate, __raw_readl(S5P_APLL_CON0), pll_4508);
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}
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static struct clk_ops s5pv310_fout_apll_ops = {
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.get_rate = s5pv310_fout_apll_get_rate,
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};
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void __init_or_cpufreq s5pv310_setup_clocks(void)
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void __init_or_cpufreq s5pv310_setup_clocks(void)
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{
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{
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struct clk *xtal_clk;
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struct clk *xtal_clk;
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@ -1013,6 +1024,9 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
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BUG_ON(IS_ERR(xtal_clk));
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BUG_ON(IS_ERR(xtal_clk));
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xtal = clk_get_rate(xtal_clk);
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xtal = clk_get_rate(xtal_clk);
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xtal_rate = xtal;
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clk_put(xtal_clk);
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clk_put(xtal_clk);
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printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
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printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
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@ -1026,7 +1040,7 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
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vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
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vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
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__raw_readl(S5P_VPLL_CON1), pll_4650);
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__raw_readl(S5P_VPLL_CON1), pll_4650);
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clk_fout_apll.rate = apll;
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clk_fout_apll.ops = &s5pv310_fout_apll_ops;
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clk_fout_mpll.rate = mpll;
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clk_fout_mpll.rate = mpll;
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clk_fout_epll.rate = epll;
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clk_fout_epll.rate = epll;
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clk_fout_vpll.rate = vpll;
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clk_fout_vpll.rate = vpll;
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