From 87cf56ec311f31822a6507beaeb837f96a0607aa Mon Sep 17 00:00:00 2001 From: Jelle van der Waa Date: Fri, 14 Aug 2015 16:44:35 +0200 Subject: [PATCH] ARM: dts: sun7i: Enable USB DRC on pcDuino 3 Enable the otg/drc usb controller on the pcDuino 3. Note this board has the otg-vbus connected directly to the 5v-dcc of the board, so there is no vbus0 regulator, nor vbus0-det. Signed-off-by: Jelle van der Waa Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts index ad8169dc54d4..861a4a66fb19 100644 --- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts @@ -173,6 +173,10 @@ &ohci1 { status = "okay"; }; +&otg_sram { + status = "okay"; +}; + &pio { led_pins_pcduino3: led_pins@0 { allwinner,pins = "PH15", "PH16"; @@ -187,6 +191,13 @@ key_pins_pcduino3: key_pins@0 { allwinner,drive = ; allwinner,pull = ; }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PH4"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; }; ®_ahci_5v { @@ -233,7 +244,15 @@ &uart0 { status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ usb1_vbus-supply = <®_usb1_vbus>; usb2_vbus-supply = <®_usb2_vbus>; status = "okay";