mirror of https://gitee.com/openkylin/linux.git
bcma: get info about flash type SoC booted from
There is an ongoing work on cleaning MIPS's nvram support so it could be re-used on other platforms (bcm53xx to say precisely). This will require a bit of extra logic in bcma this patch implements. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -21,6 +21,14 @@
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#include <linux/serial_reg.h>
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#include <linux/time.h>
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enum bcma_boot_dev {
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BCMA_BOOT_DEV_UNK = 0,
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BCMA_BOOT_DEV_ROM,
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BCMA_BOOT_DEV_PARALLEL,
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BCMA_BOOT_DEV_SERIAL,
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BCMA_BOOT_DEV_NAND,
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};
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static const char * const part_probes[] = { "bcm47xxpart", NULL };
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static struct physmap_flash_data bcma_pflash_data = {
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@ -229,11 +237,51 @@ u32 bcma_cpu_clock(struct bcma_drv_mips *mcore)
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}
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EXPORT_SYMBOL(bcma_cpu_clock);
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static enum bcma_boot_dev bcma_boot_dev(struct bcma_bus *bus)
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{
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struct bcma_drv_cc *cc = &bus->drv_cc;
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u8 cc_rev = cc->core->id.rev;
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if (cc_rev == 42) {
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struct bcma_device *core;
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core = bcma_find_core(bus, BCMA_CORE_NS_ROM);
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if (core) {
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switch (bcma_aread32(core, BCMA_IOST) &
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BCMA_NS_ROM_IOST_BOOT_DEV_MASK) {
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case BCMA_NS_ROM_IOST_BOOT_DEV_NOR:
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return BCMA_BOOT_DEV_SERIAL;
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case BCMA_NS_ROM_IOST_BOOT_DEV_NAND:
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return BCMA_BOOT_DEV_NAND;
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case BCMA_NS_ROM_IOST_BOOT_DEV_ROM:
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default:
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return BCMA_BOOT_DEV_ROM;
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}
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}
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} else {
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if (cc_rev == 38) {
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if (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT)
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return BCMA_BOOT_DEV_NAND;
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else if (cc->status & BIT(5))
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return BCMA_BOOT_DEV_ROM;
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}
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if ((cc->capabilities & BCMA_CC_CAP_FLASHT) ==
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BCMA_CC_FLASHT_PARA)
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return BCMA_BOOT_DEV_PARALLEL;
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else
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return BCMA_BOOT_DEV_SERIAL;
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}
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return BCMA_BOOT_DEV_SERIAL;
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}
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static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
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{
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struct bcma_bus *bus = mcore->core->bus;
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struct bcma_drv_cc *cc = &bus->drv_cc;
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struct bcma_pflash *pflash = &cc->pflash;
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enum bcma_boot_dev boot_dev;
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switch (cc->capabilities & BCMA_CC_CAP_FLASHT) {
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case BCMA_CC_FLASHT_STSER:
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@ -269,6 +317,20 @@ static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
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bcma_nflash_init(cc);
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}
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}
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/* Determine flash type this SoC boots from */
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boot_dev = bcma_boot_dev(bus);
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switch (boot_dev) {
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case BCMA_BOOT_DEV_PARALLEL:
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case BCMA_BOOT_DEV_SERIAL:
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/* TODO: Init NVRAM using BCMA_SOC_FLASH2 window */
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break;
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case BCMA_BOOT_DEV_NAND:
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/* TODO: Init NVRAM using BCMA_SOC_FLASH1 window */
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break;
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default:
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break;
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}
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}
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void bcma_core_mips_early_init(struct bcma_drv_mips *mcore)
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@ -39,6 +39,11 @@
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#define BCMA_RESET_CTL_RESET 0x0001
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#define BCMA_RESET_ST 0x0804
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#define BCMA_NS_ROM_IOST_BOOT_DEV_MASK 0x0003
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#define BCMA_NS_ROM_IOST_BOOT_DEV_NOR 0x0000
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#define BCMA_NS_ROM_IOST_BOOT_DEV_NAND 0x0001
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#define BCMA_NS_ROM_IOST_BOOT_DEV_ROM 0x0002
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/* BCMA PCI config space registers. */
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#define BCMA_PCI_PMCSR 0x44
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#define BCMA_PCI_PE 0x100
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