mirror of https://gitee.com/openkylin/linux.git
Mediatek DRM fixes for Linux 5.5
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJeCrsAAAoJEOHKc6PJWU4k7rsP/jh81H+i4vO+derBdItdCa81 b9eQjyVZNOdVvCpYAugIz2Xa71PkjcnB53Ck885bEhSJ9sHPewMFq/K+1dHpzzqB X+68pD83B07KU6x8Y9g+DcCsksR2zOANtE0I8Y0ElraCsCN2KkUzWKUa5wefFw5M J3xWqDboad8MTUDIDs0eo4JoVFApj7PmXPKRKQfFy7In/888sCFWtC3zDKxk9OHF zj5PQ43E8cy1bCQIKnMRJjB5PuPdI0SUZlFLoxu7YbSOPkA8QGqkkOKqi4qBZ2n5 e0AcCXrwrQSqkiSZybHcUsvihJLSW64LlgorfRCDzl4TOexHVAZDgc/lg8UgEiQ2 JC/piFB1vTeI/3DMELWx6U+ULbX5hx+yAFc5zQIrio+WJYETZyVHLBLl1GE2SA8F hbEq5xjuJHvWDCsr2nsR0qHO3ozodSGgfg03vhKtQp5J0wUMIvr9kNI/4HUSJGe4 7GYBLcsPFPS6huscakkGn2hF5FL8v1Sxvqk+m/3chUU2PfsNxyVLlUztFJkaAGkH 6WjLxxpFgWVSnSqig+5wC67fF3FjUa+HtAclIi9zrnG64joH7+M/1wsTvuldo20R GPdr2iOgGkxjg8NsB9IYXTJjSFi+CBGsCxmM53K8+e3lpwN8km4pSKOHCsi1TsO6 Y5pZw4+yirymE8kKiCMo =6y+R -----END PGP SIGNATURE----- Merge tag 'mediatek-drm-fixes-5.5' of https://github.com/ckhu-mediatek/linux.git-tags into drm-fixes Mediatek DRM fixes for Linux 5.5 Signed-off-by: Dave Airlie <airlied@redhat.com> From: CK Hu <ck.hu@mediatek.com> Link: https://patchwork.freedesktop.org/patch/msgid/1577762298.23194.2.camel@mtksdaap41
This commit is contained in:
Dave Airlie
commit
886a0dc04d
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@ -215,11 +215,12 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc,
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struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
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struct mtk_ddp_comp *comp;
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int i, count = 0;
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unsigned int local_index = plane - mtk_crtc->planes;
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for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
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comp = mtk_crtc->ddp_comp[i];
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if (plane->index < (count + mtk_ddp_comp_layer_nr(comp))) {
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*local_layer = plane->index - count;
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if (local_index < (count + mtk_ddp_comp_layer_nr(comp))) {
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*local_layer = local_index - count;
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return comp;
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}
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count += mtk_ddp_comp_layer_nr(comp);
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@ -310,7 +311,9 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
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plane_state = to_mtk_plane_state(plane->state);
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comp = mtk_drm_ddp_comp_for_plane(crtc, plane, &local_layer);
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mtk_ddp_comp_layer_config(comp, local_layer, plane_state);
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if (comp)
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mtk_ddp_comp_layer_config(comp, local_layer,
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plane_state);
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}
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return 0;
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@ -386,8 +389,9 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
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comp = mtk_drm_ddp_comp_for_plane(crtc, plane,
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&local_layer);
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mtk_ddp_comp_layer_config(comp, local_layer,
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plane_state);
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if (comp)
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mtk_ddp_comp_layer_config(comp, local_layer,
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plane_state);
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plane_state->pending.config = false;
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}
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mtk_crtc->pending_planes = false;
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@ -401,7 +405,9 @@ int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
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struct mtk_ddp_comp *comp;
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comp = mtk_drm_ddp_comp_for_plane(crtc, plane, &local_layer);
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return mtk_ddp_comp_layer_check(comp, local_layer, state);
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if (comp)
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return mtk_ddp_comp_layer_check(comp, local_layer, state);
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return 0;
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}
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static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,
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@ -230,28 +230,25 @@ static void mtk_dsi_mask(struct mtk_dsi *dsi, u32 offset, u32 mask, u32 data)
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static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi)
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{
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u32 timcon0, timcon1, timcon2, timcon3;
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u32 ui, cycle_time;
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u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, 1000000);
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struct mtk_phy_timing *timing = &dsi->phy_timing;
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ui = DIV_ROUND_UP(1000000000, dsi->data_rate);
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cycle_time = div_u64(8000000000ULL, dsi->data_rate);
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timing->lpx = (60 * data_rate_mhz / (8 * 1000)) + 1;
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timing->da_hs_prepare = (80 * data_rate_mhz + 4 * 1000) / 8000;
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timing->da_hs_zero = (170 * data_rate_mhz + 10 * 1000) / 8000 + 1 -
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timing->da_hs_prepare;
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timing->da_hs_trail = timing->da_hs_prepare + 1;
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timing->lpx = NS_TO_CYCLE(60, cycle_time);
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timing->da_hs_prepare = NS_TO_CYCLE(50 + 5 * ui, cycle_time);
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timing->da_hs_zero = NS_TO_CYCLE(110 + 6 * ui, cycle_time);
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timing->da_hs_trail = NS_TO_CYCLE(77 + 4 * ui, cycle_time);
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timing->ta_go = 4 * timing->lpx - 2;
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timing->ta_sure = timing->lpx + 2;
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timing->ta_get = 4 * timing->lpx;
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timing->da_hs_exit = 2 * timing->lpx + 1;
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timing->ta_go = 4 * timing->lpx;
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timing->ta_sure = 3 * timing->lpx / 2;
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timing->ta_get = 5 * timing->lpx;
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timing->da_hs_exit = 2 * timing->lpx;
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timing->clk_hs_zero = NS_TO_CYCLE(336, cycle_time);
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timing->clk_hs_trail = NS_TO_CYCLE(100, cycle_time) + 10;
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timing->clk_hs_prepare = NS_TO_CYCLE(64, cycle_time);
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timing->clk_hs_post = NS_TO_CYCLE(80 + 52 * ui, cycle_time);
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timing->clk_hs_exit = 2 * timing->lpx;
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timing->clk_hs_prepare = 70 * data_rate_mhz / (8 * 1000);
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timing->clk_hs_post = timing->clk_hs_prepare + 8;
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timing->clk_hs_trail = timing->clk_hs_prepare;
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timing->clk_hs_zero = timing->clk_hs_trail * 4;
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timing->clk_hs_exit = 2 * timing->clk_hs_trail;
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timcon0 = timing->lpx | timing->da_hs_prepare << 8 |
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timing->da_hs_zero << 16 | timing->da_hs_trail << 24;
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@ -482,27 +479,39 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
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dsi_tmp_buf_bpp - 10);
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data_phy_cycles = timing->lpx + timing->da_hs_prepare +
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timing->da_hs_zero + timing->da_hs_exit + 2;
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timing->da_hs_zero + timing->da_hs_exit + 3;
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if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
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if (vm->hfront_porch * dsi_tmp_buf_bpp >
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if ((vm->hfront_porch + vm->hback_porch) * dsi_tmp_buf_bpp >
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data_phy_cycles * dsi->lanes + 18) {
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horizontal_frontporch_byte = vm->hfront_porch *
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dsi_tmp_buf_bpp -
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data_phy_cycles *
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dsi->lanes - 18;
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horizontal_frontporch_byte =
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vm->hfront_porch * dsi_tmp_buf_bpp -
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(data_phy_cycles * dsi->lanes + 18) *
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vm->hfront_porch /
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(vm->hfront_porch + vm->hback_porch);
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horizontal_backporch_byte =
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horizontal_backporch_byte -
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(data_phy_cycles * dsi->lanes + 18) *
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vm->hback_porch /
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(vm->hfront_porch + vm->hback_porch);
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} else {
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DRM_WARN("HFP less than d-phy, FPS will under 60Hz\n");
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horizontal_frontporch_byte = vm->hfront_porch *
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dsi_tmp_buf_bpp;
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}
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} else {
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if (vm->hfront_porch * dsi_tmp_buf_bpp >
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if ((vm->hfront_porch + vm->hback_porch) * dsi_tmp_buf_bpp >
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data_phy_cycles * dsi->lanes + 12) {
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horizontal_frontporch_byte = vm->hfront_porch *
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dsi_tmp_buf_bpp -
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data_phy_cycles *
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dsi->lanes - 12;
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horizontal_frontporch_byte =
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vm->hfront_porch * dsi_tmp_buf_bpp -
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(data_phy_cycles * dsi->lanes + 12) *
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vm->hfront_porch /
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(vm->hfront_porch + vm->hback_porch);
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horizontal_backporch_byte = horizontal_backporch_byte -
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(data_phy_cycles * dsi->lanes + 12) *
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vm->hback_porch /
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(vm->hfront_porch + vm->hback_porch);
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} else {
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DRM_WARN("HFP less than d-phy, FPS will under 60Hz\n");
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horizontal_frontporch_byte = vm->hfront_porch *
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