openkylin
/
linux
mirror of https://gitee.com/openkylin/linux.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

drm/amd/powerplay: introduce smu power source type to handle AC/DC source for each asic 

This patch introduces new smu power source type, it's to handle the different
AC/DC source defines for each asic with the same smu ip.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Huang Rui 2019-03-31 15:53:42 +08:00 committed by Alex Deucher
parent 973849042e
commit 8890fe5f43
5 changed files with 52 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
View File

@ -243,6 +243,13 @@ enum smu_clk_type
SMU_CLK_COUNT,
};
enum smu_power_src_type
{
SMU_POWER_SOURCE_AC,
SMU_POWER_SOURCE_DC,
SMU_POWER_SOURCE_COUNT,
};
enum smu_feature_mask
{
SMU_FEATURE_DPM_PREFETCHER_BIT,
@ -513,6 +520,7 @@ struct pptable_funcs {
int (*get_smu_clk_index)(struct smu_context *smu, uint32_t index);
int (*get_smu_feature_index)(struct smu_context *smu, uint32_t index);
int (*get_smu_table_index)(struct smu_context *smu, uint32_t index);
int (*get_smu_power_index)(struct smu_context *smu, uint32_t index);
int (*run_afll_btc)(struct smu_context *smu);
int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
enum amd_pm_state_type (*get_current_power_state)(struct smu_context *smu);
@ -819,6 +827,8 @@ struct smu_funcs
((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_feature_index? (smu)->ppt_funcs->get_smu_feature_index((smu), (msg)) : -EINVAL) : -EINVAL)
#define smu_table_get_index(smu, tab) \
((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_table_index? (smu)->ppt_funcs->get_smu_table_index((smu), (tab)) : -EINVAL) : -EINVAL)
#define smu_power_get_index(smu, src) \
((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_power_index? (smu)->ppt_funcs->get_smu_power_index((smu), (src)) : -EINVAL) : -EINVAL)
#define smu_run_afll_btc(smu) \
((smu)->ppt_funcs? ((smu)->ppt_funcs->run_afll_btc? (smu)->ppt_funcs->run_afll_btc((smu)) : 0) : 0)
#define smu_get_allowed_feature_mask(smu, feature_mask, num) \

3
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
View File

@ -51,6 +51,9 @@
#define TAB_MAP(tab) \
[SMU_TABLE_##tab] = TABLE_##tab
#define PWR_MAP(tab) \
[SMU_POWER_SOURCE_##tab] = POWER_SOURCE_##tab
struct smu_11_0_max_sustainable_clocks {
uint32_t display_clock;
uint32_t phy_clock;

19
drivers/gpu/drm/amd/powerplay/navi10_ppt.c
View File

@ -171,6 +171,11 @@ static int navi10_table_map[SMU_TABLE_COUNT] = {
TAB_MAP(PACE),
};
static int navi10_pwr_src_map[SMU_POWER_SOURCE_COUNT] = {
PWR_MAP(AC),
PWR_MAP(DC),
};
static int navi10_get_smu_msg_index(struct smu_context *smc, uint32_t index)
{
int val;
@ -223,6 +228,19 @@ static int navi10_get_smu_table_index(struct smu_context *smc, uint32_t index)
return val;
}
static int navi10_get_pwr_src_index(struct smu_context *smc, uint32_t index)
{
int val;
if (index >= SMU_POWER_SOURCE_COUNT)
return -EINVAL;
val = navi10_pwr_src_map[index];
if (val >= POWER_SOURCE_COUNT)
return -EINVAL;
return val;
}
#define FEATURE_MASK(feature) (1UL << feature)
static int
navi10_get_allowed_feature_mask(struct smu_context *smu,
@ -459,6 +477,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
.get_smu_clk_index = navi10_get_smu_clk_index,
.get_smu_feature_index = navi10_get_smu_feature_index,
.get_smu_table_index = navi10_get_smu_table_index,
.get_smu_power_index = navi10_get_pwr_src_index,
.get_allowed_feature_mask = navi10_get_allowed_feature_mask,
.set_default_dpm_table = navi10_set_default_dpm_table,
};

2
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
View File

@ -1038,7 +1038,7 @@ static int smu_v11_0_get_power_limit(struct smu_context *smu,
mutex_unlock(&smu->mutex);
} else {
ret = smu_send_smc_msg_with_param(smu, SMU_MSG_GetPptLimit,
POWER_SOURCE_AC << 16);
smu_power_get_index(smu, SMU_POWER_SOURCE_AC) << 16);
if (ret) {
pr_err("[%s] get PPT limit failed!", __func__);
return ret;

19
drivers/gpu/drm/amd/powerplay/vega20_ppt.c
View File

@ -202,6 +202,11 @@ static int vega20_table_map[SMU_TABLE_COUNT] = {
TAB_MAP(OVERDRIVE),
};
static int vega20_pwr_src_map[SMU_POWER_SOURCE_COUNT] = {
PWR_MAP(AC),
PWR_MAP(DC),
};
static int vega20_get_smu_table_index(struct smu_context *smc, uint32_t index)
{
int val;
@ -215,6 +220,19 @@ static int vega20_get_smu_table_index(struct smu_context *smc, uint32_t index)
return val;
}
static int vega20_get_pwr_src_index(struct smu_context *smc, uint32_t index)
{
int val;
if (index >= SMU_POWER_SOURCE_COUNT)
return -EINVAL;
val = vega20_pwr_src_map[index];
if (val >= POWER_SOURCE_COUNT)
return -EINVAL;
return val;
}
static int vega20_get_smu_feature_index(struct smu_context *smc, uint32_t index)
{
int val;
@ -3105,6 +3123,7 @@ static const struct pptable_funcs vega20_ppt_funcs = {
.get_smu_clk_index = vega20_get_smu_clk_index,
.get_smu_feature_index = vega20_get_smu_feature_index,
.get_smu_table_index = vega20_get_smu_table_index,
.get_smu_power_index = vega20_get_pwr_src_index,
.run_afll_btc = vega20_run_btc_afll,
.get_allowed_feature_mask = vega20_get_allowed_feature_mask,
.get_current_power_state = vega20_get_current_power_state,