mirror of https://gitee.com/openkylin/linux.git
net: ag71xx: port to phylink
The port to phylink was done as close as possible to initial functionality. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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b0251fbeac
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892e09153f
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@ -20,7 +20,7 @@ if NET_VENDOR_ATHEROS
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config AG71XX
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tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support"
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depends on ATH79
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select PHYLIB
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select PHYLINK
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help
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If you wish to compile a kernel for AR7XXX/91XXX and enable
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ethernet support, then you should always answer Y to this.
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@ -32,6 +32,7 @@
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#include <linux/of_mdio.h>
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#include <linux/of_net.h>
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#include <linux/of_platform.h>
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#include <linux/phylink.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <linux/clk.h>
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@ -314,6 +315,8 @@ struct ag71xx {
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dma_addr_t stop_desc_dma;
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phy_interface_t phy_if_mode;
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struct phylink *phylink;
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struct phylink_config phylink_config;
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struct delayed_work restart_work;
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struct timer_list oom_timer;
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@ -845,24 +848,91 @@ static void ag71xx_hw_start(struct ag71xx *ag)
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netif_wake_queue(ag->ndev);
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}
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static void ag71xx_link_adjust(struct ag71xx *ag, bool update)
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static void ag71xx_mac_config(struct phylink_config *config, unsigned int mode,
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const struct phylink_link_state *state)
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{
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struct phy_device *phydev = ag->ndev->phydev;
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u32 cfg2;
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u32 ifctl;
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u32 fifo5;
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struct ag71xx *ag = netdev_priv(to_net_dev(config->dev));
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if (!phydev->link && update) {
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ag71xx_hw_stop(ag);
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if (phylink_autoneg_inband(mode))
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return;
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}
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if (!ag71xx_is(ag, AR7100) && !ag71xx_is(ag, AR9130))
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ag71xx_fast_reset(ag);
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if (ag->tx_ring.desc_split) {
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ag->fifodata[2] &= 0xffff;
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ag->fifodata[2] |= ((2048 - ag->tx_ring.desc_split) / 4) << 16;
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}
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]);
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}
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static void ag71xx_mac_validate(struct phylink_config *config,
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unsigned long *supported,
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struct phylink_link_state *state)
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{
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__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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if (state->interface != PHY_INTERFACE_MODE_NA &&
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state->interface != PHY_INTERFACE_MODE_GMII &&
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state->interface != PHY_INTERFACE_MODE_MII) {
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bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
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return;
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}
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phylink_set(mask, MII);
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phylink_set(mask, Autoneg);
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phylink_set(mask, 10baseT_Half);
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phylink_set(mask, 10baseT_Full);
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phylink_set(mask, 100baseT_Half);
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phylink_set(mask, 100baseT_Full);
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if (state->interface == PHY_INTERFACE_MODE_NA ||
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state->interface == PHY_INTERFACE_MODE_GMII) {
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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}
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bitmap_and(supported, supported, mask,
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__ETHTOOL_LINK_MODE_MASK_NBITS);
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bitmap_and(state->advertising, state->advertising, mask,
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__ETHTOOL_LINK_MODE_MASK_NBITS);
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}
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static void ag71xx_mac_pcs_get_state(struct phylink_config *config,
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struct phylink_link_state *state)
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{
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state->link = 0;
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}
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static void ag71xx_mac_an_restart(struct phylink_config *config)
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{
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/* Not Supported */
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}
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static void ag71xx_mac_link_down(struct phylink_config *config,
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unsigned int mode, phy_interface_t interface)
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{
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struct ag71xx *ag = netdev_priv(to_net_dev(config->dev));
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ag71xx_hw_stop(ag);
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}
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static void ag71xx_mac_link_up(struct phylink_config *config,
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struct phy_device *phy,
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unsigned int mode, phy_interface_t interface,
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int speed, int duplex,
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bool tx_pause, bool rx_pause)
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{
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struct ag71xx *ag = netdev_priv(to_net_dev(config->dev));
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u32 cfg2;
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u32 ifctl;
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u32 fifo5;
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cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
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cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
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cfg2 |= (phydev->duplex) ? MAC_CFG2_FDX : 0;
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cfg2 |= duplex ? MAC_CFG2_FDX : 0;
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ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
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ifctl &= ~(MAC_IFCTL_SPEED);
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@ -870,7 +940,7 @@ static void ag71xx_link_adjust(struct ag71xx *ag, bool update)
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fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
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fifo5 &= ~FIFO_CFG5_BM;
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switch (phydev->speed) {
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switch (speed) {
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case SPEED_1000:
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cfg2 |= MAC_CFG2_IF_1000;
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fifo5 |= FIFO_CFG5_BM;
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@ -883,72 +953,38 @@ static void ag71xx_link_adjust(struct ag71xx *ag, bool update)
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cfg2 |= MAC_CFG2_IF_10_100;
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break;
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default:
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WARN(1, "not supported speed %i\n", phydev->speed);
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return;
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}
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if (ag->tx_ring.desc_split) {
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ag->fifodata[2] &= 0xffff;
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ag->fifodata[2] |= ((2048 - ag->tx_ring.desc_split) / 4) << 16;
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}
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]);
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ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
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ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
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ag71xx_hw_start(ag);
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if (update)
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phy_print_status(phydev);
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}
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static void ag71xx_phy_link_adjust(struct net_device *ndev)
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static const struct phylink_mac_ops ag71xx_phylink_mac_ops = {
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.validate = ag71xx_mac_validate,
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.mac_pcs_get_state = ag71xx_mac_pcs_get_state,
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.mac_an_restart = ag71xx_mac_an_restart,
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.mac_config = ag71xx_mac_config,
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.mac_link_down = ag71xx_mac_link_down,
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.mac_link_up = ag71xx_mac_link_up,
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};
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static int ag71xx_phylink_setup(struct ag71xx *ag)
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{
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struct ag71xx *ag = netdev_priv(ndev);
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struct phylink *phylink;
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ag71xx_link_adjust(ag, true);
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}
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ag->phylink_config.dev = &ag->ndev->dev;
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ag->phylink_config.type = PHYLINK_NETDEV;
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static int ag71xx_phy_connect(struct ag71xx *ag)
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{
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struct device_node *np = ag->pdev->dev.of_node;
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struct net_device *ndev = ag->ndev;
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struct device_node *phy_node;
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struct phy_device *phydev;
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int ret;
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if (of_phy_is_fixed_link(np)) {
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ret = of_phy_register_fixed_link(np);
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if (ret < 0) {
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netif_err(ag, probe, ndev, "Failed to register fixed PHY link: %d\n",
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ret);
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return ret;
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}
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phy_node = of_node_get(np);
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} else {
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phy_node = of_parse_phandle(np, "phy-handle", 0);
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}
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if (!phy_node) {
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netif_err(ag, probe, ndev, "Could not find valid phy node\n");
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return -ENODEV;
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}
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phydev = of_phy_connect(ag->ndev, phy_node, ag71xx_phy_link_adjust,
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0, ag->phy_if_mode);
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of_node_put(phy_node);
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if (!phydev) {
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netif_err(ag, probe, ndev, "Could not connect to PHY device\n");
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return -ENODEV;
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}
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phy_attached_info(phydev);
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phylink = phylink_create(&ag->phylink_config, ag->pdev->dev.fwnode,
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ag->phy_if_mode, &ag71xx_phylink_mac_ops);
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if (IS_ERR(phylink))
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return PTR_ERR(phylink);
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ag->phylink = phylink;
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return 0;
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}
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@ -1239,6 +1275,13 @@ static int ag71xx_open(struct net_device *ndev)
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unsigned int max_frame_len;
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int ret;
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ret = phylink_of_phy_connect(ag->phylink, ag->pdev->dev.of_node, 0);
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if (ret) {
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netif_err(ag, link, ndev, "phylink_of_phy_connect filed with err: %i\n",
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ret);
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goto err;
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}
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max_frame_len = ag71xx_max_frame_len(ndev->mtu);
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ag->rx_buf_size =
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SKB_DATA_ALIGN(max_frame_len + NET_SKB_PAD + NET_IP_ALIGN);
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if (ret)
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goto err;
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ret = ag71xx_phy_connect(ag);
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if (ret)
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goto err;
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phy_start(ndev->phydev);
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phylink_start(ag->phylink);
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return 0;
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@ -1268,8 +1307,8 @@ static int ag71xx_stop(struct net_device *ndev)
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{
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struct ag71xx *ag = netdev_priv(ndev);
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phy_stop(ndev->phydev);
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phy_disconnect(ndev->phydev);
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phylink_stop(ag->phylink);
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phylink_disconnect_phy(ag->phylink);
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ag71xx_hw_disable(ag);
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return 0;
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{
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struct ag71xx *ag = container_of(work, struct ag71xx,
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restart_work.work);
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struct net_device *ndev = ag->ndev;
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rtnl_lock();
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ag71xx_hw_disable(ag);
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ag71xx_hw_enable(ag);
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if (ndev->phydev->link)
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ag71xx_link_adjust(ag, false);
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phylink_stop(ag->phylink);
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phylink_start(ag->phylink);
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rtnl_unlock();
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}
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platform_set_drvdata(pdev, ndev);
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err = ag71xx_phylink_setup(ag);
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if (err) {
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netif_err(ag, probe, ndev, "failed to setup phylink (%d)\n", err);
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goto err_mdio_remove;
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}
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err = register_netdev(ndev);
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if (err) {
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netif_err(ag, probe, ndev, "unable to register net device\n");
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