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dt-bindings: pwm: Convert PWM bindings to json-schema 

Convert generic PWM controller bindings to DT schema format using
json-schema.  The consumer bindings are provided by dt-schema.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2019-10-21 18:02:06 +02:00 committed by Rob Herring
parent d6a62a4b5f
commit 89650a1e3b
40 changed files with 68 additions and 48 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt
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@ -21,7 +21,7 @@ Optional properties:
- #gpio-cells : Should be two. The first cell is the pin number and
the second cell is used to specify flags.
See ../../gpio/gpio.txt for more information.
- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of
- #pwm-cells : Should be one. See ../../pwm/pwm.yaml for description of
the cell formats.
- clock-names: should be "refclk"

2
Documentation/devicetree/bindings/pwm/atmel-hlcdc-pwm.txt
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@ -10,7 +10,7 @@ Required properties:
- pinctrl-0: should contain the pinctrl states described by pinctrl
default.
- #pwm-cells: should be set to 3. This PWM chip use the default 3 cells
bindings defined in pwm.txt in this directory.
bindings defined in pwm.yaml in this directory.
Example:

2
Documentation/devicetree/bindings/pwm/atmel-pwm.txt
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@ -7,7 +7,7 @@ Required properties:
- "atmel,sama5d2-pwm"
- "microchip,sam9x60-pwm"
- reg: physical base address and length of the controller's registers
- #pwm-cells: Should be 3. See pwm.txt in this directory for a
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a
description of the cells format.
Example:

2
Documentation/devicetree/bindings/pwm/atmel-tcb-pwm.txt
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@ -2,7 +2,7 @@ Atmel TCB PWM controller
Required properties:
- compatible: should be "atmel,tcb-pwm"
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format. The only third cell flag supported by this binding is
PWM_POLARITY_INVERTED.
- tc-block: The Timer Counter block to use as a PWM chip.

2
Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.txt
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@ -4,7 +4,7 @@ Required properties:
- compatible: must be "brcm,bcm7038-pwm"
- reg: physical base address and length for this controller
- #pwm-cells: should be 2. See pwm.txt in this directory for a description
- #pwm-cells: should be 2. See pwm.yaml in this directory for a description
of the cells format
- clocks: a phandle to the reference clock for this block which is fed through
its internal variable clock frequency generator

2
Documentation/devicetree/bindings/pwm/brcm,iproc-pwm.txt
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@ -6,7 +6,7 @@ Required Properties :
- compatible: must be "brcm,iproc-pwm"
- reg: physical base address and length of the controller's registers
- clocks: phandle + clock specifier pair for the external clock
- #pwm-cells: Should be 3. See pwm.txt in this directory for a
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a
description of the cells format.
Refer to clocks/clock-bindings.txt for generic clock consumer properties.

2
Documentation/devicetree/bindings/pwm/brcm,kona-pwm.txt
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@ -6,7 +6,7 @@ Required Properties :
- compatible: should contain "brcm,kona-pwm"
- reg: physical base address and length of the controller's registers
- clocks: phandle + clock specifier pair for the external clock
- #pwm-cells: Should be 3. See pwm.txt in this directory for a
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a
description of the cells format.
Refer to clocks/clock-bindings.txt for generic clock consumer properties.

2
Documentation/devicetree/bindings/pwm/img-pwm.txt
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@ -8,7 +8,7 @@ Required properties:
- clock-names: Must include the following entries.
- pwm: PWM operating clock.
- sys: PWM system interface clock.
- #pwm-cells: Should be 2. See pwm.txt in this directory for the
- #pwm-cells: Should be 2. See pwm.yaml in this directory for the
description of the cells format.
- img,cr-periph: Must contain a phandle to the peripheral control
syscon node which contains PWM control registers.

2
Documentation/devicetree/bindings/pwm/imx-pwm.txt
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@ -6,7 +6,7 @@ Required properties:
- "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1
- "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27
- reg: physical base address and length of the controller's registers
- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.txt
- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml
in this directory for a description of the cells format.
- clocks : Clock specifiers for both ipg and per clocks.
- clock-names : Clock names should include both "ipg" and "per"

2
Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
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@ -3,7 +3,7 @@ Freescale i.MX TPM PWM controller
Required properties:
- compatible : Should be "fsl,imx7ulp-pwm".
- reg: Physical base address and length of the controller's registers.
- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format.
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of the cells format.
- clocks : The clock provided by the SoC to drive the PWM.
- interrupts: The interrupt for the PWM controller.

2
Documentation/devicetree/bindings/pwm/lpc1850-sct-pwm.txt
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@ -7,7 +7,7 @@ Required properties:
See ../clock/clock-bindings.txt for details.
- clock-names: Must include the following entries.
- pwm: PWM operating clock.
- #pwm-cells: Should be 3. See pwm.txt in this directory for the description
- #pwm-cells: Should be 3. See pwm.yaml in this directory for the description
of the cells format.
Example:

2
Documentation/devicetree/bindings/pwm/mxs-pwm.txt
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@ -3,7 +3,7 @@ Freescale MXS PWM controller
Required properties:
- compatible: should be "fsl,imx23-pwm"
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
- fsl,pwm-number: the number of PWM devices

2
Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt
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@ -10,7 +10,7 @@ Required properties:
- "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
- "nvidia,tegra186-pwm": for Tegra186
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
- clocks: Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.

2
Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt
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@ -3,7 +3,7 @@ NXP PCA9685 16-channel 12-bit PWM LED controller
Required properties:
- compatible: "nxp,pca9685-pwm"
- #pwm-cells: Should be 2. See pwm.txt in this directory for a description of
- #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
the cells format.
The index 16 is the ALLCALL channel, that sets all PWM channels at the same
time.

2
Documentation/devicetree/bindings/pwm/pwm-bcm2835.txt
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@ -6,7 +6,7 @@ Required properties:
- clocks: This clock defines the base clock frequency of the PWM hardware
system, the period and the duty_cycle of the PWM signal is a multiple of
the base period.
- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Examples:

2
Documentation/devicetree/bindings/pwm/pwm-berlin.txt
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@ -4,7 +4,7 @@ Required properties:
- compatible: should be "marvell,berlin-pwm"
- reg: physical base address and length of the controller's registers
- clocks: phandle to the input clock
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format.
Example:

2
Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
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@ -21,7 +21,7 @@ Required properties:
- "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610
- "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM
- reg: Physical base address and length of the controller's registers
- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
- clock-names: Should include the following module clock source entries:
"ftm_sys" (module clock, also can be used as counter clock),

2
Documentation/devicetree/bindings/pwm/pwm-hibvt.txt
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@ -10,7 +10,7 @@ Required properties:
- reg: physical base address and length of the controller's registers.
- clocks: phandle and clock specifier of the PWM reference clock.
- resets: phandle and reset specifier for the PWM controller reset.
- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Example:

2
Documentation/devicetree/bindings/pwm/pwm-lp3943.txt
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@ -2,7 +2,7 @@ TI/National Semiconductor LP3943 PWM controller
Required properties:
- compatible: "ti,lp3943-pwm"
- #pwm-cells: Should be 2. See pwm.txt in this directory for a
- #pwm-cells: Should be 2. See pwm.yaml in this directory for a
description of the cells format.
Note that this hardware limits the period length to the
range 6250~1600000.

2
Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
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@ -9,7 +9,7 @@ Required properties:
- "mediatek,mt7629-pwm", "mediatek,mt7622-pwm": found on mt7629 SoC.
- "mediatek,mt8516-pwm": found on mt8516 SoC.
- reg: physical base address and length of the controller's registers.
- #pwm-cells: must be 2. See pwm.txt in this directory for a description of
- #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
the cell format.
- clocks: phandle and clock specifier of the PWM reference clock.
- clock-names: must contain the following, except for MT7628 which

2
Documentation/devicetree/bindings/pwm/pwm-meson.txt
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@ -10,7 +10,7 @@ Required properties:
or "amlogic,meson-g12a-ee-pwm"
or "amlogic,meson-g12a-ao-pwm-ab"
or "amlogic,meson-g12a-ao-pwm-cd"
- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Optional properties:

2
Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
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@ -6,7 +6,7 @@ Required properties:
- "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
- "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
- reg: physical base address and length of the controller's registers.
- #pwm-cells: must be 2. See pwm.txt in this directory for a description of
- #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
the cell format.
- clocks: phandle and clock specifier of the PWM reference clock.
- clock-names: must contain the following:

2
Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt
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@ -4,7 +4,7 @@ Required properties:
- compatible: Shall contain "ti,omap-dmtimer-pwm".
- ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer.txt for info
about these timers.
- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Optional properties:

2
Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
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@ -14,7 +14,7 @@ Required properties:
- For newer hardware (rk3328 and future socs): specified by name
- "pwm": This is used to derive the functional clock.
- "pclk": This is the APB bus clock.
- #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory
- #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory
for a description of the cell format.
Example:

2
Documentation/devicetree/bindings/pwm/pwm-sifive.txt
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@ -17,7 +17,7 @@ Required properties:
Please refer to sifive-blocks-ip-versioning.txt for details.
- reg: physical base address and length of the controller's registers
- clocks: Should contain a clock identifier for the PWM's parent clock.
- #pwm-cells: Should be 3. See pwm.txt in this directory
- #pwm-cells: Should be 3. See pwm.yaml in this directory
for a description of the cell format.
- interrupts: one interrupt per PWM channel

2
Documentation/devicetree/bindings/pwm/pwm-sprd.txt
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@ -9,7 +9,7 @@ Required properties:
- clock-names: Should contain following entries:
"pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3).
"enablen": for PWM channel n enable clock (n range: 0 ~ 3).
- #pwm-cells: Should be 2. See pwm.txt in this directory for a description of
- #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
the cells format.
Optional properties:

2
Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt
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@ -8,7 +8,7 @@ See ../mfd/stm32-lptimer.txt for details about the parent node.
Required parameters:
- compatible: Must be "st,stm32-pwm-lp".
- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells
bindings defined in pwm.txt.
bindings defined in pwm.yaml.
Optional properties:
- pinctrl-names: Set to "default". An additional "sleep" state can be

2
Documentation/devicetree/bindings/pwm/pwm-tiecap.txt
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@ -8,7 +8,7 @@ Required properties:
for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";
for 66ak2g - compatible = "ti,k2g-ecap", "ti,am3352-ecap";
for am654 - compatible = "ti,am654-ecap", "ti,am3352-ecap";
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format. The PWM channel index ranges from 0 to 4. The only third
cell flag supported by this binding is PWM_POLARITY_INVERTED.
- reg: physical base address and size of the registers map.

2
Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
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@ -7,7 +7,7 @@ Required properties:
for am654 - compatible = "ti,am654-ehrpwm", "ti-am3352-ehrpwm";
for da850 - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format. The only third cell flag supported by this binding is
PWM_POLARITY_INVERTED.
- reg: physical base address and size of the registers map.

2
Documentation/devicetree/bindings/pwm/pwm-zx.txt
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@ -7,7 +7,7 @@ Required properties:
- clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller. The
PCLK is for register access, while WCLK is the reference clock for
calculating period and duty cycles.
- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Example:

11
Documentation/devicetree/bindings/pwm/pwm.txt
View File

@ -57,13 +57,4 @@ Example with optional PWM specifier for inverse polarity
2) PWM controller nodes
-----------------------
PWM controller nodes must specify the number of cells used for the
specifier using the '#pwm-cells' property.
An example PWM controller might look like this:
pwm: pwm@7000a000 {
compatible = "nvidia,tegra20-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
};
See pwm.yaml.

29
Documentation/devicetree/bindings/pwm/pwm.yaml Normal file
View File

@ -0,0 +1,29 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: PWM controllers (providers)
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
properties:
$nodename:
pattern: "^pwm(@.*|-[0-9a-f])*$"
"#pwm-cells":
description:
Number of cells in a PWM specifier.
required:
- "#pwm-cells"
examples:
- |
pwm: pwm@7000a000 {
compatible = "nvidia,tegra20-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
};

2
Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml
View File

@ -39,7 +39,7 @@ properties:
maxItems: 1
'#pwm-cells':
# should be 2. See pwm.txt in this directory for a description of
# should be 2. See pwm.yaml in this directory for a description of
# the cells format.
const: 2

2
Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml
View File

@ -35,7 +35,7 @@ properties:
maxItems: 1
'#pwm-cells':
# should be 3. See pwm.txt in this directory for a description of
# should be 3. See pwm.yaml in this directory for a description of
# the cells format. The only third cell flag supported by this binding is
# PWM_POLARITY_INVERTED.
const: 3

2
Documentation/devicetree/bindings/pwm/spear-pwm.txt
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@ -5,7 +5,7 @@ Required properties:
- "st,spear320-pwm"
- "st,spear1340-pwm"
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
Example:

2
Documentation/devicetree/bindings/pwm/st,stmpe-pwm.txt
View File

@ -7,7 +7,7 @@ subdevices of the STMPE MFD device.
Required properties:
- compatible: should be:
- "st,stmpe-pwm"
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
Example:

2
Documentation/devicetree/bindings/pwm/ti,twl-pwm.txt
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@ -6,7 +6,7 @@ On TWL6030 series: PWM0 and PWM1
Required properties:
- compatible: "ti,twl4030-pwm" or "ti,twl6030-pwm"
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
Example:

2
Documentation/devicetree/bindings/pwm/ti,twl-pwmled.txt
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@ -6,7 +6,7 @@ On TWL6030 series: LED PWM (mainly used as charging indicator LED)
Required properties:
- compatible: "ti,twl4030-pwmled" or "ti,twl6030-pwmled"
- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
Example:

2
Documentation/devicetree/bindings/pwm/vt8500-pwm.txt
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@ -3,7 +3,7 @@ VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller
Required properties:
- compatible: should be "via,vt8500-pwm"
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format. The only third cell flag supported by this binding is
PWM_POLARITY_INVERTED.
- clocks: phandle to the PWM source clock

2
Documentation/devicetree/bindings/timer/ingenic,tcu.txt
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@ -42,7 +42,7 @@ Required properties:
- compatible: Must be one of:
* ingenic,jz4740-pwm
* ingenic,jz4725b-pwm
- #pwm-cells: Should be 3. See ../pwm/pwm.txt for a description of the cell
- #pwm-cells: Should be 3. See ../pwm/pwm.yaml for a description of the cell
format.
- clocks: List of phandle & clock specifiers for the TCU clocks.
- clock-names: List of name strings for the TCU clocks.