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Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt] 

Disintegrate asm/system.h for Unicore32. (Compilation successful)
The implementation details are not changed, but only splitted.
BTW, some codestyles are adjusted.

Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
This commit is contained in:
Guan Xuetao 2012-03-28 18:30:03 +01:00 committed by David Howells
parent bd119c6923
commit 8978bfd228
22 changed files with 225 additions and 173 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/unicore32/include/asm/Kbuild
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@ -3,7 +3,6 @@ include include/asm-generic/Kbuild.asm
generic-y += atomic.h
generic-y += auxvec.h
generic-y += bitsperlong.h
generic-y += bug.h
generic-y += bugs.h
generic-y += cputime.h
generic-y += current.h

28
arch/unicore32/include/asm/barrier.h Normal file
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@ -0,0 +1,28 @@
/*
* Memory barrier implementations for PKUnity SoC and UniCore ISA
*
* Copyright (C) 2001-2012 GUAN Xue-tao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __UNICORE_BARRIER_H__
#define __UNICORE_BARRIER_H__
#define isb() __asm__ __volatile__ ("" : : : "memory")
#define dsb() __asm__ __volatile__ ("" : : : "memory")
#define dmb() __asm__ __volatile__ ("" : : : "memory")
#define mb() barrier()
#define rmb() barrier()
#define wmb() barrier()
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#define read_barrier_depends() do { } while (0)
#define smp_read_barrier_depends() do { } while (0)
#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
#endif /* __UNICORE_BARRIER_H__ */

27
arch/unicore32/include/asm/bug.h Normal file
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@ -0,0 +1,27 @@
/*
* Bug handling for PKUnity SoC and UniCore ISA
*
* Copyright (C) 2001-2012 GUAN Xue-tao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __UNICORE_BUG_H__
#define __UNICORE_BUG_H__
#include <asm-generic/bug.h>
struct pt_regs;
struct siginfo;
extern void die(const char *msg, struct pt_regs *regs, int err);
extern void uc32_notify_die(const char *str, struct pt_regs *regs,
struct siginfo *info, unsigned long err, unsigned long trap);
extern asmlinkage void __backtrace(void);
extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
extern void __show_regs(struct pt_regs *);
#endif /* __UNICORE_BUG_H__ */

61
arch/unicore32/include/asm/cmpxchg.h Normal file
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@ -0,0 +1,61 @@
/*
* Atomics xchg/cmpxchg for PKUnity SoC and UniCore ISA
*
* Copyright (C) 2001-2012 GUAN Xue-tao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __UNICORE_CMPXCHG_H__
#define __UNICORE_CMPXCHG_H__
/*
* Generate a link failure on undefined symbol if the pointer points to a value
* of unsupported size.
*/
extern void __xchg_bad_pointer(void);
static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
int size)
{
unsigned long ret;
switch (size) {
case 1:
asm volatile("swapb %0, %1, [%2]"
: "=&r" (ret)
: "r" (x), "r" (ptr)
: "memory", "cc");
break;
case 4:
asm volatile("swapw %0, %1, [%2]"
: "=&r" (ret)
: "r" (x), "r" (ptr)
: "memory", "cc");
break;
default:
ret = __xchg_bad_pointer();
}
return ret;
}
#define xchg(ptr, x) \
((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
#include <asm-generic/cmpxchg-local.h>
/*
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
* them available.
*/
#define cmpxchg_local(ptr, o, n) \
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
(unsigned long)(o), (unsigned long)(n), sizeof(*(ptr))))
#define cmpxchg64_local(ptr, o, n) \
__cmpxchg64_local_generic((ptr), (o), (n))
#include <asm-generic/cmpxchg.h>
#endif /* __UNICORE_CMPXCHG_H__ */

15
arch/unicore32/include/asm/exec.h Normal file
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@ -0,0 +1,15 @@
/*
* Process execution bits for PKUnity SoC and UniCore ISA
*
* Copyright (C) 2001-2012 GUAN Xue-tao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __UNICORE_EXEC_H__
#define __UNICORE_EXEC_H__
#define arch_align_stack(x) (x)
#endif /* __UNICORE_EXEC_H__ */

48
arch/unicore32/include/asm/hwdef-copro.h Normal file
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@ -0,0 +1,48 @@
/*
* Co-processor register definitions for PKUnity SoC and UniCore ISA
*
* Copyright (C) 2001-2012 GUAN Xue-tao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __UNICORE_HWDEF_COPRO_H__
#define __UNICORE_HWDEF_COPRO_H__
/*
* Control Register bits (CP#0 CR1)
*/
#define CR_M (1 << 0) /* MMU enable */
#define CR_A (1 << 1) /* Alignment abort enable */
#define CR_D (1 << 2) /* Dcache enable */
#define CR_I (1 << 3) /* Icache enable */
#define CR_B (1 << 4) /* Dcache write mechanism: write back */
#define CR_T (1 << 5) /* Burst enable */
#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
#ifndef __ASSEMBLY__
#define vectors_high() (cr_alignment & CR_V)
extern unsigned long cr_no_alignment; /* defined in entry.S */
extern unsigned long cr_alignment; /* defined in entry.S */
static inline unsigned int get_cr(void)
{
unsigned int val;
asm("movc %0, p0.c1, #0" : "=r" (val) : : "cc");
return val;
}
static inline void set_cr(unsigned int val)
{
asm volatile("movc p0.c1, %0, #0" : : "r" (val) : "cc");
isb();
}
extern void adjust_cr(unsigned long mask, unsigned long set);
#endif /* __ASSEMBLY__ */
#endif /* __UNICORE_HWDEF_COPRO_H__ */

1
arch/unicore32/include/asm/io.h
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@ -16,7 +16,6 @@
#include <asm/byteorder.h>
#include <asm/memory.h>
#include <asm/system.h>
#define PCI_IOBASE PKUNITY_PCILIO_BASE
#include <asm-generic/io.h>

30
arch/unicore32/include/asm/switch_to.h Normal file
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@ -0,0 +1,30 @@
/*
* Task switching for PKUnity SoC and UniCore ISA
*
* Copyright (C) 2001-2012 GUAN Xue-tao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __UNICORE_SWITCH_TO_H__
#define __UNICORE_SWITCH_TO_H__
struct task_struct;
struct thread_info;
/*
* switch_to(prev, next) should switch from task `prev' to `next'
* `prev' will never be the same as `next'. schedule() itself
* contains the memory barrier to tell GCC not to cache `current'.
*/
extern struct task_struct *__switch_to(struct task_struct *,
struct thread_info *, struct thread_info *);
#define switch_to(prev, next, last) \
do { \
last = __switch_to(prev, task_thread_info(prev), \
task_thread_info(next)); \
} while (0)
#endif /* __UNICORE_SWITCH_TO_H__ */

166
arch/unicore32/include/asm/system.h
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@ -1,161 +1,5 @@
/*
* linux/arch/unicore32/include/asm/system.h
*
* Code specific to PKUnity SoC and UniCore ISA
*
* Copyright (C) 2001-2010 GUAN Xue-tao
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __UNICORE_SYSTEM_H__
#define __UNICORE_SYSTEM_H__
#ifdef __KERNEL__
/*
* CR1 bits (CP#0 CR1)
*/
#define CR_M (1 << 0) /* MMU enable */
#define CR_A (1 << 1) /* Alignment abort enable */
#define CR_D (1 << 2) /* Dcache enable */
#define CR_I (1 << 3) /* Icache enable */
#define CR_B (1 << 4) /* Dcache write mechanism: write back */
#define CR_T (1 << 5) /* Burst enable */
#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
#ifndef __ASSEMBLY__
#include <linux/linkage.h>
#include <linux/irqflags.h>
struct thread_info;
struct task_struct;
struct pt_regs;
void die(const char *msg, struct pt_regs *regs, int err);
struct siginfo;
void uc32_notify_die(const char *str, struct pt_regs *regs,
struct siginfo *info, unsigned long err, unsigned long trap);
void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
struct pt_regs *),
int sig, int code, const char *name);
#define xchg(ptr, x) \
((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
extern asmlinkage void __backtrace(void);
extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
struct mm_struct;
extern void show_pte(struct mm_struct *mm, unsigned long addr);
extern void __show_regs(struct pt_regs *);
extern int cpu_architecture(void);
extern void cpu_init(void);
#define vectors_high() (cr_alignment & CR_V)
#define isb() __asm__ __volatile__ ("" : : : "memory")
#define dsb() __asm__ __volatile__ ("" : : : "memory")
#define dmb() __asm__ __volatile__ ("" : : : "memory")
#define mb() barrier()
#define rmb() barrier()
#define wmb() barrier()
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#define read_barrier_depends() do { } while (0)
#define smp_read_barrier_depends() do { } while (0)
#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
extern unsigned long cr_no_alignment; /* defined in entry-unicore.S */
extern unsigned long cr_alignment; /* defined in entry-unicore.S */
static inline unsigned int get_cr(void)
{
unsigned int val;
asm("movc %0, p0.c1, #0" : "=r" (val) : : "cc");
return val;
}
static inline void set_cr(unsigned int val)
{
asm volatile("movc p0.c1, %0, #0 @set CR"
: : "r" (val) : "cc");
isb();
}
extern void adjust_cr(unsigned long mask, unsigned long set);
/*
* switch_to(prev, next) should switch from task `prev' to `next'
* `prev' will never be the same as `next'. schedule() itself
* contains the memory barrier to tell GCC not to cache `current'.
*/
extern struct task_struct *__switch_to(struct task_struct *,
struct thread_info *, struct thread_info *);
extern void panic(const char *fmt, ...);
#define switch_to(prev, next, last) \
do { \
last = __switch_to(prev, \
task_thread_info(prev), task_thread_info(next)); \
} while (0)
static inline unsigned long
__xchg(unsigned long x, volatile void *ptr, int size)
{
unsigned long ret;
switch (size) {
case 1:
asm volatile("@ __xchg1\n"
" swapb %0, %1, [%2]"
: "=&r" (ret)
: "r" (x), "r" (ptr)
: "memory", "cc");
break;
case 4:
asm volatile("@ __xchg4\n"
" swapw %0, %1, [%2]"
: "=&r" (ret)
: "r" (x), "r" (ptr)
: "memory", "cc");
break;
default:
panic("xchg: bad data size: ptr 0x%p, size %d\n",
ptr, size);
}
return ret;
}
#include <asm-generic/cmpxchg-local.h>
/*
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
* them available.
*/
#define cmpxchg_local(ptr, o, n) \
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
(unsigned long)(o), (unsigned long)(n), sizeof(*(ptr))))
#define cmpxchg64_local(ptr, o, n) \
__cmpxchg64_local_generic((ptr), (o), (n))
#include <asm-generic/cmpxchg.h>
#endif /* __ASSEMBLY__ */
#define arch_align_stack(x) (x)
#endif /* __KERNEL__ */
#endif
/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */
#include <asm/barrier.h>
#include <asm/cmpxchg.h>
#include <asm/exec.h>
#include <asm/switch_to.h>

1
arch/unicore32/include/asm/uaccess.h
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@ -16,7 +16,6 @@
#include <linux/errno.h>
#include <asm/memory.h>
#include <asm/system.h>
#define __copy_from_user __copy_from_user
#define __copy_to_user __copy_to_user

1
arch/unicore32/kernel/dma.c
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@ -18,7 +18,6 @@
#include <linux/errno.h>
#include <linux/io.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/dma.h>

2
arch/unicore32/kernel/head.S
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@ -17,7 +17,7 @@
#include <generated/asm-offsets.h>
#include <asm/memory.h>
#include <asm/thread_info.h>
#include <asm/system.h>
#include <asm/hwdef-copro.h>
#include <asm/pgtable-hwdef.h>
#if (PHYS_OFFSET & 0x003fffff)

1
arch/unicore32/kernel/hibernate.c
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@ -15,7 +15,6 @@
#include <linux/suspend.h>
#include <linux/bootmem.h>
#include <asm/system.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>

1
arch/unicore32/kernel/irq.c
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@ -26,7 +26,6 @@
#include <linux/syscore_ops.h>
#include <linux/gpio.h>
#include <asm/system.h>
#include <mach/hardware.h>
#include "setup.h"

1
arch/unicore32/kernel/ksyms.c
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@ -20,7 +20,6 @@
#include <linux/io.h>
#include <asm/checksum.h>
#include <asm/system.h>
#include "ksyms.h"

1
arch/unicore32/kernel/process.c
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@ -34,7 +34,6 @@
#include <asm/cacheflush.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/stacktrace.h>
#include "setup.h"

3
arch/unicore32/kernel/setup.h
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@ -12,8 +12,11 @@
#ifndef __UNICORE_KERNEL_SETUP_H__
#define __UNICORE_KERNEL_SETUP_H__
#include <asm/hwdef-copro.h>
extern void paging_init(void);
extern void puv3_core_init(void);
extern void cpu_init(void);
extern void puv3_ps2_init(void);
extern void pci_puv3_preinit(void);

1
arch/unicore32/kernel/traps.c
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@ -26,7 +26,6 @@
#include <linux/unistd.h>
#include <asm/cacheflush.h>
#include <asm/system.h>
#include <asm/traps.h>
#include "setup.h"

2
arch/unicore32/mm/alignment.c
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@ -24,6 +24,8 @@
#include <asm/tlbflush.h>
#include <asm/unaligned.h>
#include "mm.h"
#define CODING_BITS(i) (i & 0xe0000120)
#define LDST_P_BIT(i) (i & (1 << 28)) /* Preindex */

1
arch/unicore32/mm/fault.c
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@ -20,7 +20,6 @@
#include <linux/sched.h>
#include <linux/io.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>

1
arch/unicore32/mm/flush.c
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@ -14,7 +14,6 @@
#include <linux/pagemap.h>
#include <asm/cacheflush.h>
#include <asm/system.h>
#include <asm/tlbflush.h>
void flush_cache_mm(struct mm_struct *mm)

5
arch/unicore32/mm/mm.h
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@ -9,6 +9,8 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <asm/hwdef-copro.h>
/* the upper-most page table pointer */
extern pmd_t *top_pmd;
extern int sysctl_overcommit_memory;
@ -34,6 +36,9 @@ struct mem_type {
const struct mem_type *get_mem_type(unsigned int type);
extern void __flush_dcache_page(struct address_space *, struct page *);
extern void hook_fault_code(int nr, int (*fn)
(unsigned long, unsigned int, struct pt_regs *),
int sig, int code, const char *name);
void __init bootmem_init(void);
void uc32_mm_memblock_reserve(void);