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Non critical omap fixes for v3.10 merge window. A big chunk 

of these fixes are needed to support omap5 es2 version that includes
 PM features while the earlier version es1 did not.
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Merge tag 'omap-for-v3.10/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical

From Tony Lindgren <tony@atomide.com>:

Non critical omap fixes for v3.10 merge window. A big chunk
of these fixes are needed to support omap5 es2 version that includes
PM features while the earlier version es1 did not.

* tag 'omap-for-v3.10/fixes-non-critical-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS"
  ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD"
  ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
  ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
  ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
  ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
  ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry

Contains an update to 3.9-rc5

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2013-04-08 18:00:45 +02:00
parent 21b3ac76b1 105612489b
commit 8bd2bcf320
888 changed files with 8906 additions and 4828 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
CREDITS
View File

@ -1510,6 +1510,14 @@ D: Natsemi ethernet
D: Cobalt Networks (x86) support
D: This-and-That
N: Mark M. Hoffman
E: mhoffman@lightlink.com
D: asb100, lm93 and smsc47b397 hardware monitoring drivers
D: hwmon subsystem core
D: hwmon subsystem maintainer
D: i2c-sis96x and i2c-stub SMBus drivers
S: USA
N: Dirk Hohndel
E: hohndel@suse.de
D: The XFree86[tm] Project

6
Documentation/devicetree/bindings/mfd/ab8500.txt
View File

@ -13,9 +13,6 @@ Required parent device properties:
4 = active high level-sensitive
8 = active low level-sensitive
Optional parent device properties:
- reg : contains the PRCMU mailbox address for the AB8500 i2c port
The AB8500 consists of a large and varied group of sub-devices:
Device IRQ Names Supply Names Description
@ -86,9 +83,8 @@ Non-standard child device properties:
- stericsson,amic2-bias-vamic1 : Analoge Mic wishes to use a non-standard Vamic
- stericsson,earpeice-cmv : Earpeice voltage (only: 950 | 1100 | 1270 | 1580)
ab8500@5 {
ab8500 {
compatible = "stericsson,ab8500";
reg = <5>; /* mailbox 5 is i2c */
interrupts = <0 40 0x4>;
interrupt-controller;
#interrupt-cells = <2>;

3
Documentation/devicetree/bindings/tty/serial/of-serial.txt
View File

@ -11,6 +11,9 @@ Required properties:
- "nvidia,tegra20-uart"
- "nxp,lpc3220-uart"
- "ibm,qpace-nwp-serial"
- "altr,16550-FIFO32"
- "altr,16550-FIFO64"
- "altr,16550-FIFO128"
- "serial" if the port type is unknown.
- reg : offset and length of the register set for the device.
- interrupts : should contain uart interrupt.

2
Documentation/hwmon/lm75
View File

@ -23,7 +23,7 @@ Supported chips:
Datasheet: Publicly available at the Maxim website
http://www.maxim-ic.com/
* Microchip (TelCom) TCN75
Prefix: 'lm75'
Prefix: 'tcn75'
Addresses scanned: none
Datasheet: Publicly available at the Microchip website
http://www.microchip.com/

2
Documentation/i2c/busses/i2c-diolan-u2c
View File

@ -5,7 +5,7 @@ Supported adapters:
Documentation:
http://www.diolan.com/i2c/u2c12.html
Author: Guenter Roeck <guenter.roeck@ericsson.com>
Author: Guenter Roeck <linux@roeck-us.net>
Description
-----------

65
Documentation/input/alps.txt
View File

@ -3,10 +3,26 @@ ALPS Touchpad Protocol
Introduction
------------
Currently the ALPS touchpad driver supports five protocol versions in use by
ALPS touchpads, called versions 1, 2, 3, 4 and 5.
Currently the ALPS touchpad driver supports four protocol versions in use by
ALPS touchpads, called versions 1, 2, 3, and 4. Information about the various
protocol versions is contained in the following sections.
Since roughly mid-2010 several new ALPS touchpads have been released and
integrated into a variety of laptops and netbooks. These new touchpads
have enough behavior differences that the alps_model_data definition
table, describing the properties of the different versions, is no longer
adequate. The design choices were to re-define the alps_model_data
table, with the risk of regression testing existing devices, or isolate
the new devices outside of the alps_model_data table. The latter design
choice was made. The new touchpad signatures are named: "Rushmore",
"Pinnacle", and "Dolphin", which you will see in the alps.c code.
For the purposes of this document, this group of ALPS touchpads will
generically be called "new ALPS touchpads".
We experimented with probing the ACPI interface _HID (Hardware ID)/_CID
(Compatibility ID) definition as a way to uniquely identify the
different ALPS variants but there did not appear to be a 1:1 mapping.
In fact, it appeared to be an m:n mapping between the _HID and actual
hardware type.
Detection
---------
@ -20,9 +36,13 @@ If the E6 report is successful, the touchpad model is identified using the "E7
report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
matched against known models in the alps_model_data_array.
With protocol versions 3 and 4, the E7 report model signature is always
73-02-64. To differentiate between these versions, the response from the
"Enter Command Mode" sequence must be inspected as described below.
For older touchpads supporting protocol versions 3 and 4, the E7 report
model signature is always 73-02-64. To differentiate between these
versions, the response from the "Enter Command Mode" sequence must be
inspected as described below.
The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
seem to be better differentiated by the EC Command Mode response.
Command Mode
------------
@ -47,6 +67,14 @@ address of the register being read, and the third contains the value of the
register. Registers are written by writing the value one nibble at a time
using the same encoding used for addresses.
For the new ALPS touchpads, the EC command is used to enter command
mode. The response in the new ALPS touchpads is significantly different,
and more important in determining the behavior. This code has been
separated from the original alps_model_data table and put in the
alps_identify function. For example, there seem to be two hardware init
sequences for the "Dolphin" touchpads as determined by the second byte
of the EC response.
Packet Format
-------------
@ -187,3 +215,28 @@ There are several things worth noting here.
well.
So far no v4 devices with tracksticks have been encountered.
ALPS Absolute Mode - Protocol Version 5
---------------------------------------
This is basically Protocol Version 3 but with different logic for packet
decode. It uses the same alps_process_touchpad_packet_v3 call with a
specialized decode_fields function pointer to correctly interpret the
packets. This appears to only be used by the Dolphin devices.
For single-touch, the 6-byte packet format is:
byte 0: 1 1 0 0 1 0 0 0
byte 1: 0 x6 x5 x4 x3 x2 x1 x0
byte 2: 0 y6 y5 y4 y3 y2 y1 y0
byte 3: 0 M R L 1 m r l
byte 4: y10 y9 y8 y7 x10 x9 x8 x7
byte 5: 0 z6 z5 z4 z3 z2 z1 z0
For mt, the format is:
byte 0: 1 1 1 n3 1 n2 n1 x24
byte 1: 1 y7 y6 y5 y4 y3 y2 y1
byte 2: ? x2 x1 y12 y11 y10 y9 y8
byte 3: 0 x23 x22 x21 x20 x19 x18 x17
byte 4: 0 x9 x8 x7 x6 x5 x4 x3
byte 5: 0 x16 x15 x14 x13 x12 x11 x10

7
Documentation/networking/ipvs-sysctl.txt
View File

@ -15,6 +15,13 @@ amemthresh - INTEGER
enabled and the variable is automatically set to 2, otherwise
the strategy is disabled and the variable is set to 1.
backup_only - BOOLEAN
0 - disabled (default)
not 0 - enabled
If set, disable the director function while the server is
in backup mode to avoid packet loops for DR/TUN methods.
conntrack - BOOLEAN
0 - disabled (default)
not 0 - enabled

77
Documentation/networking/tuntap.txt
View File

@ -105,6 +105,83 @@ Copyright (C) 1999-2000 Maxim Krasnyansky <max_mk@yahoo.com>
Proto [2 bytes]
Raw protocol(IP, IPv6, etc) frame.
3.3 Multiqueue tuntap interface:
From version 3.8, Linux supports multiqueue tuntap which can uses multiple
file descriptors (queues) to parallelize packets sending or receiving. The
device allocation is the same as before, and if user wants to create multiple
queues, TUNSETIFF with the same device name must be called many times with
IFF_MULTI_QUEUE flag.
char *dev should be the name of the device, queues is the number of queues to
be created, fds is used to store and return the file descriptors (queues)
created to the caller. Each file descriptor were served as the interface of a
queue which could be accessed by userspace.
#include <linux/if.h>
#include <linux/if_tun.h>
int tun_alloc_mq(char *dev, int queues, int *fds)
{
struct ifreq ifr;
int fd, err, i;
if (!dev)
return -1;
memset(&ifr, 0, sizeof(ifr));
/* Flags: IFF_TUN - TUN device (no Ethernet headers)
* IFF_TAP - TAP device
*
* IFF_NO_PI - Do not provide packet information
* IFF_MULTI_QUEUE - Create a queue of multiqueue device
*/
ifr.ifr_flags = IFF_TAP | IFF_NO_PI | IFF_MULTI_QUEUE;
strcpy(ifr.ifr_name, dev);
for (i = 0; i < queues; i++) {
if ((fd = open("/dev/net/tun", O_RDWR)) < 0)
goto err;
err = ioctl(fd, TUNSETIFF, (void *)&ifr);
if (err) {
close(fd);
goto err;
}
fds[i] = fd;
}
return 0;
err:
for (--i; i >= 0; i--)
close(fds[i]);
return err;
}
A new ioctl(TUNSETQUEUE) were introduced to enable or disable a queue. When
calling it with IFF_DETACH_QUEUE flag, the queue were disabled. And when
calling it with IFF_ATTACH_QUEUE flag, the queue were enabled. The queue were
enabled by default after it was created through TUNSETIFF.
fd is the file descriptor (queue) that we want to enable or disable, when
enable is true we enable it, otherwise we disable it
#include <linux/if.h>
#include <linux/if_tun.h>
int tun_set_queue(int fd, int enable)
{
struct ifreq ifr;
memset(&ifr, 0, sizeof(ifr));
if (enable)
ifr.ifr_flags = IFF_ATTACH_QUEUE;
else
ifr.ifr_flags = IFF_DETACH_QUEUE;
return ioctl(fd, TUNSETQUEUE, (void *)&ifr);
}
Universal TUN/TAP device driver Frequently Asked Question.
1. What platforms are supported by TUN/TAP driver ?

2
Documentation/sound/alsa/ALSA-Configuration.txt
View File

@ -912,7 +912,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
models depending on the codec chip. The list of available models
is found in HD-Audio-Models.txt
The model name "genric" is treated as a special case. When this
The model name "generic" is treated as a special case. When this
model is given, the driver uses the generic codec parser without
"codec-patch". It's sometimes good for testing and debugging.

2
Documentation/sound/alsa/seq_oss.html
View File

@ -285,7 +285,7 @@ sample data.
<H4>
7.2.4 Close Callback</H4>
The <TT>close</TT> callback is called when this device is closed by the
applicaion. If any private data was allocated in open callback, it must
application. If any private data was allocated in open callback, it must
be released in the close callback. The deletion of ALSA port should be
done here, too. This callback must not be NULL.
<H4>

2
Documentation/trace/ftrace.txt
View File

@ -1873,7 +1873,7 @@ feature:
status\input | 0 | 1 | else |
--------------+------------+------------+------------+
not allocated |(do nothing)| alloc+swap | EINVAL |
not allocated |(do nothing)| alloc+swap |(do nothing)|
--------------+------------+------------+------------+
allocated | free | swap | clear |
--------------+------------+------------+------------+

83
MAINTAINERS
View File

@ -1338,12 +1338,6 @@ S: Maintained
F: drivers/platform/x86/asus*.c
F: drivers/platform/x86/eeepc*.c
ASUS ASB100 HARDWARE MONITOR DRIVER
M: "Mark M. Hoffman" <mhoffman@lightlink.com>
L: lm-sensors@lm-sensors.org
S: Maintained
F: drivers/hwmon/asb100.c
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
M: Dan Williams <djbw@fb.com>
W: http://sourceforge.net/projects/xscaleiop
@ -1467,6 +1461,12 @@ F: drivers/dma/at_hdmac.c
F: drivers/dma/at_hdmac_regs.h
F: include/linux/platform_data/dma-atmel.h
ATMEL I2C DRIVER
M: Ludovic Desroches <ludovic.desroches@atmel.com>
L: linux-i2c@vger.kernel.org
S: Supported
F: drivers/i2c/busses/i2c-at91.c
ATMEL ISI DRIVER
M: Josh Wu <josh.wu@atmel.com>
L: linux-media@vger.kernel.org
@ -2629,7 +2629,7 @@ F: include/uapi/drm/
INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets)
M: Daniel Vetter <daniel.vetter@ffwll.ch>
L: intel-gfx@lists.freedesktop.org (subscribers-only)
L: intel-gfx@lists.freedesktop.org
L: dri-devel@lists.freedesktop.org
T: git git://people.freedesktop.org/~danvet/drm-intel
S: Supported
@ -3242,6 +3242,12 @@ F: Documentation/firmware_class/
F: drivers/base/firmware*.c
F: include/linux/firmware.h
FLASHSYSTEM DRIVER (IBM FlashSystem 70/80 PCI SSD Flash Card)
M: Joshua Morris <josh.h.morris@us.ibm.com>
M: Philip Kelleher <pjk1939@linux.vnet.ibm.com>
S: Maintained
F: drivers/block/rsxx/
FLOPPY DRIVER
M: Jiri Kosina <jkosina@suse.cz>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/floppy.git
@ -3851,7 +3857,7 @@ F: drivers/i2c/busses/i2c-ismt.c
F: Documentation/i2c/busses/i2c-ismt
I2C/SMBUS STUB DRIVER
M: "Mark M. Hoffman" <mhoffman@lightlink.com>
M: Jean Delvare <khali@linux-fr.org>
L: linux-i2c@vger.kernel.org
S: Maintained
F: drivers/i2c/i2c-stub.c
@ -4005,6 +4011,22 @@ M: Stanislaw Gruszka <stf_xl@wp.pl>
S: Maintained
F: drivers/usb/atm/ueagle-atm.c
INA209 HARDWARE MONITOR DRIVER
M: Guenter Roeck <linux@roeck-us.net>
L: lm-sensors@lm-sensors.org
S: Maintained
F: Documentation/hwmon/ina209
F: Documentation/devicetree/bindings/i2c/ina209.txt
F: drivers/hwmon/ina209.c
INA2XX HARDWARE MONITOR DRIVER
M: Guenter Roeck <linux@roeck-us.net>
L: lm-sensors@lm-sensors.org
S: Maintained
F: Documentation/hwmon/ina2xx
F: drivers/hwmon/ina2xx.c
F: include/linux/platform_data/ina2xx.h
INDUSTRY PACK SUBSYSTEM (IPACK)
M: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
M: Jens Taprogge <jens.taprogge@taprogge.org>
@ -5098,6 +5120,15 @@ S: Maintained
F: Documentation/hwmon/max6650
F: drivers/hwmon/max6650.c
MAX6697 HARDWARE MONITOR DRIVER
M: Guenter Roeck <linux@roeck-us.net>
L: lm-sensors@lm-sensors.org
S: Maintained
F: Documentation/hwmon/max6697
F: Documentation/devicetree/bindings/i2c/max6697.txt
F: drivers/hwmon/max6697.c
F: include/linux/platform_data/max6697.h
MAXIRADIO FM RADIO RECEIVER DRIVER
M: Hans Verkuil <hverkuil@xs4all.nl>
L: linux-media@vger.kernel.org
@ -5622,6 +5653,14 @@ S: Maintained
F: drivers/video/riva/
F: drivers/video/nvidia/
NVM EXPRESS DRIVER
M: Matthew Wilcox <willy@linux.intel.com>
L: linux-nvme@lists.infradead.org
T: git git://git.infradead.org/users/willy/linux-nvme.git
S: Supported
F: drivers/block/nvme.c
F: include/linux/nvme.h
OMAP SUPPORT
M: Tony Lindgren <tony@atomide.com>
L: linux-omap@vger.kernel.org
@ -5650,7 +5689,7 @@ S: Maintained
F: arch/arm/*omap*/*clock*
OMAP POWER MANAGEMENT SUPPORT
M: Kevin Hilman <khilman@ti.com>
M: Kevin Hilman <khilman@deeprootsystems.com>
L: linux-omap@vger.kernel.org
S: Maintained
F: arch/arm/*omap*/*pm*
@ -5744,7 +5783,7 @@ F: arch/arm/*omap*/usb*
OMAP GPIO DRIVER
M: Santosh Shilimkar <santosh.shilimkar@ti.com>
M: Kevin Hilman <khilman@ti.com>
M: Kevin Hilman <khilman@deeprootsystems.com>
L: linux-omap@vger.kernel.org
S: Maintained
F: drivers/gpio/gpio-omap.c
@ -6176,7 +6215,7 @@ F: include/linux/power_supply.h
F: drivers/power/
PNP SUPPORT
M: Adam Belay <abelay@mit.edu>
M: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
M: Bjorn Helgaas <bhelgaas@google.com>
S: Maintained
F: drivers/pnp/
@ -6412,6 +6451,8 @@ F: Documentation/networking/LICENSE.qla3xxx
F: drivers/net/ethernet/qlogic/qla3xxx.*
QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER
M: Rajesh Borundia <rajesh.borundia@qlogic.com>
M: Shahed Shaikh <shahed.shaikh@qlogic.com>
M: Jitendra Kalsaria <jitendra.kalsaria@qlogic.com>
M: Sony Chacko <sony.chacko@qlogic.com>
M: linux-driver@qlogic.com
@ -6516,12 +6557,6 @@ S: Maintained
F: Documentation/blockdev/ramdisk.txt
F: drivers/block/brd.c
RAMSAM DRIVER (IBM RamSan 70/80 PCI SSD Flash Card)
M: Joshua Morris <josh.h.morris@us.ibm.com>
M: Philip Kelleher <pjk1939@linux.vnet.ibm.com>
S: Maintained
F: drivers/block/rsxx/
RANDOM NUMBER DRIVER
M: Theodore Ts'o" <tytso@mit.edu>
S: Maintained
@ -7138,7 +7173,7 @@ F: arch/arm/mach-s3c2410/bast-irq.c
TI DAVINCI MACHINE SUPPORT
M: Sekhar Nori <nsekhar@ti.com>
M: Kevin Hilman <khilman@ti.com>
M: Kevin Hilman <khilman@deeprootsystems.com>
L: davinci-linux-open-source@linux.davincidsp.com (moderated for non-subscribers)
T: git git://gitorious.org/linux-davinci/linux-davinci.git
Q: http://patchwork.kernel.org/project/linux-davinci/list/
@ -7171,13 +7206,6 @@ L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/sis/sis900.*
SIS 96X I2C/SMBUS DRIVER
M: "Mark M. Hoffman" <mhoffman@lightlink.com>
L: linux-i2c@vger.kernel.org
S: Maintained
F: Documentation/i2c/busses/i2c-sis96x
F: drivers/i2c/busses/i2c-sis96x.c
SIS FRAMEBUFFER DRIVER
M: Thomas Winischhofer <thomas@winischhofer.net>
W: http://www.winischhofer.net/linuxsisvga.shtml
@ -7255,7 +7283,7 @@ F: Documentation/hwmon/sch5627
F: drivers/hwmon/sch5627.c
SMSC47B397 HARDWARE MONITOR DRIVER
M: "Mark M. Hoffman" <mhoffman@lightlink.com>
M: Jean Delvare <khali@linux-fr.org>
L: lm-sensors@lm-sensors.org
S: Maintained
F: Documentation/hwmon/smsc47b397
@ -7678,9 +7706,10 @@ F: include/linux/swiotlb.h
SYNOPSYS ARC ARCHITECTURE
M: Vineet Gupta <vgupta@synopsys.com>
L: linux-snps-arc@vger.kernel.org
S: Supported
F: arch/arc/
F: Documentation/devicetree/bindings/arc/
F: drivers/tty/serial/arc-uart.c
SYSV FILESYSTEM
M: Christoph Hellwig <hch@infradead.org>

2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 9
SUBLEVEL = 0
EXTRAVERSION = -rc2
EXTRAVERSION = -rc5
NAME = Unicycling Gorilla
# *DOCUMENTATION*

7
arch/Kconfig
View File

@ -319,13 +319,6 @@ config ARCH_WANT_OLD_COMPAT_IPC
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
bool
config HAVE_VIRT_TO_BUS
bool
help
An architecture should select this if it implements the
deprecated interface virt_to_bus(). All new architectures
should probably not select this.
config HAVE_ARCH_SECCOMP_FILTER
bool
help

2
arch/alpha/Kconfig
View File

@ -9,7 +9,7 @@ config ALPHA
select HAVE_PERF_EVENTS
select HAVE_DMA_ATTRS
select HAVE_GENERIC_HARDIRQS
select HAVE_VIRT_TO_BUS
select VIRT_TO_BUS
select GENERIC_IRQ_PROBE
select AUTO_IRQ_AFFINITY if SMP
select GENERIC_IRQ_SHOW

2
arch/arc/include/asm/dma-mapping.h
View File

@ -126,7 +126,7 @@ dma_map_sg(struct device *dev, struct scatterlist *sg,
int i;
for_each_sg(sg, s, nents, i)
sg->dma_address = dma_map_page(dev, sg_page(s), s->offset,
s->dma_address = dma_map_page(dev, sg_page(s), s->offset,
s->length, dir);
return nents;

3
arch/arc/include/asm/elf.h
View File

@ -72,7 +72,4 @@ extern int elf_check_arch(const struct elf32_hdr *);
*/
#define ELF_PLATFORM (NULL)
#define SET_PERSONALITY(ex) \
set_personality(PER_LINUX | (current->personality & (~PER_MASK)))
#endif

2
arch/arc/include/asm/entry.h
View File

@ -415,7 +415,7 @@
*-------------------------------------------------------------*/
.macro SAVE_ALL_EXCEPTION marker
st \marker, [sp, 8]
st \marker, [sp, 8] /* orig_r8 */
st r0, [sp, 4] /* orig_r0, needed only for sys calls */
/* Restore r9 used to code the early prologue */

6
arch/arc/include/asm/kgdb.h
View File

@ -13,7 +13,7 @@
#ifdef CONFIG_KGDB
#include <asm/user.h>
#include <asm/ptrace.h>
/* to ensure compatibility with Linux 2.6.35, we don't implement the get/set
* register API yet */
@ -53,9 +53,7 @@ enum arc700_linux_regnums {
};
#else
static inline void kgdb_trap(struct pt_regs *regs, int param)
{
}
#define kgdb_trap(regs, param)
#endif
#endif /* __ARC_KGDB_H__ */

2
arch/arc/include/asm/ptrace.h
View File

@ -123,7 +123,7 @@ static inline long regs_return_value(struct pt_regs *regs)
#define orig_r8_IS_SCALL 0x0001
#define orig_r8_IS_SCALL_RESTARTED 0x0002
#define orig_r8_IS_BRKPT 0x0004
#define orig_r8_IS_EXCPN 0x0004
#define orig_r8_IS_EXCPN 0x0008
#define orig_r8_IS_IRQ1 0x0010
#define orig_r8_IS_IRQ2 0x0020

2
arch/arc/include/asm/syscalls.h
View File

@ -16,8 +16,6 @@
#include <linux/types.h>
int sys_clone_wrapper(int, int, int, int, int);
int sys_fork_wrapper(void);
int sys_vfork_wrapper(void);
int sys_cacheflush(uint32_t, uint32_t uint32_t);
int sys_arc_settls(void *);
int sys_arc_gettls(void);

4
arch/arc/include/uapi/asm/ptrace.h
View File

@ -28,14 +28,14 @@
*/
struct user_regs_struct {
struct scratch {
struct {
long pad;
long bta, lp_start, lp_end, lp_count;
long status32, ret, blink, fp, gp;
long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
long sp;
} scratch;
struct callee {
struct {
long pad;
long r25, r24, r23, r22, r21, r20;
long r19, r18, r17, r16, r15, r14, r13;

27
arch/arc/kernel/entry.S
View File

@ -452,7 +452,7 @@ tracesys:
; using ERET won't work since next-PC has already committed
lr r12, [efa]
GET_CURR_TASK_FIELD_PTR TASK_THREAD, r11
st r12, [r11, THREAD_FAULT_ADDR]
st r12, [r11, THREAD_FAULT_ADDR] ; thread.fault_address
; PRE Sys Call Ptrace hook
mov r0, sp ; pt_regs needed
@ -792,31 +792,6 @@ ARC_EXIT ret_from_fork
;################### Special Sys Call Wrappers ##########################
; TBD: call do_fork directly from here
ARC_ENTRY sys_fork_wrapper
SAVE_CALLEE_SAVED_USER
bl @sys_fork
DISCARD_CALLEE_SAVED_USER
GET_CURR_THR_INFO_FLAGS r10
btst r10, TIF_SYSCALL_TRACE
bnz tracesys_exit
b ret_from_system_call
ARC_EXIT sys_fork_wrapper
ARC_ENTRY sys_vfork_wrapper
SAVE_CALLEE_SAVED_USER
bl @sys_vfork
DISCARD_CALLEE_SAVED_USER
GET_CURR_THR_INFO_FLAGS r10
btst r10, TIF_SYSCALL_TRACE
bnz tracesys_exit
b ret_from_system_call
ARC_EXIT sys_vfork_wrapper
ARC_ENTRY sys_clone_wrapper
SAVE_CALLEE_SAVED_USER
bl @sys_clone

1
arch/arc/kernel/kgdb.c
View File

@ -9,6 +9,7 @@
*/
#include <linux/kgdb.h>
#include <linux/sched.h>
#include <asm/disasm.h>
#include <asm/cacheflush.h>

4
arch/arc/kernel/setup.c
View File

@ -232,10 +232,8 @@ char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
n += scnprintf(buf + n, len - n, "\n");
#ifdef _ASM_GENERIC_UNISTD_H
n += scnprintf(buf + n, len - n,
"OS ABI [v2]\t: asm-generic/{unistd,stat,fcntl}\n");
#endif
"OS ABI [v3]\t: no-legacy-syscalls\n");
return buf;
}

2
arch/arc/kernel/sys.c
View File

@ -6,8 +6,6 @@
#include <asm/syscalls.h>
#define sys_clone sys_clone_wrapper
#define sys_fork sys_fork_wrapper
#define sys_vfork sys_vfork_wrapper
#undef __SYSCALL
#define __SYSCALL(nr, call) [nr] = (call),

22
arch/arm/Kconfig
View File

@ -49,7 +49,6 @@ config ARM
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_UID16
select HAVE_VIRT_TO_BUS
select KTIME_SCALAR
select PERF_USE_VMALLOC
select RTC_LIB
@ -556,7 +555,6 @@ config ARCH_IXP4XX
config ARCH_DOVE
bool "Marvell Dove"
select ARCH_REQUIRE_GPIOLIB
select COMMON_CLK_DOVE
select CPU_V7
select GENERIC_CLOCKEVENTS
select MIGHT_HAVE_PCI
@ -744,6 +742,7 @@ config ARCH_RPC
select NEED_MACH_IO_H
select NEED_MACH_MEMORY_H
select NO_IOPORT
select VIRT_TO_BUS
help
On the Acorn Risc-PC, Linux can support the internal IDE disk and
CD-ROM interface, serial and parallel port, and the floppy drive.
@ -879,6 +878,7 @@ config ARCH_SHARK
select ISA_DMA
select NEED_MACH_MEMORY_H
select PCI
select VIRT_TO_BUS
select ZONE_DMA
help
Support for the StrongARM based Digital DNARD machine, also known
@ -1006,12 +1006,12 @@ config ARCH_MULTI_V4_V5
bool
config ARCH_MULTI_V6
bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
bool "ARMv6 based platforms (ARM11)"
select ARCH_MULTI_V6_V7
select CPU_V6
config ARCH_MULTI_V7
bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
default y
select ARCH_MULTI_V6_V7
select ARCH_VEXPRESS
@ -1462,10 +1462,6 @@ config ISA_DMA
bool
select ISA_DMA_API
config ARCH_NO_VIRT_TO_BUS
def_bool y
depends on !ARCH_RPC && !ARCH_NETWINDER && !ARCH_SHARK
# Select ISA DMA interface
config ISA_DMA_API
bool
@ -1657,13 +1653,16 @@ config LOCAL_TIMERS
accounting to be spread across the timer interval, preventing a
"thundering herd" at every timer tick.
# The GPIO number here must be sorted by descending number. In case of
# a multiplatform kernel, we just want the highest value required by the
# selected platforms.
config ARCH_NR_GPIO
int
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
default 355 if ARCH_U8500
default 264 if MACH_H4700
default 512 if SOC_OMAP5
default 355 if ARCH_U8500
default 288 if ARCH_VT8500 || ARCH_SUNXI
default 264 if MACH_H4700
default 0
help
Maximum number of GPIOs in the system.
@ -1887,8 +1886,9 @@ config XEN_DOM0
config XEN
bool "Xen guest support on ARM (EXPERIMENTAL)"
depends on ARM && OF
depends on ARM && AEABI && OF
depends on CPU_V7 && !CPU_V6
depends on !GENERIC_ATOMIC64
help
Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.

3
arch/arm/Kconfig.debug
View File

@ -492,9 +492,10 @@ config DEBUG_IMX_UART_PORT
DEBUG_IMX31_UART || \
DEBUG_IMX35_UART || \
DEBUG_IMX51_UART || \
DEBUG_IMX50_IMX53_UART || \
DEBUG_IMX53_UART || \
DEBUG_IMX6Q_UART
default 1
depends on ARCH_MXC
help
Choose UART port on which kernel low-level debug messages
should be output.

2
arch/arm/boot/Makefile
View File

@ -115,4 +115,4 @@ i:
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
$(obj)/Image System.map "$(INSTALL_PATH)"
subdir- := bootp compressed
subdir- := bootp compressed dts

8
arch/arm/boot/dts/armada-370-rd.dts
View File

@ -64,5 +64,13 @@ mvsdio@d00d4000 {
status = "okay";
/* No CD or WP GPIOs */
};
usb@d0050000 {
status = "okay";
};
usb@d0051000 {
status = "okay";
};
};
};

5
arch/arm/boot/dts/armada-370-xp.dtsi
View File

@ -31,7 +31,6 @@ cpu@0 {
mpic: interrupt-controller@d0020000 {
compatible = "marvell,mpic";
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
};
@ -54,7 +53,7 @@ serial@d0012000 {
reg = <0xd0012000 0x100>;
reg-shift = <2>;
interrupts = <41>;
reg-io-width = <4>;
reg-io-width = <1>;
status = "disabled";
};
serial@d0012100 {
@ -62,7 +61,7 @@ serial@d0012100 {
reg = <0xd0012100 0x100>;
reg-shift = <2>;
interrupts = <42>;
reg-io-width = <4>;
reg-io-width = <1>;
status = "disabled";
};

4
arch/arm/boot/dts/armada-xp.dtsi
View File

@ -46,7 +46,7 @@ serial@d0012200 {
reg = <0xd0012200 0x100>;
reg-shift = <2>;
interrupts = <43>;
reg-io-width = <4>;
reg-io-width = <1>;
status = "disabled";
};
serial@d0012300 {
@ -54,7 +54,7 @@ serial@d0012300 {
reg = <0xd0012300 0x100>;
reg-shift = <2>;
interrupts = <44>;
reg-io-width = <4>;
reg-io-width = <1>;
status = "disabled";
};

28
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -238,8 +238,32 @@ pinctrl_uart1: uart1-0 {
nand {
pinctrl_nand: nand-0 {
atmel,pins =
<3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
<3 0 0x1 0x0 /* PD0 periph A Read Enable */
3 1 0x1 0x0 /* PD1 periph A Write Enable */
3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */
3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */
3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */
3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */
3 6 0x1 0x0 /* PD6 periph A Data bit 0 */
3 7 0x1 0x0 /* PD7 periph A Data bit 1 */
3 8 0x1 0x0 /* PD8 periph A Data bit 2 */
3 9 0x1 0x0 /* PD9 periph A Data bit 3 */
3 10 0x1 0x0 /* PD10 periph A Data bit 4 */
3 11 0x1 0x0 /* PD11 periph A Data bit 5 */
3 12 0x1 0x0 /* PD12 periph A Data bit 6 */
3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
};
pinctrl_nand_16bits: nand_16bits-0 {
atmel,pins =
<3 14 0x1 0x0 /* PD14 periph A Data bit 8 */
3 15 0x1 0x0 /* PD15 periph A Data bit 9 */
3 16 0x1 0x0 /* PD16 periph A Data bit 10 */
3 17 0x1 0x0 /* PD17 periph A Data bit 11 */
3 18 0x1 0x0 /* PD18 periph A Data bit 12 */
3 19 0x1 0x0 /* PD19 periph A Data bit 13 */
3 20 0x1 0x0 /* PD20 periph A Data bit 14 */
3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
};
};

2
arch/arm/boot/dts/bcm2835.dtsi
View File

@ -105,7 +105,7 @@ clk_i2c: i2c {
compatible = "fixed-clock";
reg = <1>;
#clock-cells = <0>;
clock-frequency = <150000000>;
clock-frequency = <250000000>;
};
};
};

3
arch/arm/boot/dts/dbx5x0.dtsi
View File

@ -319,9 +319,8 @@ db8500_esram34_ret_reg: db8500_esram34_ret {
};
};
ab8500@5 {
ab8500 {
compatible = "stericsson,ab8500";
reg = <5>; /* mailbox 5 is i2c */
interrupt-parent = <&intc>;
interrupts = <0 40 0x4>;
interrupt-controller;

5
arch/arm/boot/dts/dove.dtsi
View File

@ -197,6 +197,11 @@ sata0: sata@a0000 {
status = "disabled";
};
rtc@d8500 {
compatible = "marvell,orion-rtc";
reg = <0xd8500 0x20>;
};
crypto: crypto@30000 {
compatible = "marvell,orion-crypto";
reg = <0x30000 0x10000>,

9
arch/arm/boot/dts/exynos4.dtsi
View File

@ -275,18 +275,27 @@ pdma0: pdma@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <0 35 0>;
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <0 36 0>;
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma1: mdma@12850000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12850000 0x1000>;
interrupts = <0 34 0>;
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
};
};

6
arch/arm/boot/dts/exynos5440.dtsi
View File

@ -142,12 +142,18 @@ pdma0: pdma@121A0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x120000 0x1000>;
interrupts = <0 34 0>;
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@121B0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121000 0x1000>;
interrupts = <0 35 0>;
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
};

2
arch/arm/boot/dts/href.dtsi
View File

@ -222,7 +222,7 @@ db8500_esram34_ret_reg: db8500_esram34_ret {
};
};
ab8500@5 {
ab8500 {
ab8500-regulators {
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
regulator-name = "V-DISPLAY";

2
arch/arm/boot/dts/hrefv60plus.dts
View File

@ -158,7 +158,7 @@ db8500_esram34_ret_reg: db8500_esram34_ret {
};
};
ab8500@5 {
ab8500 {
ab8500-regulators {
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
regulator-name = "V-DISPLAY";

3
arch/arm/boot/dts/imx53-mba53.dts
View File

@ -42,10 +42,9 @@ pinctrl_disp1_1: disp1-grp1 {
fsl,pins = <689 0x10000 /* DISP1_DRDY */
482 0x10000 /* DISP1_HSYNC */
489 0x10000 /* DISP1_VSYNC */
684 0x10000 /* DISP1_DAT_0 */
515 0x10000 /* DISP1_DAT_22 */
523 0x10000 /* DISP1_DAT_23 */
543 0x10000 /* DISP1_DAT_21 */
545 0x10000 /* DISP1_DAT_21 */
553 0x10000 /* DISP1_DAT_20 */
558 0x10000 /* DISP1_DAT_19 */
564 0x10000 /* DISP1_DAT_18 */

2
arch/arm/boot/dts/kirkwood-dns320.dts
View File

@ -42,12 +42,10 @@ orange-usb {
ocp@f1000000 {
serial@12000 {
clock-frequency = <166666667>;
status = "okay";
};
serial@12100 {
clock-frequency = <166666667>;
status = "okay";
};
};

1
arch/arm/boot/dts/kirkwood-dns325.dts
View File

@ -50,7 +50,6 @@ lm75: lm75@48 {
};
};
serial@12000 {
clock-frequency = <200000000>;
status = "okay";
};
};

1
arch/arm/boot/dts/kirkwood-dockstar.dts
View File

@ -37,7 +37,6 @@ pmx_led_orange: pmx-led-orange {
};
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};

1
arch/arm/boot/dts/kirkwood-dreamplug.dts
View File

@ -38,7 +38,6 @@ pmx_led_wifi_ap: pmx-led-wifi-ap {
};
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};

1
arch/arm/boot/dts/kirkwood-goflexnet.dts
View File

@ -73,7 +73,6 @@ pmx_led_orange: pmx-led_orange {
};
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};

1
arch/arm/boot/dts/kirkwood-ib62x0.dts
View File

@ -51,7 +51,6 @@ pmx_button_usb_copy: pmx-button-usb-copy {
};
};
serial@12000 {
clock-frequency = <200000000>;
status = "okay";
};

1
arch/arm/boot/dts/kirkwood-iconnect.dts
View File

@ -78,7 +78,6 @@ lm63: lm63@4c {
};
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};

1
arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts
View File

@ -115,7 +115,6 @@ lm63: lm63@4c {
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};

1
arch/arm/boot/dts/kirkwood-km_kirkwood.dts
View File

@ -34,7 +34,6 @@ pmx_i2c_gpio_scl: pmx-gpio-scl {
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};

1
arch/arm/boot/dts/kirkwood-lschlv2.dts
View File

@ -13,7 +13,6 @@ memory {
ocp@f1000000 {
serial@12000 {
clock-frequency = <166666667>;
status = "okay";
};
};

1
arch/arm/boot/dts/kirkwood-lsxhl.dts
View File

@ -13,7 +13,6 @@ memory {
ocp@f1000000 {
serial@12000 {
clock-frequency = <200000000>;
status = "okay";
};
};

1
arch/arm/boot/dts/kirkwood-mplcec4.dts
View File

@ -90,7 +90,6 @@ eeprom@57 {
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};

1
arch/arm/boot/dts/kirkwood-ns2-common.dtsi
View File

@ -23,7 +23,6 @@ pmx_ns2_sata1: pmx-ns2-sata1 {
};
serial@12000 {
clock-frequency = <166666667>;
status = "okay";
};

1
arch/arm/boot/dts/kirkwood-nsa310.dts
View File

@ -117,7 +117,6 @@ pmx_pwr_off: pmx-pwr-off {
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};

2
arch/arm/boot/dts/kirkwood-openblocks_a6.dts
View File

@ -18,12 +18,10 @@ chosen {
ocp@f1000000 {
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};
serial@12100 {
clock-frequency = <200000000>;
status = "ok";
};

1
arch/arm/boot/dts/kirkwood-topkick.dts
View File

@ -108,7 +108,6 @@ pmx_led_wifi_yellow: pmx-led-wifi-yellow {
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};

5
arch/arm/boot/dts/kirkwood.dtsi
View File

@ -38,6 +38,7 @@ gpio0: gpio@10100 {
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <35>, <36>, <37>, <38>;
clocks = <&gate_clk 7>;
};
gpio1: gpio@10140 {
@ -49,6 +50,7 @@ gpio1: gpio@10140 {
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <39>, <40>, <41>;
clocks = <&gate_clk 7>;
};
serial@12000 {
@ -57,7 +59,6 @@ serial@12000 {
reg-shift = <2>;
interrupts = <33>;
clocks = <&gate_clk 7>;
/* set clock-frequency in board dts */
status = "disabled";
};
@ -67,7 +68,6 @@ serial@12100 {
reg-shift = <2>;
interrupts = <34>;
clocks = <&gate_clk 7>;
/* set clock-frequency in board dts */
status = "disabled";
};
@ -75,6 +75,7 @@ rtc@10300 {
compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
reg = <0x10300 0x20>;
interrupts = <53>;
clocks = <&gate_clk 7>;
};
spi@10600 {

2
arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts
View File

@ -11,7 +11,7 @@
/ {
model = "LaCie Ethernet Disk mini V2";
compatible = "lacie,ethernet-disk-mini-v2", "marvell-orion5x-88f5182", "marvell,orion5x";
compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x";
memory {
reg = <0x00000000 0x4000000>; /* 64 MB */

2
arch/arm/boot/dts/snowball.dts
View File

@ -298,7 +298,7 @@ db8500_esram34_ret_reg: db8500_esram34_ret {
};
};
ab8500@5 {
ab8500 {
ab8500-gpio {
compatible = "stericsson,ab8500-gpio";
};

3
arch/arm/boot/dts/socfpga.dtsi
View File

@ -75,6 +75,9 @@ pdma: pdma@ffe01000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0xffe01000 0x1000>;
interrupts = <0 180 4>;
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
};

3
arch/arm/boot/dts/tegra20.dtsi
View File

@ -118,6 +118,7 @@ timer@50004600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
interrupts = <1 13 0x304>;
clocks = <&tegra_car 132>;
};
intc: interrupt-controller {
@ -384,7 +385,7 @@ spi@7000d600 {
spi@7000d800 {
compatible = "nvidia,tegra20-slink";
reg = <0x7000d480 0x200>;
reg = <0x7000d800 0x200>;
interrupts = <0 83 0x04>;
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;

3
arch/arm/boot/dts/tegra30.dtsi
View File

@ -119,6 +119,7 @@ timer@50004600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
interrupts = <1 13 0xf04>;
clocks = <&tegra_car 214>;
};
intc: interrupt-controller {
@ -371,7 +372,7 @@ spi@7000d600 {
spi@7000d800 {
compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
reg = <0x7000d480 0x200>;
reg = <0x7000d800 0x200>;
interrupts = <0 83 0x04>;
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;

1
arch/arm/configs/mxs_defconfig
View File

@ -116,6 +116,7 @@ CONFIG_SND_SOC=y
CONFIG_SND_MXS_SOC=y
CONFIG_SND_SOC_MXS_SGTL5000=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_STORAGE=y

2
arch/arm/configs/omap2plus_defconfig
View File

@ -126,6 +126,8 @@ CONFIG_INPUT_MISC=y
CONFIG_INPUT_TWL4030_PWRBUTTON=y
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y

25
arch/arm/include/asm/xen/events.h
View File

@ -2,6 +2,7 @@
#define _ASM_ARM_XEN_EVENTS_H
#include <asm/ptrace.h>
#include <asm/atomic.h>
enum ipi_vector {
XEN_PLACEHOLDER_VECTOR,
@ -15,26 +16,8 @@ static inline int xen_irqs_disabled(struct pt_regs *regs)
return raw_irqs_disabled_flags(regs->ARM_cpsr);
}
/*
* We cannot use xchg because it does not support 8-byte
* values. However it is safe to use {ldr,dtd}exd directly because all
* platforms which Xen can run on support those instructions.
*/
static inline xen_ulong_t xchg_xen_ulong(xen_ulong_t *ptr, xen_ulong_t val)
{
xen_ulong_t oldval;
unsigned int tmp;
wmb();
asm volatile("@ xchg_xen_ulong\n"
"1: ldrexd %0, %H0, [%3]\n"
" strexd %1, %2, %H2, [%3]\n"
" teq %1, #0\n"
" bne 1b"
: "=&r" (oldval), "=&r" (tmp)
: "r" (val), "r" (ptr)
: "memory", "cc");
return oldval;
}
#define xchg_xen_ulong(ptr, val) atomic64_xchg(container_of((ptr), \
atomic64_t, \
counter), (val))
#endif /* _ASM_ARM_XEN_EVENTS_H */

2
arch/arm/kernel/smp.c
View File

@ -480,7 +480,7 @@ static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
evt->features = CLOCK_EVT_FEAT_ONESHOT |
CLOCK_EVT_FEAT_PERIODIC |
CLOCK_EVT_FEAT_DUMMY;
evt->rating = 400;
evt->rating = 100;
evt->mult = 1;
evt->set_mode = broadcast_timer_set_mode;

33
arch/arm/lib/memset.S
View File

@ -14,31 +14,15 @@
.text
.align 5
.word 0
1: subs r2, r2, #4 @ 1 do we have enough
blt 5f @ 1 bytes to align with?
cmp r3, #2 @ 1
strltb r1, [ip], #1 @ 1
strleb r1, [ip], #1 @ 1
strb r1, [ip], #1 @ 1
add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
/*
* The pointer is now aligned and the length is adjusted. Try doing the
* memset again.
*/
ENTRY(memset)
/*
* Preserve the contents of r0 for the return value.
*/
mov ip, r0
ands r3, ip, #3 @ 1 unaligned?
bne 1b @ 1
ands r3, r0, #3 @ 1 unaligned?
mov ip, r0 @ preserve r0 as return value
bne 6f @ 1
/*
* we know that the pointer in ip is aligned to a word boundary.
*/
orr r1, r1, r1, lsl #8
1: orr r1, r1, r1, lsl #8
orr r1, r1, r1, lsl #16
mov r3, r1
cmp r2, #16
@ -127,4 +111,13 @@ ENTRY(memset)
tst r2, #1
strneb r1, [ip], #1
mov pc, lr
6: subs r2, r2, #4 @ 1 do we have enough
blt 5b @ 1 bytes to align with?
cmp r3, #2 @ 1
strltb r1, [ip], #1 @ 1
strleb r1, [ip], #1 @ 1
strb r1, [ip], #1 @ 1
add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
b 1b
ENDPROC(memset)

1
arch/arm/mach-at91/board-foxg20.c
View File

@ -176,6 +176,7 @@ static struct w1_gpio_platform_data w1_gpio_pdata = {
/* If you choose to use a pin other than PB16 it needs to be 3.3V */
.pin = AT91_PIN_PB16,
.is_open_drain = 1,
.ext_pullup_enable_pin = -EINVAL,
};
static struct platform_device w1_device = {

1
arch/arm/mach-at91/board-stamp9g20.c
View File

@ -188,6 +188,7 @@ static struct spi_board_info portuxg20_spi_devices[] = {
static struct w1_gpio_platform_data w1_gpio_pdata = {
.pin = AT91_PIN_PA29,
.is_open_drain = 1,
.ext_pullup_enable_pin = -EINVAL,
};
static struct platform_device w1_device = {

8
arch/arm/mach-at91/include/mach/gpio.h
View File

@ -209,6 +209,14 @@ extern int at91_get_gpio_value(unsigned pin);
extern void at91_gpio_suspend(void);
extern void at91_gpio_resume(void);
#ifdef CONFIG_PINCTRL_AT91
extern void at91_pinctrl_gpio_suspend(void);
extern void at91_pinctrl_gpio_resume(void);
#else
static inline void at91_pinctrl_gpio_suspend(void) {}
static inline void at91_pinctrl_gpio_resume(void) {}
#endif
#endif /* __ASSEMBLY__ */
#endif

20
arch/arm/mach-at91/irq.c
View File

@ -92,23 +92,21 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value)
void at91_irq_suspend(void)
{
int i = 0, bit;
int bit = -1;
if (has_aic5()) {
/* disable enabled irqs */
while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
at91_aic_write(AT91_AIC5_SSR,
bit & AT91_AIC5_INTSEL_MSK);
at91_aic_write(AT91_AIC5_IDCR, 1);
i = bit;
}
/* enable wakeup irqs */
i = 0;
while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
bit = -1;
while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
at91_aic_write(AT91_AIC5_SSR,
bit & AT91_AIC5_INTSEL_MSK);
at91_aic_write(AT91_AIC5_IECR, 1);
i = bit;
}
} else {
at91_aic_write(AT91_AIC_IDCR, *backups);
@ -118,23 +116,21 @@ void at91_irq_suspend(void)
void at91_irq_resume(void)
{
int i = 0, bit;
int bit = -1;
if (has_aic5()) {
/* disable wakeup irqs */
while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) {
while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) {
at91_aic_write(AT91_AIC5_SSR,
bit & AT91_AIC5_INTSEL_MSK);
at91_aic_write(AT91_AIC5_IDCR, 1);
i = bit;
}
/* enable irqs disabled for suspend */
i = 0;
while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) {
bit = -1;
while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) {
at91_aic_write(AT91_AIC5_SSR,
bit & AT91_AIC5_INTSEL_MSK);
at91_aic_write(AT91_AIC5_IECR, 1);
i = bit;
}
} else {
at91_aic_write(AT91_AIC_IDCR, *wakeups);

10
arch/arm/mach-at91/pm.c
View File

@ -201,7 +201,10 @@ extern u32 at91_slow_clock_sz;
static int at91_pm_enter(suspend_state_t state)
{
at91_gpio_suspend();
if (of_have_populated_dt())
at91_pinctrl_gpio_suspend();
else
at91_gpio_suspend();
at91_irq_suspend();
pr_debug("AT91: PM - wake mask %08x, pm state %d\n",
@ -286,7 +289,10 @@ static int at91_pm_enter(suspend_state_t state)
error:
target_state = PM_SUSPEND_ON;
at91_irq_resume();
at91_gpio_resume();
if (of_have_populated_dt())
at91_pinctrl_gpio_resume();
else
at91_gpio_resume();
return 0;
}

3
arch/arm/mach-davinci/dma.c
View File

@ -743,6 +743,9 @@ EXPORT_SYMBOL(edma_free_channel);
*/
int edma_alloc_slot(unsigned ctlr, int slot)
{
if (!edma_cc[ctlr])
return -EINVAL;
if (slot >= 0)
slot = EDMA_CHAN_SLOT(slot);

1
arch/arm/mach-footbridge/Kconfig
View File

@ -67,6 +67,7 @@ config ARCH_NETWINDER
select ISA
select ISA_DMA
select PCI
select VIRT_TO_BUS
help
Say Y here if you intend to run this kernel on the Rebel.COM
NetWinder. Information about this machine can be found at:

1
arch/arm/mach-imx/clk-imx35.c
View File

@ -264,6 +264,7 @@ int __init mx35_clocks_init(void)
clk_prepare_enable(clk[gpio3_gate]);
clk_prepare_enable(clk[iim_gate]);
clk_prepare_enable(clk[emi_gate]);
clk_prepare_enable(clk[max_gate]);
/*
* SCC is needed to boot via mmc after a watchdog reset. The clock code

2
arch/arm/mach-imx/clk-imx6q.c
View File

@ -172,7 +172,7 @@ static struct clk *clk[clk_max];
static struct clk_onecell_data clk_data;
static enum mx6q_clks const clks_init_on[] __initconst = {
mmdc_ch0_axi, rom,
mmdc_ch0_axi, rom, pll1_sys,
};
static struct clk_div_table clk_enet_ref_table[] = {

18
arch/arm/mach-imx/headsmp.S
View File

@ -26,16 +26,16 @@ ENDPROC(v7_secondary_startup)
#ifdef CONFIG_PM
/*
* The following code is located into the .data section. This is to
* allow phys_l2x0_saved_regs to be accessed with a relative load
* as we are running on physical address here.
* The following code must assume it is running from physical address
* where absolute virtual addresses to the data section have to be
* turned into relative ones.
*/
.data
.align
#ifdef CONFIG_CACHE_L2X0
.macro pl310_resume
ldr r2, phys_l2x0_saved_regs
adr r0, l2x0_saved_regs_offset
ldr r2, [r0]
add r2, r2, r0
ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
@ -43,9 +43,9 @@ ENDPROC(v7_secondary_startup)
str r1, [r0, #L2X0_CTRL] @ re-enable L2
.endm
.globl phys_l2x0_saved_regs
phys_l2x0_saved_regs:
.long 0
l2x0_saved_regs_offset:
.word l2x0_saved_regs - .
#else
.macro pl310_resume
.endm

5
arch/arm/mach-imx/imx25-dt.c
View File

@ -27,6 +27,11 @@ static const char * const imx25_dt_board_compat[] __initconst = {
NULL
};
static void __init imx25_timer_init(void)
{
mx25_clocks_init_dt();
}
DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
.map_io = mx25_map_io,
.init_early = imx25_init_early,

15
arch/arm/mach-imx/pm-imx6q.c
View File

@ -22,8 +22,6 @@
#include "common.h"
#include "hardware.h"
extern unsigned long phys_l2x0_saved_regs;
static int imx6q_suspend_finish(unsigned long val)
{
cpu_do_idle();
@ -57,18 +55,5 @@ static const struct platform_suspend_ops imx6q_pm_ops = {
void __init imx6q_pm_init(void)
{
/*
* The l2x0 core code provides an infrastucture to save and restore
* l2x0 registers across suspend/resume cycle. But because imx6q
* retains L2 content during suspend and needs to resume L2 before
* MMU is enabled, it can only utilize register saving support and
* have to take care of restoring on its own. So we save physical
* address of the data structure used by l2x0 core to save registers,
* and later restore the necessary ones in imx6q resume entry.
*/
#ifdef CONFIG_CACHE_L2X0
phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
#endif
suspend_set_ops(&imx6q_pm_ops);
}

1
arch/arm/mach-ixp4xx/vulcan-setup.c
View File

@ -163,6 +163,7 @@ static struct platform_device vulcan_max6369 = {
static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
.pin = 14,
.ext_pullup_enable_pin = -EINVAL,
};
static struct platform_device vulcan_w1_gpio = {

25
arch/arm/mach-kirkwood/board-dt.c
View File

@ -41,16 +41,12 @@ static void __init kirkwood_legacy_clk_init(void)
struct device_node *np = of_find_compatible_node(
NULL, NULL, "marvell,kirkwood-gating-clock");
struct of_phandle_args clkspec;
struct clk *clk;
clkspec.np = np;
clkspec.args_count = 1;
clkspec.args[0] = CGC_BIT_GE0;
orion_clkdev_add(NULL, "mv643xx_eth_port.0",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CGC_BIT_PEX0;
orion_clkdev_add("0", "pcie",
of_clk_get_from_provider(&clkspec));
@ -59,9 +55,24 @@ static void __init kirkwood_legacy_clk_init(void)
orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CGC_BIT_GE1;
orion_clkdev_add(NULL, "mv643xx_eth_port.1",
clkspec.args[0] = CGC_BIT_SDIO;
orion_clkdev_add(NULL, "mvsdio",
of_clk_get_from_provider(&clkspec));
/*
* The ethernet interfaces forget the MAC address assigned by
* u-boot if the clocks are turned off. Until proper DT support
* is available we always enable them for now.
*/
clkspec.args[0] = CGC_BIT_GE0;
clk = of_clk_get_from_provider(&clkspec);
orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk);
clk_prepare_enable(clk);
clkspec.args[0] = CGC_BIT_GE1;
clk = of_clk_get_from_provider(&clkspec);
orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk);
clk_prepare_enable(clk);
}
static void __init kirkwood_of_clk_init(void)

1
arch/arm/mach-mmp/gplugd.c
View File

@ -9,6 +9,7 @@
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <asm/mach/arch.h>

2
arch/arm/mach-mxs/icoll.c
View File

@ -100,7 +100,7 @@ static struct irq_domain_ops icoll_irq_domain_ops = {
.xlate = irq_domain_xlate_onecell,
};
void __init icoll_of_init(struct device_node *np,
static void __init icoll_of_init(struct device_node *np,
struct device_node *interrupt_parent)
{
/*

34
arch/arm/mach-mxs/mach-mxs.c
View File

@ -41,8 +41,6 @@ static struct fb_videomode mx23evk_video_modes[] = {
.lower_margin = 4,
.hsync_len = 1,
.vsync_len = 1,
.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
FB_SYNC_DOTCLK_FAILING_ACT,
},
};
@ -59,8 +57,6 @@ static struct fb_videomode mx28evk_video_modes[] = {
.lower_margin = 10,
.hsync_len = 10,
.vsync_len = 10,
.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
FB_SYNC_DOTCLK_FAILING_ACT,
},
};
@ -77,7 +73,6 @@ static struct fb_videomode m28evk_video_modes[] = {
.lower_margin = 45,
.hsync_len = 1,
.vsync_len = 1,
.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
},
};
@ -94,9 +89,7 @@ static struct fb_videomode apx4devkit_video_modes[] = {
.lower_margin = 13,
.hsync_len = 48,
.vsync_len = 3,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
FB_SYNC_DATA_ENABLE_HIGH_ACT |
FB_SYNC_DOTCLK_FAILING_ACT,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
},
};
@ -113,9 +106,7 @@ static struct fb_videomode apf28dev_video_modes[] = {
.lower_margin = 0x15,
.hsync_len = 64,
.vsync_len = 4,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
FB_SYNC_DATA_ENABLE_HIGH_ACT |
FB_SYNC_DOTCLK_FAILING_ACT,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
},
};
@ -132,7 +123,6 @@ static struct fb_videomode cfa10049_video_modes[] = {
.lower_margin = 2,
.hsync_len = 15,
.vsync_len = 15,
.sync = FB_SYNC_DATA_ENABLE_HIGH_ACT
},
};
@ -259,6 +249,8 @@ static void __init imx23_evk_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
mxsfb_pdata.default_bpp = 32;
mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
MXSFB_SYNC_DOTCLK_FAILING_ACT;
}
static inline void enable_clk_enet_out(void)
@ -278,6 +270,8 @@ static void __init imx28_evk_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
mxsfb_pdata.default_bpp = 32;
mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
MXSFB_SYNC_DOTCLK_FAILING_ACT;
mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
}
@ -297,6 +291,7 @@ static void __init m28evk_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
mxsfb_pdata.default_bpp = 16;
mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
}
static void __init sc_sps1_init(void)
@ -322,6 +317,8 @@ static void __init apx4devkit_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
mxsfb_pdata.default_bpp = 32;
mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
MXSFB_SYNC_DOTCLK_FAILING_ACT;
}
#define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
@ -402,17 +399,18 @@ static void __init cfa10049_init(void)
{
enable_clk_enet_out();
update_fec_mac_prop(OUI_CRYSTALFONTZ);
mxsfb_pdata.mode_list = cfa10049_video_modes;
mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
mxsfb_pdata.default_bpp = 32;
mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
}
static void __init cfa10037_init(void)
{
enable_clk_enet_out();
update_fec_mac_prop(OUI_CRYSTALFONTZ);
mxsfb_pdata.mode_list = cfa10049_video_modes;
mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
mxsfb_pdata.default_bpp = 32;
mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
}
static void __init apf28_init(void)
@ -423,6 +421,8 @@ static void __init apf28_init(void)
mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
mxsfb_pdata.default_bpp = 16;
mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT |
MXSFB_SYNC_DOTCLK_FAILING_ACT;
}
static void __init mxs_machine_init(void)

1
arch/arm/mach-mxs/mm.c
View File

@ -18,6 +18,7 @@
#include <mach/mx23.h>
#include <mach/mx28.h>
#include <mach/common.h>
/*
* Define the MX23 memory map.

1
arch/arm/mach-mxs/ocotp.c
View File

@ -19,6 +19,7 @@
#include <asm/processor.h> /* for cpu_relax() */
#include <mach/mxs.h>
#include <mach/common.h>
#define OCOTP_WORD_OFFSET 0x20
#define OCOTP_WORD_COUNT 0x20

6
arch/arm/mach-omap1/Kconfig
View File

@ -55,12 +55,6 @@ config MACH_OMAP_H3
TI OMAP 1710 H3 board support. Say Y here if you have such
a board.
config MACH_OMAP_HTCWIZARD
bool "HTC Wizard"
depends on ARCH_OMAP850
help
HTC Wizard smartphone support (AKA QTEK 9100, ...)
config MACH_HERALD
bool "HTC Herald"
depends on ARCH_OMAP850

2
arch/arm/mach-omap1/common.h
View File

@ -31,6 +31,8 @@
#include <plat/i2c.h>
#include <mach/irqs.h>
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
void omap7xx_map_io(void);
#else

8
arch/arm/mach-omap2/Kconfig
View File

@ -311,9 +311,6 @@ config MACH_OMAP_ZOOM2
default y
select OMAP_PACKAGE_CBB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select SERIAL_8250
select SERIAL_8250_CONSOLE
select SERIAL_CORE_CONSOLE
config MACH_OMAP_ZOOM3
bool "OMAP3630 Zoom3 board"
@ -321,9 +318,6 @@ config MACH_OMAP_ZOOM3
default y
select OMAP_PACKAGE_CBP
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select SERIAL_8250
select SERIAL_8250_CONSOLE
select SERIAL_CORE_CONSOLE
config MACH_CM_T35
bool "CompuLab CM-T35/CM-T3730 modules"
@ -414,7 +408,7 @@ config OMAP3_SDRC_AC_TIMING
config OMAP4_ERRATA_I688
bool "OMAP4 errata: Async Bridge Corruption"
depends on ARCH_OMAP4 && !ARCH_MULTIPLATFORM
depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM
select ARCH_HAS_BARRIERS
help
If a data is stalled inside asynchronous bridge because of back

2
arch/arm/mach-omap2/board-2430sdp.c
View File

@ -166,7 +166,7 @@ static void __init sdp2430_display_init(void)
omap_display_init(&sdp2430_dss_data);
}
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91x_MODULE)
#if IS_ENABLED(CONFIG_SMC91X)
static struct omap_smc91x_platform_data board_smc91x_data = {
.cs = 5,

2
arch/arm/mach-omap2/board-generic.c
View File

@ -102,6 +102,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
.init_irq = omap_intc_of_init,
.handle_irq = omap3_intc_handle_irq,
.init_machine = omap_generic_init,
.init_late = omap3_init_late,
.init_time = omap3_sync32k_timer_init,
.dt_compat = omap3_boards_compat,
.restart = omap3xxx_restart,
@ -119,6 +120,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
.init_irq = omap_intc_of_init,
.handle_irq = omap3_intc_handle_irq,
.init_machine = omap_generic_init,
.init_late = omap3_init_late,
.init_time = omap3_secure_sync32k_timer_init,
.dt_compat = omap3_gp_boards_compat,
.restart = omap3xxx_restart,

2
arch/arm/mach-omap2/board-h4.c
View File

@ -246,7 +246,7 @@ static u32 is_gpmc_muxed(void)
return 0;
}
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91x_MODULE)
#if IS_ENABLED(CONFIG_SMC91X)
static struct omap_smc91x_platform_data board_smc91x_data = {
.cs = 1,

2
arch/arm/mach-omap2/board-rx51.c
View File

@ -17,6 +17,7 @@
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/leds.h>
#include <linux/usb/phy.h>
#include <linux/usb/musb.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
@ -98,6 +99,7 @@ static void __init rx51_init(void)
sdrc_params = nokia_get_sdram_timings();
omap_sdrc_init(sdrc_params, sdrc_params);
usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb");
usb_musb_init(&musb_board_data);
rx51_peripherals_init();

8
arch/arm/mach-omap2/cclock33xx_data.c
View File

@ -958,6 +958,14 @@ int __init am33xx_clk_init(void)
clk_set_parent(&timer3_fck, &sys_clkin_ck);
clk_set_parent(&timer6_fck, &sys_clkin_ck);
/*
* The On-Chip 32K RC Osc clock is not an accurate clock-source as per
* the design/spec, so as a result, for example, timer which supposed
* to get expired @60Sec, but will expire somewhere ~@40Sec, which is
* not expected by any use-case, so change WDT1 clock source to PRCM
* 32KHz clock.
*/
clk_set_parent(&wdt1_fck, &clkdiv32k_ick);
return 0;
}

1
arch/arm/mach-omap2/common.h
View File

@ -108,7 +108,6 @@ void omap35xx_init_late(void);
void omap3630_init_late(void);
void am35xx_init_late(void);
void ti81xx_init_late(void);
void omap4430_init_late(void);
int omap2_common_pm_late_init(void);
#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)

30
arch/arm/mach-omap2/dpll3xxx.c
View File

@ -307,10 +307,10 @@ static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel)
_omap3_noncore_dpll_bypass(clk);
/*
* Set jitter correction. No jitter correction for OMAP4 and 3630
* since freqsel field is no longer present
* Set jitter correction. Jitter correction applicable for OMAP343X
* only since freqsel field is no longer present on other devices.
*/
if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
if (cpu_is_omap343x()) {
v = __raw_readl(dd->control_reg);
v &= ~dd->freqsel_mask;
v |= freqsel << __ffs(dd->freqsel_mask);
@ -480,29 +480,30 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
if (!dd)
return -EINVAL;
__clk_prepare(dd->clk_bypass);
clk_enable(dd->clk_bypass);
__clk_prepare(dd->clk_ref);
clk_enable(dd->clk_ref);
if (__clk_get_rate(dd->clk_bypass) == rate &&
(dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) {
pr_debug("%s: %s: set rate: entering bypass.\n",
__func__, __clk_get_name(hw->clk));
__clk_prepare(dd->clk_bypass);
clk_enable(dd->clk_bypass);
ret = _omap3_noncore_dpll_bypass(clk);
if (!ret)
new_parent = dd->clk_bypass;
clk_disable(dd->clk_bypass);
__clk_unprepare(dd->clk_bypass);
} else {
__clk_prepare(dd->clk_ref);
clk_enable(dd->clk_ref);
if (dd->last_rounded_rate != rate)
rate = __clk_round_rate(hw->clk, rate);
if (dd->last_rounded_rate == 0)
return -EINVAL;
/* No freqsel on AM335x, OMAP4 and OMAP3630 */
if (!soc_is_am33xx() && !cpu_is_omap44xx() &&
!cpu_is_omap3630()) {
/* Freqsel is available only on OMAP343X devices */
if (cpu_is_omap343x()) {
freqsel = _omap3_dpll_compute_freqsel(clk,
dd->last_rounded_n);
WARN_ON(!freqsel);
@ -514,6 +515,8 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
ret = omap3_noncore_dpll_program(clk, freqsel);
if (!ret)
new_parent = dd->clk_ref;
clk_disable(dd->clk_ref);
__clk_unprepare(dd->clk_ref);
}
/*
* FIXME - this is all wrong. common code handles reparenting and
@ -525,11 +528,6 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
if (!ret)
__clk_reparent(hw->clk, new_parent);
clk_disable(dd->clk_ref);
__clk_unprepare(dd->clk_ref);
clk_disable(dd->clk_bypass);
__clk_unprepare(dd->clk_bypass);
return 0;
}

4
arch/arm/mach-omap2/dsp.c
View File

@ -26,7 +26,7 @@
#include "control.h"
#include "cm2xxx_3xxx.h"
#include "prm2xxx_3xxx.h"
#ifdef CONFIG_BRIDGE_DVFS
#ifdef CONFIG_TIDSPBRIDGE_DVFS
#include "omap-pm.h"
#endif
@ -35,7 +35,7 @@
static struct platform_device *omap_dsp_pdev;
static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
#ifdef CONFIG_BRIDGE_DVFS
#ifdef CONFIG_TIDSPBRIDGE_DVFS
.dsp_set_min_opp = omap_pm_dsp_set_min_opp,
.dsp_get_opp = omap_pm_dsp_get_opp,
.cpu_set_freq = omap_pm_cpu_set_freq,

6
arch/arm/mach-omap2/gpmc.c
View File

@ -1122,9 +1122,6 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t,
/* TODO: remove, see function definition */
gpmc_convert_ps_to_ns(gpmc_t);
/* Now the GPMC is initialised, unreserve the chip-selects */
gpmc_cs_map = 0;
return 0;
}
@ -1383,6 +1380,9 @@ static int gpmc_probe(struct platform_device *pdev)
if (IS_ERR_VALUE(gpmc_setup_irq()))
dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
/* Now the GPMC is initialised, unreserve the chip-selects */
gpmc_cs_map = 0;
rc = gpmc_probe_dt(pdev);
if (rc < 0) {
clk_disable_unprepare(gpmc_l3_clk);

12
arch/arm/mach-omap2/id.c
View File

@ -529,22 +529,28 @@ void __init omap5xxx_check_revision(void)
case 0xb942:
switch (rev) {
case 0:
default:
omap_revision = OMAP5430_REV_ES1_0;
break;
case 1:
default:
omap_revision = OMAP5430_REV_ES2_0;
}
break;
case 0xb998:
switch (rev) {
case 0:
default:
omap_revision = OMAP5432_REV_ES1_0;
break;
case 1:
default:
omap_revision = OMAP5432_REV_ES2_0;
}
break;
default:
/* Unknown default to latest silicon rev as default*/
omap_revision = OMAP5430_REV_ES1_0;
omap_revision = OMAP5430_REV_ES2_0;
}
pr_info("OMAP%04x ES%d.0\n",

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